mirror of
https://github.com/nArnoSNES/tcc-65816.git
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66 lines
1.9 KiB
C
66 lines
1.9 KiB
C
/* PR rtl-optimization/28982. Function foo() does the equivalent of:
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float tmp_results[NVARS];
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for (int i = 0; i < NVARS; i++)
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{
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int inc = incs[i];
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float *ptr = ptrs[i], result = 0;
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for (int j = 0; j < n; j++)
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result += *ptr, ptr += inc;
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tmp_results[i] = result;
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}
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memcpy (results, tmp_results, sizeof (results));
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but without the outermost loop. The idea is to create high register
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pressure and ensure that some INC and PTR variables are spilled.
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On ARM targets, sequences like "result += *ptr, ptr += inc" can
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usually be implemented using (mem (post_modify ...)), and we do
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indeed create such MEMs before reload for this testcase. However,
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(post_modify ...) is not a valid address for coprocessor loads, so
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for -mfloat-abi=softfp, reload reloads the POST_MODIFY into a base
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register. GCC did not deal correctly with cases where the base and
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index of the POST_MODIFY are themselves reloaded. */
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#define NITER 4
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#define NVARS 20
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#define MULTI(X) \
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X( 0), X( 1), X( 2), X( 3), X( 4), X( 5), X( 6), X( 7), X( 8), X( 9), \
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X(10), X(11), X(12), X(13), X(14), X(15), X(16), X(17), X(18), X(19)
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#define DECLAREI(INDEX) inc##INDEX = incs[INDEX]
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#define DECLAREF(INDEX) *ptr##INDEX = ptrs[INDEX], result##INDEX = 0
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#define LOOP(INDEX) result##INDEX += *ptr##INDEX, ptr##INDEX += inc##INDEX
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#define COPYOUT(INDEX) results[INDEX] = result##INDEX
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float *ptrs[NVARS];
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float results[NVARS];
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int incs[NVARS];
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void __attribute__((noinline))
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foo (int n)
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{
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int MULTI (DECLAREI);
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float MULTI (DECLAREF);
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while (n--)
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MULTI (LOOP);
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MULTI (COPYOUT);
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}
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float input[NITER * NVARS];
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int
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main (void)
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{
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int i;
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for (i = 0; i < NVARS; i++)
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ptrs[i] = input + i, incs[i] = i;
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for (i = 0; i < NITER * NVARS; i++)
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input[i] = i;
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foo (NITER);
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for (i = 0; i < NVARS; i++)
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if (results[i] != i * NITER * (NITER + 1) / 2)
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return 1;
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return 0;
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}
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