udis/6811.py

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##########################################################################
#
# Processor specific code
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# CPU = "6811"
# Description = "FreeScale 68HC11 8-bit microcontroller."
# DataWidth = 8 # 8-bit data
# AddressWidth = 16 # 16-bit addresses
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# Maximum length of an instruction (for formatting purposes)
maxLength = 5;
# Leadin bytes for multbyte instructions
leadInBytes = [0x18, 0x1a, 0xcd]
# Addressing mode table
addressModeTable = {
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"inherent" : "",
"immediate" : "#${0:02X}",
"immediatex" : "#${0:02X}{1:02X}",
"direct" : "${0:02X}",
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"direct2" : "${0:02X} ${1:02X}",
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"direct3" : "${0:02X} ${1:02X} ${2:02X}",
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"extended" : "${0:02X}{1:02X}",
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"indexedx" : "${0:02X},x",
"indexedx2" : "${0:02X},x ${1:02X}",
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"indexedx3" : "${0:02X},x ${1:02X} ${2:02X}",
"indexedy" : "${0:02X},y",
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"indexedy2" : "${0:02X},y ${1:02X}",
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"indexedy3" : "${0:02X},y ${1:02X} ${2:02X}",
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"relative" : "${0:04X}",
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}
# Op Code Table
# Key is numeric opcode (possibly multiple bytes)
# Value is a list:
# # bytes
# mnemonic
# addressing mode.
# flags (e.g. pcr)
opcodeTable = {
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0x1b : [ 1, "aba", "inherent" ],
0x3a : [ 1, "abx", "inherent" ],
0x183a : [ 2, "aby", "inherent" ],
0x89 : [ 2, "adca", "immediate" ],
0x99 : [ 2, "adca", "direct" ],
0xb9 : [ 3, "adca", "extended" ],
0xa9 : [ 2, "adca", "indexedx" ],
0x18a9 : [ 3, "adca", "indexedy" ],
0xc9 : [ 2, "adcb", "immediate" ],
0xd9 : [ 2, "adcb", "direct" ],
0xf9 : [ 3, "adcb", "extended" ],
0xe9 : [ 2, "adcb", "indexedx" ],
0x18e9 : [ 3, "adcb", "indexedy" ],
0x8b : [ 2, "adda", "immediate" ],
0x9b : [ 2, "adda", "direct" ],
0xbb : [ 3, "adda", "extended" ],
0xab : [ 2, "adda", "indexedx" ],
0x18ab : [ 3, "adda", "indexedy" ],
0xcb : [ 2, "addb", "immediate" ],
0xdb : [ 2, "addb", "direct" ],
0xfb : [ 3, "addb", "extended" ],
0xeb : [ 2, "addb", "indexedx" ],
0x18eb : [ 3, "addb", "indexedy" ],
0xc3 : [ 3, "addd", "immediatex" ],
0xd3 : [ 2, "addd", "direct" ],
0xf3 : [ 3, "addd", "extended" ],
0xe3 : [ 2, "addd", "indexedx" ],
0x18e3 : [ 3, "addd", "indexedy" ],
0x84 : [ 2, "anda", "immediate" ],
0x94 : [ 2, "anda", "direct" ],
0xb4 : [ 3, "anda", "extended" ],
0xa4 : [ 2, "anda", "indexedx" ],
0x18a4 : [ 3, "anda", "indexedy" ],
0xc4 : [ 2, "andb", "immediate" ],
0xd4 : [ 2, "andb", "direct" ],
0xf4 : [ 3, "andb", "extended" ],
0xe4 : [ 2, "andb", "indexedx" ],
0x18e4 : [ 3, "andb", "indexedy" ],
0x78 : [ 3, "asl", "extended" ],
0x68 : [ 2, "asl", "indexedx" ],
0x1868 : [ 3, "asl", "indexedy" ],
0x48 : [ 1, "asla", "inherent" ],
0x58 : [ 1, "aslb", "inherent" ],
0x05 : [ 1, "asld", "inherent" ],
0x77 : [ 3, "asr", "extended" ],
0x67 : [ 2, "asr", "indexedx" ],
0x1867 : [ 3, "asr", "indexedy" ],
0x47 : [ 1, "asra", "inherent" ],
0x57 : [ 1, "asrb", "inherent" ],
0x24 : [ 2, "bcc", "relative", pcr ],
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0x15 : [ 3, "bclr", "direct2", ],
0x1d : [ 3, "bclr", "indexedx2", ],
0x181d : [ 4, "bclr", "indexedy2", ],
0x25 : [ 2, "bcs", "relative", pcr ],
0x27 : [ 2, "beq", "relative", pcr ],
0x2c : [ 2, "bge", "relative", pcr ],
0x2e : [ 2, "bgt", "relative", pcr ],
0x22 : [ 2, "bhi", "relative", pcr ],
0x24 : [ 2, "bhs", "relative", pcr ],
0x85 : [ 2, "bita", "immediate" ],
0x95 : [ 2, "bita", "direct" ],
0xb5 : [ 3, "bita", "extended" ],
0xa5 : [ 2, "bita", "indexedx" ],
0x18a5 : [ 3, "bita", "indexedy" ],
0xc5 : [ 2, "bitb", "immediate" ],
0xd5 : [ 2, "bitb", "direct" ],
0xf5 : [ 3, "bitb", "extended" ],
0xe5 : [ 2, "bitb", "indexedx" ],
0x18e5 : [ 3, "bitb", "indexedy" ],
0x2f : [ 2, "ble", "relative", pcr ],
0x25 : [ 2, "blo", "relative", pcr ],
0x23 : [ 2, "bls", "relative", pcr ],
0x2d : [ 2, "blt", "relative", pcr ],
0x2b : [ 2, "bmi", "relative", pcr ],
0x26 : [ 2, "bne", "relative", pcr ],
0x2a : [ 2, "bpl", "relative", pcr ],
0x20 : [ 2, "bra", "relative", pcr ],
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0x13 : [ 4, "brclr", "direct3", ],
0x1f : [ 4, "brclr", "indexedx3", ],
0x181f : [ 5, "brclr", "indexedy3", ],
0x21 : [ 2, "brn", "relative", pcr ],
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0x12 : [ 4, "brset", "direct3", ],
0x1e : [ 4, "brset", "indexedx3", ],
0x181e : [ 5, "brset", "indexedy3", ],
0x14 : [ 3, "bset", "direct2", ],
0x1c : [ 3, "bset", "indexedx2", ],
0x181c : [ 4, "bset", "indexedy2", ],
0x8d : [ 2, "bsr", "relative", pcr ],
0x28 : [ 2, "bvc", "relative", pcr ],
0x29 : [ 2, "bvs", "relative", pcr ],
0x11 : [ 1, "cba", "inherent" ],
0x0c : [ 1, "clc", "inherent" ],
0x0e : [ 1, "cli", "inherent" ],
0x7f : [ 3, "clr", "extended" ],
0x6f : [ 2, "clr", "indexedx" ],
0x187f : [ 3, "clr", "indexedy" ],
0x4f : [ 1, "clra", "inherent" ],
0x5f : [ 1, "clrb", "inherent" ],
0x0a : [ 1, "clv", "inherent" ],
0x81 : [ 2, "cmpa", "immediate" ],
0x91 : [ 2, "cmpa", "direct" ],
0xb1 : [ 3, "cmpa", "extended" ],
0xa1 : [ 2, "cmpa", "indexedx" ],
0x18a1 : [ 3, "cmpa", "indexedy" ],
0xc1 : [ 2, "cmpb", "immediate" ],
0xd1 : [ 2, "cmpb", "direct" ],
0xf1 : [ 3, "cmpb", "extended" ],
0xe1 : [ 2, "cmpb", "indexedx" ],
0x18e1 : [ 3, "cmpb", "indexedy" ],
0x73 : [ 3, "com", "extended" ],
0x63 : [ 2, "com", "indexedx" ],
0x1863 : [ 3, "com", "indexedy" ],
0x43 : [ 1, "coma", "inherent" ],
0x53 : [ 1, "comb", "inherent" ],
0x1a83 : [ 4, "cpd", "immediatex" ],
0x1a93 : [ 3, "cpd", "direct" ],
0x1ab3 : [ 4, "cpd", "extended" ],
0x1aa3 : [ 3, "cpd", "indexedx" ],
0xcda3 : [ 3, "cpd", "indexedy" ],
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0x00 : [ 1, "test", "inherent" ],
0x01 : [ 1, "nop", "inherent" ],
0x02 : [ 2, "ora", "direct" ],
0x03 : [ 3, "jmp", "extended" ],
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0x86 : [ 2, "ldaa", "immediate" ],
0x8f : [ 1, "xgdx", "inherent" ],
0x188f : [ 2, "xgdy", "inherent" ],
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}
# End of processor specific code
##########################################################################