6502/udis
1
0
Fork 0
mirror of https://github.com/jefftranter/udis.git synced 2025-02-22 22:29:02 +00:00
Code Issues Projects Releases Wiki Activity

Bug fixes.

Browse Source
This commit is contained in:
Jeff Tranter 2015-06-23 10:28:16 -04:00
parent 507cbe41b4
commit 04c6af4b22
1 changed files with 220 additions and 217 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

17
8080.py
View File

@ -23,7 +23,7 @@ addressModeTable = {
"regd" : "d", "regd" : "d",
"rege" : "e", "rege" : "e",
"regh" : "h", "regh" : "h",
"regl" : "h", "regl" : "l",
"regm" : "m", "regm" : "m",
"regsp" : "sp", "regsp" : "sp",
"regbb" : "b,b", "regbb" : "b,b",
@ -91,10 +91,13 @@ addressModeTable = {
"regaa" : "a,a", "regaa" : "a,a",
"regpsw" : "psw", "regpsw" : "psw",
"imm" : "${0:02X}", "imm" : "${0:02X}",
"imma" : "a,${0:02X}",
"immb" : "b,${0:02X}", "immb" : "b,${0:02X}",
"immc" : "c,${0:02X}", "immc" : "c,${0:02X}",
"immd" : "d,${0:02X}", "immd" : "d,${0:02X}",
"imme" : "e,${0:02X}",
"immh" : "h,${0:02X}", "immh" : "h,${0:02X}",
"imml" : "l,${0:02X}",
"immm" : "m,${0:02X}", "immm" : "m,${0:02X}",
"immxb" : "b,${1:02X}{0:02X}", "immxb" : "b,${1:02X}{0:02X}",
"immxd" : "d,${1:02X}{0:02X}", "immxd" : "d,${1:02X}{0:02X}",
@ -148,22 +151,22 @@ opcodeTable = {
0x1b : [ 1, "dcx", "regd" ], 0x1b : [ 1, "dcx", "regd" ],
0x1c : [ 1, "inr", "rege" ], 0x1c : [ 1, "inr", "rege" ],
0x1d : [ 1, "dcr", "rege" ], 0x1d : [ 1, "dcr", "rege" ],
0x1e : [ 1, "mvi", "rege" ], 0x1e : [ 2, "mvi", "imme" ],
0x1f : [ 1, "rar", "implied" ], 0x1f : [ 1, "rar", "implied" ],
0x21 : [ 3, "lxi", "immh" ], 0x21 : [ 3, "lxi", "immxh" ],
0x22 : [ 1, "shld", "implied" ], 0x22 : [ 3, "shld", "direct" ],
0x23 : [ 1, "inx", "regh" ], 0x23 : [ 1, "inx", "regh" ],
0x24 : [ 1, "inr", "regh" ], 0x24 : [ 1, "inr", "regh" ],
0x25 : [ 1, "dcr", "regh" ], 0x25 : [ 1, "dcr", "regh" ],
0x26 : [ 2, "mvi", "regh" ], 0x26 : [ 2, "mvi", "immh" ],
0x27 : [ 1, "daa", "implied" ], 0x27 : [ 1, "daa", "implied" ],
0x29 : [ 1, "dad", "regh" ], 0x29 : [ 1, "dad", "regh" ],
0x2a : [ 3, "lhld", "direct" ], 0x2a : [ 3, "lhld", "direct" ],
0x2b : [ 1, "dcx", "regh" ], 0x2b : [ 1, "dcx", "regh" ],
0x2c : [ 1, "inr", "regl" ], 0x2c : [ 1, "inr", "regl" ],
0x2d : [ 1, "dcr", "regl" ], 0x2d : [ 1, "dcr", "regl" ],
0x2e : [ 2, "mvi", "regl" ], 0x2e : [ 2, "mvi", "imml" ],
0x2f : [ 1, "cma", "implied" ], 0x2f : [ 1, "cma", "implied" ],
0x31 : [ 3, "lxi", "immxsp" ], 0x31 : [ 3, "lxi", "immxsp" ],
@ -178,7 +181,7 @@ opcodeTable = {
0x3b : [ 1, "dcx", "regsp" ], 0x3b : [ 1, "dcx", "regsp" ],
0x3c : [ 1, "inr", "rega" ], 0x3c : [ 1, "inr", "rega" ],
0x3d : [ 1, "dcr", "rega" ], 0x3d : [ 1, "dcr", "rega" ],
0x3e : [ 2, "mvi", "rega" ], 0x3e : [ 2, "mvi", "imma" ],
0x3f : [ 1, "cmc", "implied" ], 0x3f : [ 1, "cmc", "implied" ],
0x40 : [ 1, "mov", "regbb" ], 0x40 : [ 1, "mov", "regbb" ],