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Jeff Tranter 2015-06-23 22:59:44 -04:00
parent 04c6af4b22
commit 637426b10e
2 changed files with 617 additions and 1 deletions
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udis.py
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@ -58,7 +58,7 @@ try:
exec(open(plugin).read())
except FileNotFoundError:
print(("error: CPU plugin file '{}' not found.".format(plugin)), file=sys.stderr)
print("The following CPUs are supported: 6502 65c02 6800 6811 8080")
print("The following CPUs are supported: 6502 65c02 6800 6811 8080 z80")
sys.exit(1)
# Get filename from command line arguments.

616
z80.py Normal file
View File

@ -0,0 +1,616 @@
##########################################################################
#
# Processor specific code
# CPU = "Z80"
# Description = "Zilog 8-bit microprocessor."
# DataWidth = 8 # 8-bit data
# AddressWidth = 16 # 16-bit addresses
# Maximum length of an instruction (for formatting purposes)
maxLength = 3
# Leadin bytes for multibyte instructions
leadInBytes = [0xdd, 0xed, 0xfd]
# Addressing mode table
# List of addressing modes and corresponding format strings for operands.
addressModeTable = {
"implied" : "",
"immbc" : "bc,${1:02X}{0:02X}",
"immde" : "bc,${1:02X}{0:02X}",
"indbca" : "(bc),a",
"inddea" : "(de),a",
"indade" : "a,(de)",
"indabc" : "a,(bc)",
"regb" : "b",
"regbc" : "bc",
"regde" : "de",
"indb" : "b,${0:02X}",
"indc" : "c,${0:02X}",
"indd" : "d,${0:02X}",
"inde" : "e,${0:02X}",
"regafaf" : "af,af",
"reghlbc" : "hl,bc",
"reghlde" : "hl,de",
"imm" : "${0:02X}",
"immx" : "${1:02X}{0:02X}",
"rel" : "${0:04X}",
"ext" : "[${1:02X}{0:02X}]",
"ind" : "[${0:02X}+{1:02X}]",
"rega" : "a",
"regc" : "c",
"regd" : "d",
"rege" : "e",
"regh" : "h",
"regl" : "l",
"reginda" : "[a]",
"bit" : "${0:02X}",
"0" : "0",
}
# Op Code Table
# Key is numeric opcode (possibly multiple bytes)
# Value is a list:
# # bytes
# mnemonic
# addressing mode
# flags (e.g. pcr)
opcodeTable = {
0x00 : [ 1, "nop", "implied" ],
0x01 : [ 3, "ld", "immbc" ],
0x02 : [ 1, "ld", "indbca" ],
0x03 : [ 1, "inc", "regbc" ],
0x04 : [ 1, "inc", "regb" ],
0x05 : [ 1, "dec", "regb" ],
0x06 : [ 2, "ld", "indb" ],
0x07 : [ 1, "rlca", "implied" ],
0x08 : [ 1, "ex", "regafaf" ],
0x09 : [ 1, "add", "reghlbc" ],
0x0a : [ 1, "ld", "indabc" ],
0x0b : [ 1, "dec", "regbc" ],
0x0c : [ 1, "inc", "regc" ],
0x0d : [ 1, "dec", "regc" ],
0x0e : [ 2, "ld", "indc" ],
0x0f : [ 1, "rrca", "implied" ],
0x10 : [ 2, "djnz", "imm" ],
0x11 : [ 3, "ld", "immde" ],
0x12 : [ 1, "ld", "inddea" ],
0x13 : [ 1, "inc", "regde" ],
0x14 : [ 1, "inc", "regd" ],
0x15 : [ 1, "dec", "regd" ],
0x16 : [ 2, "ld", "indd" ],
0x17 : [ 1, "rla", "implied" ],
0x18 : [ 2, "jr", "imm" ],
0x19 : [ 1, "add", "reghlde" ],
0x1a : [ 1, "ld", "indade" ],
0x1b : [ 1, "dec", "regde" ],
0x1c : [ 1, "inc", "rege" ],
0x1d : [ 1, "dec", "rege" ],
0x1e : [ 2, "ld", "inde" ],
0x1f : [ 1, "rra", "implied" ],
# [ "jr nz,", 1 ], # 20
# [ "ld hl,", 3 ], # 21
# [ "ld (", 3 ], # 22 then append "),hl"
# [ "inc hl", 1 ], # 23
# [ "inc h", 1 ], # 24
# [ "dec h", 1 ], # 25
# [ "ld h,", 2 ], # 26
# [ "daa", 1 ], # 27
# [ "jr z,", 1 ], # 28
# [ "add hl,jl", 1 ], # 29
# [ "ld hl,(", 3 ], # 2A then append ")"
# [ "dec hl", 1 ], # 2B
# [ "inc l", 1 ], # 2C
# [ "dec l", 1 ], # 2D
# [ "ld l,", 2 ], # 2E
# [ "cpl", 1 ], # 2F
#
# [ "jr nc,", 2 ], # 30
# [ "ld sp,", 3 ], # 31
# [ "ld (", 3 ], # 32 then append "),a"
# [ "inc sp", 1 ], # 33
# [ "inc (hl)", 1 ], # 34
# [ "dec (hl)", 1 ], # 35
# [ "ld (hl),", 2 ], # 36
# [ "scf", 1 ], # 37
# [ "jr c,", 1 ], # 38
# [ "add hl,sp", 1 ], # 39
# [ "ld a,(", 3 ], # 3A then append ")"
# [ "dec sp", 1 ], # 3B
# [ "inc a", 1 ], # 3C
# [ "dec a", 1 ], # 3D
# [ "ld a,", 2 ], # 3E
# [ "ccf", 1 ], # 3F
#
# [ "ld b,b", 1 ], # 40
# [ "ld b,c", 1 ], # 41
# [ "ld b,d", 1 ], # 42
# [ "ld b,e", 1 ], # 43
# [ "ld b,h", 1 ], # 44
# [ "ld b,l", 1 ], # 45
# [ "ld b,(hl)", 1 ], # 46
# [ "ld b,a", 1 ], # 47
# [ "ld c,b", 1 ], # 48
# [ "ld c,c", 1 ], # 49
# [ "ld c,d", 1 ], # 4A
# [ "ld c,e", 1 ], # 4B
# [ "ld c,h", 1 ], # 4C
# [ "ld c,l", 1 ], # 4D
# [ "ld c,(hl)", 1 ], # 4E
# [ "ld c,a", 1 ], # 4F
#
# [ "ld d,b", 1 ], # 50
# [ "ld d,c", 1 ], # 51
# [ "ld d,d", 1 ], # 52
# [ "ld d,e", 1 ], # 53
# [ "ld d,h", 1 ], # 54
# [ "ld d,l", 1 ], # 55
# [ "ld d,(hl)", 1 ], # 56
# [ "ld d,a", 1 ], # 57
# [ "ld e,b", 1 ], # 58
# [ "ld e,c", 1 ], # 59
# [ "ld e,d", 1 ], # 5A
# [ "ld e,e", 1 ], # 5B
# [ "ld e,h", 1 ], # 5C
# [ "ld e,l", 1 ], # 5D
# [ "ld e,(hl)", 1 ], # 5E
# [ "ld e,a", 1 ], # 5F
#
# [ "ld h,b", 1 ], # 60
# [ "ld h,c", 1 ], # 61
# [ "ld h,d", 1 ], # 62
# [ "ld h,e", 1 ], # 63
# [ "ld h,h", 1 ], # 64
# [ "ld h,l", 1 ], # 65
# [ "ld h,(hl)", 1 ], # 66
# [ "ld h,a", 1 ], # 67
# [ "ld l,b", 1 ], # 68
# [ "ld l,c", 1 ], # 69
# [ "ld l,d", 1 ], # 6A
# [ "ld l,e", 1 ], # 6B
# [ "ld l,h", 1 ], # 6C
# [ "ld l,l", 1 ], # 6D
# [ "ld l,(hl)", 1 ], # 6E
# [ "ld l,a", 1 ], # 6F
#
# [ "ld (hl),b", 1 ], # 70
# [ "ld (hl),c", 1 ], # 71
# [ "ld (hl),d", 1 ], # 72
# [ "ld (hl),e", 1 ], # 73
# [ "ld (hl),h", 1 ], # 74
# [ "ld (hl),l", 1 ], # 75
# [ "halt", 1 ], # 76
# [ "ld (hl),a", 1 ], # 77
# [ "ld a,b", 1 ], # 78
# [ "ld a,c", 1 ], # 79
# [ "ld a,d", 1 ], # 7A
# [ "ld a,e", 1 ], # 7B
# [ "ld a,h", 1 ], # 7C
# [ "ld a,l", 1 ], # 7D
# [ "ld a,(hl)", 1 ], # 7E
# [ "ld a,a", 1 ], # 7F
#
# [ "add a,b", 1 ], # 80
# [ "add a,c", 1 ], # 81
# [ "add a,d", 1 ], # 82
# [ "add a,ee", 1 ], # 83
# [ "add a,h", 1 ], # 84
# [ "add a,l", 1 ], # 85
# [ "add a,(hl)", 1 ], # 86
# [ "add a,a", 1 ], # 87
# [ "adc a,b", 1 ], # 88
# [ "adc a,c", 1 ], # 89
# [ "adc a,d", 1 ], # 8A
# [ "adc a,e", 1 ], # 8B
# [ "adc a,h", 1 ], # 8C
# [ "adc a,l", 1 ], # 8D
# [ "adc a,(hl)", 1 ], # 8E
# [ "adc a,a", 1 ], # 8F
#
# [ "sub b", 1 ], # 90
# [ "sub c", 1 ], # 91
# [ "sub d", 1 ], # 92
# [ "sub e", 1 ], # 93
# [ "sub h", 1 ], # 94
# [ "sub l", 1 ], # 95
# [ "sub (hl)", 1 ], # 96
# [ "sub a", 1 ], # 97
# [ "sbc a,b", 1 ], # 98
# [ "sbc a,c", 1 ], # 99
# [ "sbc a,d", 1 ], # 9A
# [ "sbc a,e", 1 ], # 9B
# [ "sbc a,h", 1 ], # 9C
# [ "sbc a,l", 1 ], # 9D
# [ "sbc a,(hl)", 1 ], # 9E
# [ "sbc a,a", 1 ], # 9F
#
# [ "and b", 1 ], # A0
# [ "and c", 1 ], # A1
# [ "and d", 1 ], # A2
# [ "and e", 1 ], # A3
# [ "and h", 1 ], # A4
# [ "and l", 1 ], # A5
# [ "and (hl)", 1 ], # A6
# [ "and a", 1 ], # A7
# [ "xor b", 1 ], # A8
# [ "xor c", 1 ], # A9
# [ "xor d", 1 ], # AA
# [ "xor e", 1 ], # AB
# [ "xor h", 1 ], # AC
# [ "xor l", 1 ], # AD
# [ "xor (hl)", 1 ], # AE
# [ "xor a", 1 ], # AF
#
# [ "or b", 1 ], # B0
# [ "or c", 1 ], # B1
# [ "or d", 1 ], # B2
# [ "or e", 1 ], # B3
# [ "or h", 1 ], # B4
# [ "or l", 1 ], # B5
# [ "or (hl)", 1 ], # B6
# [ "or a", 1 ], # B7
# [ "cp b", 1 ], # B8
# [ "cp c", 1 ], # B9
# [ "cp d", 1 ], # BA
# [ "cp e", 1 ], # BB
# [ "cp h", 1 ], # BC
# [ "cp l", 1 ], # BD
# [ "cp (hl)", 1 ], # BE
# [ "cp a", 1 ], # BF
#
# [ "ret nz", 1 ], # C0
# [ "pop bc", 1 ], # C1
# [ "jp nz,", 3 ], # C2
# [ "jp ", 3 ], # C3
# [ "call nz,", 3 ], # C4
# [ "push bc", 1 ], # C5
# [ "ada a,", 2 ], # C6
# [ "rst 00", 1 ], # C7
# [ "ret z", 1 ], # C8
# [ "ret", 1 ], # C9
# [ "jp z,", 3 ], # CA
# [ "prefix", 2 ], # CB
# [ "call z,", 3 ], # CC
# [ "call ", 3 ], # CD
# [ "adc a,", 2 ], # CE
# [ "rst 08", 1 ], # CF
#
# [ "ret nc", 1 ], # D0
# [ "pop de", 1 ], # D1
# [ "jp nc,", 3 ], # D2
# [ "out (", 2 ], # D3 then append "),a"
# [ "call nc,", 3 ], # D4
# [ "push de", 1 ], # D5
# [ "sub ", 2 ], # D6
# [ "rst 10", 1 ], # D7
# [ "ret c", 1 ], # D8
# [ "exx", 1 ], # D9
# [ "jp c,", 3 ], # DA
# [ "in a,(", 2 ], # DB then append ")"
# [ "call c,", 3 ], # DC
# [ "prefix", 2 ], # DD
# [ "sbc a,", 2 ], # DE
# [ "rst 18", 1 ], # DF
#
# [ "ret po", 1 ], # E0
# [ "pop hl", 1 ], # E1
# [ "jp po,", 3 ], # E2
# [ "ex (sp),hl", 1 ],# E3
# [ "call po,", 3 ], # E4
# [ "push hl", 1 ], # E5
# [ "and ", 2 ], # E6
# [ "rst 20", 1 ], # E7
# [ "ret pe", 1 ], # E8
# [ "jp (hl)", 1 ], # E9
# [ "jp pe,", 3 ], # EA
# [ "ex de,hl", 1 ], # EB
# [ "call pe,", 3 ], # EC
# [ "prefix", 2 ], # ED
# [ "xor ", 2 ], # EE
# [ "rst 28", 1 ], # EF
#
# [ "ret p", 1 ], # F0
# [ "pop af", 1 ], # F1
# [ "jp p,", 3 ], # F2
# [ "di", 1 ], # F3
# [ "call p,", 3 ], # F4
# [ "push af", 1 ], # F5
# [ "or ", 2 ], # F6
# [ "rst 30", 1 ], # F7
# [ "ret m", 1 ], # F8
# [ "ld sp,phl", 1 ], # F9
# [ "jp m,", 3 ], # FA
# [ "ei", 1 ], # FB
# [ "call m,", 3 ], # FC
# [ "prefix", 2 ], # FD
# [ "cp ", 2 ], # FE
# [ "rst 38", 1 ], # FF
#
}
# End of processor specific code
##########################################################################
## Lookup table for multibyte instructions starting with 0xCB
#lookupTableCB = [
# [ "rlc b", 2 ], # 00
# [ "rlc c", 2 ], # 01
# [ "rlc d", 2 ], # 02
# [ "rlc e", 2 ], # 03
# [ "rlc h", 2 ], # 04
# [ "rlc l", 2 ], # 05
# [ "rlc (hl)", 2 ], # 06
# [ "rlc a", 2 ], # 07
# [ "rrc b", 2 ], # 08
# [ "rrc c", 2 ], # 09
# [ "rrc d", 2 ], # 0A
# [ "rrc e", 2 ], # 0B
# [ "rrc h", 2 ], # 0C
# [ "rrc l", 2 ], # 0D
# [ "rrc (hl)", 2 ], # 0E
# [ "rrc a", 2 ], # 0F
#
# [ "rl b", 2 ], # 10
# [ "rl c", 2 ], # 11
# [ "rl d", 2 ], # 12
# [ "rl e", 2 ], # 13
# [ "rl h", 2 ], # 14
# [ "rl l", 2 ], # 15
# [ "rl (hl)", 2 ], # 16
# [ "rl a", 2 ], # 17
# [ "rr b", 2 ], # 18
# [ "rr c", 2 ], # 19
# [ "rr d", 2 ], # 1A
# [ "rr e", 2 ], # 1B
# [ "rr h", 2 ], # 1C
# [ "rr l", 2 ], # 1D
# [ "rr (hl)", 2 ], # 1E
# [ "rr e", 2 ], # 1F
#
# [ "", 2 ], # 20
# [ "", 2 ], # 21
# [ "", 2 ], # 22
# [ "", 2 ], # 23
# [ "", 2 ], # 24
# [ "", 2 ], # 25
# [ "", 2 ], # 26
# [ "", 2 ], # 27
# [ "", 2 ], # 28
# [ "", 2 ], # 29
# [ "", 2 ], # 2A
# [ "", 2 ], # 2B
# [ "", 2 ], # 2C
# [ "", 2 ], # 2D
# [ "", 2 ], # 2E
# [ "", 2 ], # 2F
#
# [ "", 2 ], # 20
# [ "", 2 ], # 21
# [ "", 2 ], # 22
# [ "", 2 ], # 23
# [ "", 2 ], # 24
# [ "", 2 ], # 25
# [ "", 2 ], # 26
# [ "", 2 ], # 27
# [ "", 2 ], # 28
# [ "", 2 ], # 29
# [ "", 2 ], # 2A
# [ "", 2 ], # 2B
# [ "", 2 ], # 2C
# [ "", 2 ], # 2D
# [ "", 2 ], # 2E
# [ "", 2 ], # 2F
#
# [ "", 2 ], # 20
# [ "", 2 ], # 21
# [ "", 2 ], # 22
# [ "", 2 ], # 23
# [ "", 2 ], # 24
# [ "", 2 ], # 25
# [ "", 2 ], # 26
# [ "", 2 ], # 27
# [ "", 2 ], # 28
# [ "", 2 ], # 29
# [ "", 2 ], # 2A
# [ "", 2 ], # 2B
# [ "", 2 ], # 2C
# [ "", 2 ], # 2D
# [ "", 2 ], # 2E
# [ "", 2 ], # 2F
#
# [ "", 2 ], # 20
# [ "", 2 ], # 21
# [ "", 2 ], # 22
# [ "", 2 ], # 23
# [ "", 2 ], # 24
# [ "", 2 ], # 25
# [ "", 2 ], # 26
# [ "", 2 ], # 27
# [ "", 2 ], # 28
# [ "", 2 ], # 29
# [ "", 2 ], # 2A
# [ "", 2 ], # 2B
# [ "", 2 ], # 2C
# [ "", 2 ], # 2D
# [ "", 2 ], # 2E
# [ "", 2 ], # 2F
#
# [ "", 2 ], # 20
# [ "", 2 ], # 21
# [ "", 2 ], # 22
# [ "", 2 ], # 23
# [ "", 2 ], # 24
# [ "", 2 ], # 25
# [ "", 2 ], # 26
# [ "", 2 ], # 27
# [ "", 2 ], # 28
# [ "", 2 ], # 29
# [ "", 2 ], # 2A
# [ "", 2 ], # 2B
# [ "", 2 ], # 2C
# [ "", 2 ], # 2D
# [ "", 2 ], # 2E
# [ "", 2 ], # 2F
#
# [ "", 2 ], # 20
# [ "", 2 ], # 21
# [ "", 2 ], # 22
# [ "", 2 ], # 23
# [ "", 2 ], # 24
# [ "", 2 ], # 25
# [ "", 2 ], # 26
# [ "", 2 ], # 27
# [ "", 2 ], # 28
# [ "", 2 ], # 29
# [ "", 2 ], # 2A
# [ "", 2 ], # 2B
# [ "", 2 ], # 2C
# [ "", 2 ], # 2D
# [ "", 2 ], # 2E
# [ "", 2 ], # 2F
#
# [ "", 2 ], # 20
# [ "", 2 ], # 21
# [ "", 2 ], # 22
# [ "", 2 ], # 23
# [ "", 2 ], # 24
# [ "", 2 ], # 25
# [ "", 2 ], # 26
# [ "", 2 ], # 27
# [ "", 2 ], # 28
# [ "", 2 ], # 29
# [ "", 2 ], # 2A
# [ "", 2 ], # 2B
# [ "", 2 ], # 2C
# [ "", 2 ], # 2D
# [ "", 2 ], # 2E
# [ "", 2 ], # 2F
#
# [ "", 2 ], # 20
# [ "", 2 ], # 21
# [ "", 2 ], # 22
# [ "", 2 ], # 23
# [ "", 2 ], # 24
# [ "", 2 ], # 25
# [ "", 2 ], # 26
# [ "", 2 ], # 27
# [ "", 2 ], # 28
# [ "", 2 ], # 29
# [ "", 2 ], # 2A
# [ "", 2 ], # 2B
# [ "", 2 ], # 2C
# [ "", 2 ], # 2D
# [ "", 2 ], # 2E
# [ "", 2 ], # 2F
#
# [ "", 2 ], # 20
# [ "", 2 ], # 21
# [ "", 2 ], # 22
# [ "", 2 ], # 23
# [ "", 2 ], # 24
# [ "", 2 ], # 25
# [ "", 2 ], # 26
# [ "", 2 ], # 27
# [ "", 2 ], # 28
# [ "", 2 ], # 29
# [ "", 2 ], # 2A
# [ "", 2 ], # 2B
# [ "", 2 ], # 2C
# [ "", 2 ], # 2D
# [ "", 2 ], # 2E
# [ "", 2 ], # 2F
#
# [ "", 2 ], # 20
# [ "", 2 ], # 21
# [ "", 2 ], # 22
# [ "", 2 ], # 23
# [ "", 2 ], # 24
# [ "", 2 ], # 25
# [ "", 2 ], # 26
# [ "", 2 ], # 27
# [ "", 2 ], # 28
# [ "", 2 ], # 29
# [ "", 2 ], # 2A
# [ "", 2 ], # 2B
# [ "", 2 ], # 2C
# [ "", 2 ], # 2D
# [ "", 2 ], # 2E
# [ "", 2 ], # 2F
#
# [ "", 2 ], # 20
# [ "", 2 ], # 21
# [ "", 2 ], # 22
# [ "", 2 ], # 23
# [ "", 2 ], # 24
# [ "", 2 ], # 25
# [ "", 2 ], # 26
# [ "", 2 ], # 27
# [ "", 2 ], # 28
# [ "", 2 ], # 29
# [ "", 2 ], # 2A
# [ "", 2 ], # 2B
# [ "", 2 ], # 2C
# [ "", 2 ], # 2D
# [ "", 2 ], # 2E
# [ "", 2 ], # 2F
#
# [ "", 2 ], # 20
# [ "", 2 ], # 21
# [ "", 2 ], # 22
# [ "", 2 ], # 23
# [ "", 2 ], # 24
# [ "", 2 ], # 25
# [ "", 2 ], # 26
# [ "", 2 ], # 27
# [ "", 2 ], # 28
# [ "", 2 ], # 29
# [ "", 2 ], # 2A
# [ "", 2 ], # 2B
# [ "", 2 ], # 2C
# [ "", 2 ], # 2D
# [ "", 2 ], # 2E
# [ "", 2 ], # 2F
#
# [ "", 2 ], # 20
# [ "", 2 ], # 21
# [ "", 2 ], # 22
# [ "", 2 ], # 23
# [ "", 2 ], # 24
# [ "", 2 ], # 25
# [ "", 2 ], # 26
# [ "", 2 ], # 27
# [ "", 2 ], # 28
# [ "", 2 ], # 29
# [ "", 2 ], # 2A
# [ "", 2 ], # 2B
# [ "", 2 ], # 2C
# [ "", 2 ], # 2D
# [ "", 2 ], # 2E
# [ "", 2 ], # 2F
#
# [ "", 2 ], # 20
# [ "", 2 ], # 21
# [ "", 2 ], # 22
# [ "", 2 ], # 23
# [ "", 2 ], # 24
# [ "", 2 ], # 25
# [ "", 2 ], # 26
# [ "", 2 ], # 27
# [ "", 2 ], # 28
# [ "", 2 ], # 29
# [ "", 2 ], # 2A
# [ "", 2 ], # 2B
# [ "", 2 ], # 2C
# [ "", 2 ], # 2D
# [ "", 2 ], # 2E
# [ "", 2 ], # FF
#]
#