Fixed for Z80.

This commit is contained in:
Jeff Tranter 2018-09-09 18:07:30 -04:00
parent f41e99dfa7
commit c5302b630a
2 changed files with 63 additions and 63 deletions

View File

@ -168,7 +168,7 @@ opcodeTable = {
0x20 : [ 3, "jb", "bit,offset" ],
0x21 : [ 2, "ajmp", "addr11" ],
0x22 : [ 1, "ret", "" ],
0x22 : [ 1, "ret", "" ],
0x23 : [ 1, "rl", "a" ],
0x24 : [ 2, "add", "a,immed" ],
0x25 : [ 2, "add", "a,direct" ],

124
z80.py
View File

@ -217,7 +217,7 @@ addressModeTable = {
"indhl,e" : "(hl),e",
"indhl,h" : "(hl),h",
"indhl,l" : "(hl),l",
"indhl,n" : "(hl),(${0:02X})",
"indhl,n" : "(hl),${0:02X}",
"indix+d" : "(ix+${0:02X})",
"indix+d,a" : "(ix+${0:02X}),a",
"indiy+d,a" : "(iy+${0:02X}),a",
@ -512,69 +512,69 @@ opcodeTable = {
0xbe : [ 1, "cp", "indhl" ],
0xbf : [ 1, "cp", "a" ],
0xc0 : [ 1, "ret", "nz" ],
0xc1 : [ 1, "pop", "bc" ],
0xc2 : [ 3, "jp", "nz,nn" ],
0xc3 : [ 3, "jp", "nn" ],
0xc4 : [ 3, "call","nz,nn" ],
0xc5 : [ 1, "push","bc" ],
0xc6 : [ 2, "ada", "a,n" ],
0xc7 : [ 1, "rst", "00" ],
0xc8 : [ 1, "ret", "z" ],
0xc9 : [ 1, "ret", "implied" ],
0xca : [ 3, "jp", "z,nn" ],
0xcc : [ 3, "call","z,nn" ],
0xcd : [ 3, "call", "nn" ],
0xce : [ 2, "adc", "a,n" ],
0xcf : [ 1, "rst", "08" ],
0xc0 : [ 1, "ret", "nz" ],
0xc1 : [ 1, "pop", "bc" ],
0xc2 : [ 3, "jp", "nz,nn" ],
0xc3 : [ 3, "jp", "nn" ],
0xc4 : [ 3, "call","nz,nn" ],
0xc5 : [ 1, "push","bc" ],
0xc6 : [ 2, "add", "a,n" ],
0xc7 : [ 1, "rst", "00" ],
0xc8 : [ 1, "ret", "z" ],
0xc9 : [ 1, "ret", "implied" ],
0xca : [ 3, "jp", "z,nn" ],
0xcc : [ 3, "call","z,nn" ],
0xcd : [ 3, "call", "nn" ],
0xce : [ 2, "adc", "a,n" ],
0xcf : [ 1, "rst", "08" ],
0xd0 : [ 1, "ret", "nc" ],
0xd1 : [ 1, "pop", "de" ],
0xd2 : [ 3, "jp", "nc,nn" ],
0xd0 : [ 1, "ret", "nc" ],
0xd1 : [ 1, "pop", "de" ],
0xd2 : [ 3, "jp", "nc,nn" ],
0xd3 : [ 2, "out", "indn,a" ],
0xd4 : [ 3, "call", "nc,nn" ],
0xd5 : [ 1, "push", "de" ],
0xd6 : [ 2, "sub", "n" ],
0xd7 : [ 1, "rst", "10" ],
0xd8 : [ 1, "ret", "c" ],
0xd9 : [ 1, "exx", "implied" ],
0xda : [ 3, "jp", "c,nn" ],
0xd4 : [ 3, "call", "nc,nn" ],
0xd5 : [ 1, "push", "de" ],
0xd6 : [ 2, "sub", "n" ],
0xd7 : [ 1, "rst", "10" ],
0xd8 : [ 1, "ret", "c" ],
0xd9 : [ 1, "exx", "implied" ],
0xda : [ 3, "jp", "c,nn" ],
0xdb : [ 2, "in", "a,indn" ],
0xdc : [ 3, "call", "c,nn" ],
0xde : [ 2, "sbc", "a,n" ],
0xdf : [ 1, "rst", "18" ],
0xdc : [ 3, "call", "c,nn" ],
0xde : [ 2, "sbc", "a,n" ],
0xdf : [ 1, "rst", "18" ],
0xe0 : [ 1, "ret", "po" ],
0xe1 : [ 1, "pop", "hl" ],
0xe2 : [ 3, "jp", "po,nn" ],
0xe3 : [ 1, "ex", "indsp,hl" ],
0xe4 : [ 3, "call", "po,nn" ],
0xe5 : [ 1, "push", "hl" ],
0xe6 : [ 2, "and", "n" ],
0xe7 : [ 1, "rst", "20" ],
0xe8 : [ 1, "ret", "pe" ],
0xe9 : [ 1, "jp", "indhl" ],
0xea : [ 3, "jp", "pe,nn" ],
0xeb : [ 1, "ex", "de,hl" ],
0xec : [ 3, "call", "pe,nn" ],
0xee : [ 2, "xor", "n" ],
0xef : [ 1, "rst", "28" ],
0xe0 : [ 1, "ret", "po" ],
0xe1 : [ 1, "pop", "hl" ],
0xe2 : [ 3, "jp", "po,nn" ],
0xe3 : [ 1, "ex", "indsp,hl" ],
0xe4 : [ 3, "call", "po,nn" ],
0xe5 : [ 1, "push", "hl" ],
0xe6 : [ 2, "and", "n" ],
0xe7 : [ 1, "rst", "20" ],
0xe8 : [ 1, "ret", "pe" ],
0xe9 : [ 1, "jp", "indhl" ],
0xea : [ 3, "jp", "pe,nn" ],
0xeb : [ 1, "ex", "de,hl" ],
0xec : [ 3, "call", "pe,nn" ],
0xee : [ 2, "xor", "n" ],
0xef : [ 1, "rst", "28" ],
0xf0 : [ 1, "ret", "p" ],
0xf1 : [ 1, "pop", "af" ],
0xf2 : [ 3, "jp", "p,nn" ],
0xf3 : [ 1, "di", "implied" ],
0xf4 : [ 3, "call", "p,nn" ],
0xf5 : [ 1, "push", "af" ],
0xf6 : [ 2, "or", "n" ],
0xf7 : [ 1, "rst", "30" ],
0xf8 : [ 1, "ret", "m" ],
0xf9 : [ 1, "ld", "sp,hl" ],
0xfa : [ 3, "jp", "m,nn" ],
0xfb : [ 1, "ei", "implied" ],
0xfc : [ 3, "call", "m,nn" ],
0xfe : [ 2, "cp", "n" ],
0xff : [ 1, "rst", "38" ],
0xf0 : [ 1, "ret", "p" ],
0xf1 : [ 1, "pop", "af" ],
0xf2 : [ 3, "jp", "p,nn" ],
0xf3 : [ 1, "di", "implied" ],
0xf4 : [ 3, "call", "p,nn" ],
0xf5 : [ 1, "push", "af" ],
0xf6 : [ 2, "or", "n" ],
0xf7 : [ 1, "rst", "30" ],
0xf8 : [ 1, "ret", "m" ],
0xf9 : [ 1, "ld", "sp,hl" ],
0xfa : [ 3, "jp", "m,nn" ],
0xfb : [ 1, "ei", "implied" ],
0xfc : [ 3, "call", "m,nn" ],
0xfe : [ 2, "cp", "n" ],
0xff : [ 1, "rst", "38" ],
# Multibyte instructions
@ -755,7 +755,7 @@ opcodeTable = {
0xcbac : [ 2, "res", "5,h" ],
0xcbad : [ 2, "res", "5,l" ],
0xcbae : [ 2, "res", "5,indhl" ],
0xcbaf : [ 2, "res", "a,b" ],
0xcbaf : [ 2, "res", "5,a" ],
0xcbb0 : [ 2, "res", "6,b" ],
0xcbb1 : [ 2, "res", "6,c" ],
@ -998,10 +998,10 @@ def extra_opcodes(addr_table, op_table):
# groups of 8, expand to full 256
mnemonics_8 = ['rlc', 'rrc', 'rl', 'rr', 'sla', 'sra', 'sll', 'sr1'] + ['bit'] * 8 + ['res'] * 8 + ['set'] * 8
mnemonics = [m for mnemonic in mnemonics_8 for m in [mnemonic]*8]
# create all 256 addressing modes, in groups of 64
addrmodes = ['indi%s+d' + a for a in [',b', ',c', ',d', ',e', ',h', ',l', '', ',a']] * 8 + [f % d for d in range(8) for f in ['%d,indi%%s+d'] * 8] + [f % d for d in range(8) for f in ['%d,indi%%s+d' + a for a in [',b', ',c', ',d', ',e', ',h', ',l', '', ',a']]] * 2
for fourth_byte, (instruction, addrmode) in enumerate(zip(mnemonics, addrmodes)):
opcode = (first_byte << 24) + (0xcb << 16) + fourth_byte
op_table[opcode] = [ 4, instruction, addrmode % x_or_y, z80bit ]