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Fixed for Z80.
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parent
f41e99dfa7
commit
c5302b630a
6
z80.py
6
z80.py
@ -217,7 +217,7 @@ addressModeTable = {
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"indhl,e" : "(hl),e",
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"indhl,h" : "(hl),h",
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"indhl,l" : "(hl),l",
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"indhl,n" : "(hl),(${0:02X})",
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"indhl,n" : "(hl),${0:02X}",
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"indix+d" : "(ix+${0:02X})",
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"indix+d,a" : "(ix+${0:02X}),a",
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"indiy+d,a" : "(iy+${0:02X}),a",
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@ -518,7 +518,7 @@ opcodeTable = {
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0xc3 : [ 3, "jp", "nn" ],
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0xc4 : [ 3, "call","nz,nn" ],
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0xc5 : [ 1, "push","bc" ],
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0xc6 : [ 2, "ada", "a,n" ],
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0xc6 : [ 2, "add", "a,n" ],
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0xc7 : [ 1, "rst", "00" ],
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0xc8 : [ 1, "ret", "z" ],
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0xc9 : [ 1, "ret", "implied" ],
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@ -755,7 +755,7 @@ opcodeTable = {
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0xcbac : [ 2, "res", "5,h" ],
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0xcbad : [ 2, "res", "5,l" ],
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0xcbae : [ 2, "res", "5,indhl" ],
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0xcbaf : [ 2, "res", "a,b" ],
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0xcbaf : [ 2, "res", "5,a" ],
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0xcbb0 : [ 2, "res", "6,b" ],
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0xcbb1 : [ 2, "res", "6,c" ],
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