From c924ce0fc289ce6db6bf8137928d2de8238a4311 Mon Sep 17 00:00:00 2001
From: Rob McMullen <feedback@playermissile.com>
Date: Mon, 29 Feb 2016 10:50:48 -0800
Subject: [PATCH] z80: added z80bit flag to generated ddcb and fdcb 4 byte
 instructions

---
 udis.py | 2 +-
 z80.py  | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/udis.py b/udis.py
index 0c34b9e..8e3aa0c 100755
--- a/udis.py
+++ b/udis.py
@@ -199,7 +199,7 @@ while True:
             if flags & 4 == z80bit:
                 opcode = (opcode << 16) + op[2]
                 # reread opcode table for real format string
-                length, mnemonic, mode = opcodeTable[opcode]
+                length, mnemonic, mode, flags = opcodeTable[opcode]
                 format = addressModeTable[mode]
                 operand = format.format(op[1])
             else:
diff --git a/z80.py b/z80.py
index 5b5b4ac..86d8970 100644
--- a/z80.py
+++ b/z80.py
@@ -1005,7 +1005,7 @@ def extra_opcodes(addr_table, op_table):
         
         for fourth_byte, (instruction, addrmode) in enumerate(zip(mnemonics, addrmodes)):
             opcode = (first_byte << 24) + (0xcb << 16) + fourth_byte
-            op_table[opcode] = [ 4, instruction, addrmode % x_or_y ]
+            op_table[opcode] = [ 4, instruction, addrmode % x_or_y, z80bit ]
 extra_opcodes(addressModeTable, opcodeTable)
 del extra_opcodes