From d4f4f901a7da38c8848583d68eeda2f963086043 Mon Sep 17 00:00:00 2001 From: Rob McMullen Date: Sat, 27 Feb 2016 17:30:48 -0800 Subject: [PATCH] z80: Added placeholder instructions and address modes for ddcb and fdcb instructions --- z80.py | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/z80.py b/z80.py index 0f70504..bf43280 100644 --- a/z80.py +++ b/z80.py @@ -297,6 +297,7 @@ addressModeTable = { "z" : "z", "z,pcr" : "z,${0:04X}", "z,nn" : "z,${1:02X}{0:02X}", +"bit" : "${0:02X},${1:02X}", } @@ -882,7 +883,7 @@ opcodeTable = { # The below are a set of instructions that all start with 0xddcb. They # are not supported yet. -0xddcb : [ 4, "unimplemented", "implied" ], +0xddcb : [ 4, "ixbit", "bit" ], 0xed40 : [ 2, "in", "b,indc" ], 0xed41 : [ 2, "out", "indc,b" ], @@ -978,7 +979,7 @@ opcodeTable = { # The below are a set of instructions that all start with 0xfdcb. They # are not supported yet. -0xfdcb : [ 4, "unimplemented", "implied" ], +0xfdcb : [ 4, "iybit", "bit" ], }