mirror of https://github.com/jefftranter/udis.git
1011 lines
32 KiB
Python
1011 lines
32 KiB
Python
##########################################################################
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#
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# Processor specific code
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# CPU = "Z80"
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# Description = "Zilog 8-bit microprocessor."
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# DataWidth = 8 # 8-bit data
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# AddressWidth = 16 # 16-bit addresses
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# Maximum length of an instruction (for formatting purposes)
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maxLength = 4
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# Leadin bytes for multibyte instructions
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leadInBytes = [0xcb, 0xdd, 0xed, 0xfd]
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# Addressing mode table
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# List of addressing modes and corresponding format strings for operands.
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addressModeTable = {
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"implied" : "",
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"0" : "0",
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"0,a" : "0,a",
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"0,b" : "0,b",
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"0,c" : "0,c",
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"0,d" : "0,d",
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"0,e" : "0,e",
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"0,h" : "0,h",
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"0,indhl" : "0,(hl)",
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"0,l" : "0,l",
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"00" : "$00",
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"08" : "$08",
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"1" : "1",
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"1,a" : "1,a",
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"1,b" : "1,b",
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"1,c" : "1,c",
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"1,d" : "1,d",
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"1,e" : "1,e",
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"1,h" : "1,h",
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"1,indhl" : "1,(hl)",
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"1,l" : "1,l",
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"10" : "$10",
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"18" : "$18",
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"2" : "2",
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"2,a" : "2,a",
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"2,b" : "2,b",
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"2,c" : "2,c",
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"2,d" : "2,d",
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"2,e" : "2,e",
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"2,h" : "2,h",
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"2,indhl" : "2,(hl)",
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"2,l" : "2,l",
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"20" : "$20",
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"28" : "$28",
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"3,a" : "3,a",
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"3,b" : "3,b",
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"3,c" : "3,c",
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"3,d" : "3,d",
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"3,e" : "3,e",
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"3,h" : "3,h",
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"3,indhl" : "3,(hl)",
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"3,l" : "3,l",
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"30" : "$30",
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"38" : "$38",
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"4,a" : "4,a",
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"4,b" : "4,b",
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"4,c" : "4,c",
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"4,d" : "4,d",
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"4,e" : "4,e",
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"4,h" : "4,h",
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"4,indhl" : "4,(hl)",
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"4,l" : "4,l",
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"5,a" : "5,a",
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"5,b" : "5,b",
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"5,c" : "5,c",
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"5,d" : "5,d",
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"5,e" : "5,e",
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"5,h" : "5,h",
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"5,indhl" : "5,(hl)",
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"5,l" : "5,l",
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"6,a" : "6,a",
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"6,b" : "6,b",
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"6,c" : "6,c",
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"6,d" : "6,d",
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"6,e" : "6,e",
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"6,h" : "6,h",
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"6,indhl" : "6,(hl)",
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"6,l" : "6,l",
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"7,a" : "7,a",
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"7,b" : "7,b",
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"7,c" : "7,c",
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"7,d" : "7,d",
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"7,e" : "7,e",
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"7,h" : "7,h",
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"7,indhl" : "7,(hl)",
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"7,l" : "7,l",
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"a" : "a",
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"a,a" : "a,a",
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"a,b" : "a,b",
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"a,c" : "a,c",
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"a,d" : "a,d",
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"a,e" : "a,e",
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"a,h" : "a,h",
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"a,i" : "a,i",
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"a,indbc" : "a,(bc)",
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"a,indc" : "a,(c)",
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"a,indde" : "a,(de)",
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"a,indhl" : "a,(hl)",
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"a,indix+d" : "a,(ix+${0:02X})",
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"a,indiy+d" : "a,(iy+${0:02X})",
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"a,indn" : "a,(${0:02X})",
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"a,indnn" : "a,(${1:02X}{0:02X})",
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"a,l" : "a,l",
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"a,n" : "a,${0:02X}",
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"a,r" : "a,r",
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"af" : "af",
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"af,af'" : "af,af'",
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"b" : "b",
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"b,a" : "b,a",
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"b,b" : "b,b",
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"b,c" : "b,c",
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"b,d" : "b,d",
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"b,e" : "b,e",
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"b,h" : "b,h",
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"b,indc" : "b,(c)",
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"b,indhl" : "b,(hl)",
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"b,indix+d" : "b,(ix+${0:02X})",
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"b,indiy+d" : "b,(iy+${0:02X})",
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"b,l" : "b,l",
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"b,n" : "b,${0:02X}",
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"bc" : "bc",
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"bc,indaa" : "bc,(${1:02X}{0:02X})",
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"bc,nn" : "bc,${1:02X}{0:02X}",
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"c" : "c",
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"c,a" : "c,a",
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"c,b" : "c,b",
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"c,c" : "c,c",
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"c,d" : "c,d",
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"c,e" : "c,e",
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"c,h" : "c,h",
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"c,indc" : "c,(c)",
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"c,indhl" : "c,(hl)",
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"c,indix+d" : "c,(ix+${0:02X})",
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"c,indiy+d" : "c,(iy+${0:02X})",
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"c,l" : "c,l",
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"c,n" : "c,${0:02X}",
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"c,pcr" : "c,${0:04X}",
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"c,nn" : "c,${1:02X}{0:02X}",
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"d" : "d",
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"d,a" : "d,a",
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"d,b" : "d,b",
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"d,c" : "d,c",
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"d,d" : "d,d",
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"d,e" : "d,e",
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"d,h" : "d,h",
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"d,indc" : "d,(c)",
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"d,indhl" : "d,(hl)",
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"d,indix+d" : "d,(ix+${0:02X})",
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"d,indiy+d" : "d,(iy+${0:02X})",
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"d,l" : "d,l",
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"d,n" : "d,${0:02X}",
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"de" : "de",
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"de,hl" : "de,hl",
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"de,indaa" : "de,(${1:02X}{0:02X})",
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"de,nn" : "de,${1:02X}{0:02X}",
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"e" : "e",
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"e,a" : "e,a",
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"e,b" : "e,b",
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"e,c" : "e,c",
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"e,d" : "e,d",
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"e,e" : "e,e",
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"e,h" : "e,h",
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"e,indc" : "e,(c)",
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"e,indhl" : "e,(hl)",
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"e,indix+d" : "e,(ix+${0:02X})",
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"e,indiy+d" : "e,(iy+${0:02X})",
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"e,l" : "e,l",
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"e,n" : "e,${0:02X}",
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"h" : "h",
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"h,a" : "h,a",
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"h,b" : "h,b",
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"h,c" : "h,c",
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"h,d" : "h,d",
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"h,e" : "h,e",
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"h,h" : "h,h",
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"h,indc" : "h,(c)",
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"h,indhl" : "h,(hl)",
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"h,indix+d" : "h,(ix+${0:02X})",
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"h,indiy+d" : "h,(iy+${0:02X})",
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"h,l" : "h,l",
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"h,n" : "h,${0:02X}",
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"hl" : "hl",
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"hl,bc" : "hl,bc",
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"hl,de" : "hl,de",
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"hl,hl" : "hl,hl",
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"hl,indnn" : "hl,(${1:02X}{0:02X})",
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"hl,nn" : "hl,${1:02X}{0:02X}",
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"hl,sp" : "hl,sp",
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"i,a" : "i,a",
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"indaa,bc" : "(${1:02X}{0:02X}),bc",
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"indaa,de" : "(${1:02X}{0:02X}),de",
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"indaa,ix" : "(${1:02X}{0:02X}),ix",
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"indaa,iy" : "(${1:02X}{0:02X}),iy",
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"indaa,sp" : "(${1:02X}{0:02X}),sp",
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"indbc,a" : "(bc),a",
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"indc,a" : "(c),a",
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"indc,b" : "(c),b",
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"indc,c" : "(c),c",
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"indc,d" : "(c),d",
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"indc,e" : "(c),e",
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"indc,h" : "(c),h",
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"indc,l" : "(c),l",
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"indde,a" : "(de),a",
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"indhl" : "(hl)",
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"indhl,a" : "(hl),a",
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"indhl,b" : "(hl),b",
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"indhl,c" : "(hl),c",
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"indhl,d" : "(hl),d",
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"indhl,e" : "(hl),e",
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"indhl,h" : "(hl),h",
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"indhl,l" : "(hl),l",
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"indhl,n" : "(hl),${0:02X}",
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"indix+d" : "(ix+${0:02X})",
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"indix+d,a" : "(ix+${0:02X}),a",
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"indiy+d,a" : "(iy+${0:02X}),a",
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"indix+d,b" : "(ix+${0:02X}),b",
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"indix+d,c" : "(ix+${0:02X}),c",
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"indix+d,d" : "(ix+${0:02X}),d",
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"indix+d,e" : "(ix+${0:02X}),e",
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"indix+d,h" : "(ix+${0:02X}),h",
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"indix+d,l" : "(ix+${0:02X}),l",
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"indix+d,n" : "(ix+${0:02X}),${1:02X}",
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"indiy+d" : "(iy+${0:02X})",
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"indiy+d,b" : "(iy+${0:02X}),b",
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"indiy+d,c" : "(iy+${0:02X}),c",
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"indiy+d,d" : "(iy+${0:02X}),d",
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"indiy+d,e" : "(iy+${0:02X}),e",
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"indiy+d,h" : "(iy+${0:02X}),h",
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"indiy+d,l" : "(iy+${0:02X}),l",
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"indiy+d,n" : "(iy+${0:02X}),${1:02X}",
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"indn,a" : "(${0:02X}),a",
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"indnn,a" : "(${1:02X}{0:02X}),a",
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"indnn,hl" : "(${1:02X}{0:02X}),hl",
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"indsp,hl" : "(sp),hl",
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"ix" : "ix",
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"ix,aa" : "ix,${1:02X}{0:02X}",
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"ix,bc" : "ix,bc",
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"ix,de" : "ix,de",
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"ix,indaa" : "ix,(${1:02X}{0:02X})",
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"ix,ix" : "ix,ix",
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"ix,sp" : "ix,sp",
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"iy" : "iy",
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"iy,aa" : "iy,${1:02X}{0:02X}",
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"iy,bc" : "iy,bc",
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"iy,bc" : "iy,bc",
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"iy,de" : "iy,de",
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"iy,indaa" : "iy,(${1:02X}{0:02X})",
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"iy,indaa" : "iy,(${1:02X}{0:02X})",
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"iy,iy" : "iy,iy",
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"iy,sp" : "iy,sp",
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"l" : "l",
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"l,a" : "l,a",
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"l,b" : "l,b",
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"l,c" : "l,c",
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"l,d" : "l,d",
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"l,e" : "l,e",
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"l,h" : "l,h",
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"l,indc" : "l,(c)",
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"l,indhl" : "l,(hl)",
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"l,indix+d" : "l,(ix+${0:02X})",
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"l,indiy+d" : "l,(iy+${0:02X})",
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"l,l" : "l,l",
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"l,n" : "l,${0:02X}",
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"m" : "m",
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"m,nn" : "m,${1:02X}{0:02X}",
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"n" : "${0:02X}",
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"n,pcr" : "${0:04X}",
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"n,indix+d" : "n,(ix+${0:02X})",
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"n,indiy+d" : "n,(iy+${0:02X})",
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"nc" : "nc",
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"nc,pcr" : "nc,${0:04X}",
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"nc,nn" : "nc,${1:02X}{0:02X}",
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"nn" : "${1:02X}{0:02X}",
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"nz" : "nz",
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"nz,pcr" : "nz,${0:04X}",
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"nz,nn" : "nz,${1:02X}{0:02X}",
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"p" : "p",
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"p,nn" : "p,${1:02X}{0:02X}",
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"pcr" : "${0:04X}",
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"pe" : "pe",
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"pe,nn" : "pe,${1:02X}{0:02X}",
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"po" : "po",
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"po,nn" : "po,${1:02X}{0:02X}",
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"r,a" : "r,a",
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"sp" : "sp",
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"sp,hl" : "sp,hl",
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"sp,indaa" : "sp,(${1:02X}{0:02X})",
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"sp,nn" : "sp,${1:02X}{0:02X}",
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"z" : "z",
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"z,pcr" : "z,${0:04X}",
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"z,nn" : "z,${1:02X}{0:02X}",
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}
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# Op Code Table
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# Key is numeric opcode (possibly multiple bytes)
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# Value is a list:
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# # bytes
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# mnemonic
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# addressing mode
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# flags (e.g. pcr)
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opcodeTable = {
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0x00 : [ 1, "nop", "implied" ],
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0x01 : [ 3, "ld", "bc,nn" ],
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0x02 : [ 1, "ld", "indbc,a" ],
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0x03 : [ 1, "inc", "bc" ],
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0x04 : [ 1, "inc", "b" ],
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0x05 : [ 1, "dec", "b" ],
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0x06 : [ 2, "ld", "b,n" ],
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0x07 : [ 1, "rlca", "implied" ],
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0x08 : [ 1, "ex", "af,af'" ],
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0x09 : [ 1, "add", "hl,bc" ],
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0x0a : [ 1, "ld", "a,indbc" ],
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0x0b : [ 1, "dec", "bc" ],
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0x0c : [ 1, "inc", "c" ],
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0x0d : [ 1, "dec", "c" ],
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0x0e : [ 2, "ld", "c,n" ],
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0x0f : [ 1, "rrca", "implied" ],
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0x10 : [ 2, "djnz", "pcr", pcr ],
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0x11 : [ 3, "ld", "de,nn" ],
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0x12 : [ 1, "ld", "indde,a" ],
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0x13 : [ 1, "inc", "de" ],
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0x14 : [ 1, "inc", "d" ],
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0x15 : [ 1, "dec", "d" ],
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0x16 : [ 2, "ld", "d,n" ],
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0x17 : [ 1, "rla", "implied" ],
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0x18 : [ 2, "jr", "pcr", pcr ],
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0x19 : [ 1, "add", "hl,de" ],
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0x1a : [ 1, "ld", "a,indde" ],
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0x1b : [ 1, "dec", "de" ],
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0x1c : [ 1, "inc", "e" ],
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0x1d : [ 1, "dec", "e" ],
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0x1e : [ 2, "ld", "e,n" ],
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0x1f : [ 1, "rra", "implied" ],
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0x20 : [ 2, "jr", "nz,pcr", pcr ],
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0x21 : [ 3, "ld", "hl,nn" ],
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0x22 : [ 3, "ld", "indnn,hl" ],
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0x23 : [ 1, "inc", "hl" ],
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0x24 : [ 1, "inc", "h" ],
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0x25 : [ 1, "dec", "h" ],
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0x26 : [ 2, "ld", "h,n" ],
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0x27 : [ 1, "daa", "implied" ],
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0x28 : [ 2, "jr", "z,pcr", pcr ],
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0x29 : [ 1, "add", "hl,hl" ],
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0x2a : [ 3, "ld", "hl,indnn" ],
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0x2b : [ 1, "dec", "hl" ],
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0x2c : [ 1, "inc", "l" ],
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0x2d : [ 1, "dec", "l" ],
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0x2e : [ 2, "ld", "l,n" ],
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0x2f : [ 1, "cpl", "implied" ],
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0x30 : [ 2, "jr", "nc,pcr", pcr ],
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0x31 : [ 3, "ld", "sp,nn" ],
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0x32 : [ 3, "ld", "indnn,a" ],
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0x33 : [ 1, "inc", "sp" ],
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0x34 : [ 1, "inc", "indhl" ],
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0x35 : [ 1, "dec", "indhl" ],
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0x36 : [ 2, "ld", "indhl,n" ],
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0x37 : [ 1, "scf", "implied" ],
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0x38 : [ 2, "jr", "c,pcr", pcr ],
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0x39 : [ 1, "add", "hl,sp" ],
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0x3a : [ 3, "ld", "a,indnn" ],
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0x3b : [ 1, "dec", "sp" ],
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0x3c : [ 1, "inc", "a" ],
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0x3d : [ 1, "dec", "a" ],
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0x3e : [ 2, "ld", "a,n" ],
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0x3f : [ 1, "ccf", "implied" ],
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0x40 : [ 1, "ld", "b,b" ],
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0x41 : [ 1, "ld", "b,c" ],
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0x42 : [ 1, "ld", "b,d" ],
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0x43 : [ 1, "ld", "b,e" ],
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0x44 : [ 1, "ld", "b,h" ],
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0x45 : [ 1, "ld", "b,l" ],
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0x46 : [ 1, "ld", "b,indhl" ],
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0x47 : [ 1, "ld", "b,a" ],
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0x48 : [ 1, "ld", "c,b" ],
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0x49 : [ 1, "ld", "c,c" ],
|
|
0x4a : [ 1, "ld", "c,d" ],
|
|
0x4b : [ 1, "ld", "c,e" ],
|
|
0x4c : [ 1, "ld", "c,h" ],
|
|
0x4d : [ 1, "ld", "c,l" ],
|
|
0x4e : [ 1, "ld", "c,indhl" ],
|
|
0x4f : [ 1, "ld", "c,a" ],
|
|
|
|
0x50 : [ 1, "ld", "d,b" ],
|
|
0x51 : [ 1, "ld", "d,c" ],
|
|
0x52 : [ 1, "ld", "d,d" ],
|
|
0x53 : [ 1, "ld", "d,e" ],
|
|
0x54 : [ 1, "ld", "d,h" ],
|
|
0x55 : [ 1, "ld", "d,l" ],
|
|
0x56 : [ 1, "ld", "d,indhl" ],
|
|
0x57 : [ 1, "ld", "d,a" ],
|
|
0x58 : [ 1, "ld", "e,b" ],
|
|
0x59 : [ 1, "ld", "e,c" ],
|
|
0x5a : [ 1, "ld", "e,d" ],
|
|
0x5b : [ 1, "ld", "e,e" ],
|
|
0x5c : [ 1, "ld", "e,h" ],
|
|
0x5d : [ 1, "ld", "e,l" ],
|
|
0x5e : [ 1, "ld", "e,indhl" ],
|
|
0x5f : [ 1, "ld", "e,a" ],
|
|
|
|
0x60 : [ 1, "ld", "h,b" ],
|
|
0x61 : [ 1, "ld", "h,c" ],
|
|
0x62 : [ 1, "ld", "h,d" ],
|
|
0x63 : [ 1, "ld", "h,e" ],
|
|
0x64 : [ 1, "ld", "h,h" ],
|
|
0x65 : [ 1, "ld", "h,l" ],
|
|
0x66 : [ 1, "ld", "h,indhl" ],
|
|
0x67 : [ 1, "ld", "h,a" ],
|
|
0x68 : [ 1, "ld", "l,b" ],
|
|
0x69 : [ 1, "ld", "l,c" ],
|
|
0x6a : [ 1, "ld", "l,d" ],
|
|
0x6b : [ 1, "ld", "l,e" ],
|
|
0x6c : [ 1, "ld", "l,h" ],
|
|
0x6d : [ 1, "ld", "l,l" ],
|
|
0x6e : [ 1, "ld", "l,indhl" ],
|
|
0x6f : [ 1, "ld", "l,a" ],
|
|
|
|
0x70 : [ 1, "ld", "indhl,b" ],
|
|
0x71 : [ 1, "ld", "indhl,c" ],
|
|
0x72 : [ 1, "ld", "indhl,d" ],
|
|
0x73 : [ 1, "ld", "indhl,e" ],
|
|
0x74 : [ 1, "ld", "indhl,h" ],
|
|
0x75 : [ 1, "ld", "indhl,l" ],
|
|
0x76 : [ 1, "halt", "implied" ],
|
|
0x77 : [ 1, "ld", "indhl,a" ],
|
|
0x78 : [ 1, "ld", "a,b" ],
|
|
0x79 : [ 1, "ld", "a,c" ],
|
|
0x7a : [ 1, "ld", "a,d" ],
|
|
0x7b : [ 1, "ld", "a,e" ],
|
|
0x7c : [ 1, "ld", "a,h" ],
|
|
0x7d : [ 1, "ld", "a,l" ],
|
|
0x7e : [ 1, "ld", "a,indhl" ],
|
|
0x7f : [ 1, "ld", "a,a" ],
|
|
|
|
0x80 : [ 1, "add", "a,b" ],
|
|
0x81 : [ 1, "add", "a,c" ],
|
|
0x82 : [ 1, "add", "a,d" ],
|
|
0x83 : [ 1, "add", "a,e" ],
|
|
0x84 : [ 1, "add", "a,h" ],
|
|
0x85 : [ 1, "add", "a,l" ],
|
|
0x86 : [ 1, "add", "a,indhl" ],
|
|
0x87 : [ 1, "add", "a,a" ],
|
|
0x88 : [ 1, "adc", "a,b" ],
|
|
0x89 : [ 1, "adc", "a,c" ],
|
|
0x8a : [ 1, "adc", "a,d" ],
|
|
0x8b : [ 1, "adc", "a,e" ],
|
|
0x8c : [ 1, "adc", "a,h" ],
|
|
0x8d : [ 1, "adc", "a,l" ],
|
|
0x8e : [ 1, "adc", "a,indhl" ],
|
|
0x8f : [ 1, "adc", "a,a" ],
|
|
|
|
0x90 : [ 1, "sub", "b" ],
|
|
0x91 : [ 1, "sub", "c" ],
|
|
0x92 : [ 1, "sub", "d" ],
|
|
0x93 : [ 1, "sub", "e" ],
|
|
0x94 : [ 1, "sub", "h" ],
|
|
0x95 : [ 1, "sub", "l" ],
|
|
0x96 : [ 1, "sub", "indhl" ],
|
|
0x97 : [ 1, "sub", "a" ],
|
|
0x98 : [ 1, "sbc", "a,b" ],
|
|
0x99 : [ 1, "sbc", "a,c" ],
|
|
0x9a : [ 1, "sbc", "a,d" ],
|
|
0x9b : [ 1, "sbc", "a,e" ],
|
|
0x9c : [ 1, "sbc", "a,h" ],
|
|
0x9d : [ 1, "sbc", "a,l" ],
|
|
0x9e : [ 1, "sbc", "a,indhl" ],
|
|
0x9f : [ 1, "sbc", "a,a" ],
|
|
|
|
0xa0 : [ 1, "and", "b" ],
|
|
0xa1 : [ 1, "and", "c" ],
|
|
0xa2 : [ 1, "and", "d" ],
|
|
0xa3 : [ 1, "and", "e" ],
|
|
0xa4 : [ 1, "and", "h" ],
|
|
0xa5 : [ 1, "and", "l" ],
|
|
0xa6 : [ 1, "and", "indhl" ],
|
|
0xa7 : [ 1, "and", "a" ],
|
|
0xa8 : [ 1, "xor", "b" ],
|
|
0xa9 : [ 1, "xor", "c" ],
|
|
0xaa : [ 1, "xor", "d" ],
|
|
0xab : [ 1, "xor", "e" ],
|
|
0xac : [ 1, "xor", "h" ],
|
|
0xad : [ 1, "xor", "l" ],
|
|
0xae : [ 1, "xor", "indhl" ],
|
|
0xaf : [ 1, "xor", "a" ],
|
|
|
|
0xb0 : [ 1, "or", "b" ],
|
|
0xb1 : [ 1, "or", "c" ],
|
|
0xb2 : [ 1, "or", "d" ],
|
|
0xb3 : [ 1, "or", "e" ],
|
|
0xb4 : [ 1, "or", "h" ],
|
|
0xb5 : [ 1, "or", "l" ],
|
|
0xb6 : [ 1, "or", "indhl" ],
|
|
0xb7 : [ 1, "or", "a" ],
|
|
0xb8 : [ 1, "cp", "b" ],
|
|
0xb9 : [ 1, "cp", "c" ],
|
|
0xba : [ 1, "cp", "d" ],
|
|
0xbb : [ 1, "cp", "e" ],
|
|
0xbc : [ 1, "cp", "h" ],
|
|
0xbd : [ 1, "cp", "l" ],
|
|
0xbe : [ 1, "cp", "indhl" ],
|
|
0xbf : [ 1, "cp", "a" ],
|
|
|
|
0xc0 : [ 1, "ret", "nz" ],
|
|
0xc1 : [ 1, "pop", "bc" ],
|
|
0xc2 : [ 3, "jp", "nz,nn" ],
|
|
0xc3 : [ 3, "jp", "nn" ],
|
|
0xc4 : [ 3, "call","nz,nn" ],
|
|
0xc5 : [ 1, "push","bc" ],
|
|
0xc6 : [ 2, "add", "a,n" ],
|
|
0xc7 : [ 1, "rst", "00" ],
|
|
0xc8 : [ 1, "ret", "z" ],
|
|
0xc9 : [ 1, "ret", "implied" ],
|
|
0xca : [ 3, "jp", "z,nn" ],
|
|
0xcc : [ 3, "call","z,nn" ],
|
|
0xcd : [ 3, "call", "nn" ],
|
|
0xce : [ 2, "adc", "a,n" ],
|
|
0xcf : [ 1, "rst", "08" ],
|
|
|
|
0xd0 : [ 1, "ret", "nc" ],
|
|
0xd1 : [ 1, "pop", "de" ],
|
|
0xd2 : [ 3, "jp", "nc,nn" ],
|
|
0xd3 : [ 2, "out", "indn,a" ],
|
|
0xd4 : [ 3, "call", "nc,nn" ],
|
|
0xd5 : [ 1, "push", "de" ],
|
|
0xd6 : [ 2, "sub", "n" ],
|
|
0xd7 : [ 1, "rst", "10" ],
|
|
0xd8 : [ 1, "ret", "c" ],
|
|
0xd9 : [ 1, "exx", "implied" ],
|
|
0xda : [ 3, "jp", "c,nn" ],
|
|
0xdb : [ 2, "in", "a,indn" ],
|
|
0xdc : [ 3, "call", "c,nn" ],
|
|
0xde : [ 2, "sbc", "a,n" ],
|
|
0xdf : [ 1, "rst", "18" ],
|
|
|
|
0xe0 : [ 1, "ret", "po" ],
|
|
0xe1 : [ 1, "pop", "hl" ],
|
|
0xe2 : [ 3, "jp", "po,nn" ],
|
|
0xe3 : [ 1, "ex", "indsp,hl" ],
|
|
0xe4 : [ 3, "call", "po,nn" ],
|
|
0xe5 : [ 1, "push", "hl" ],
|
|
0xe6 : [ 2, "and", "n" ],
|
|
0xe7 : [ 1, "rst", "20" ],
|
|
0xe8 : [ 1, "ret", "pe" ],
|
|
0xe9 : [ 1, "jp", "indhl" ],
|
|
0xea : [ 3, "jp", "pe,nn" ],
|
|
0xeb : [ 1, "ex", "de,hl" ],
|
|
0xec : [ 3, "call", "pe,nn" ],
|
|
0xee : [ 2, "xor", "n" ],
|
|
0xef : [ 1, "rst", "28" ],
|
|
|
|
0xf0 : [ 1, "ret", "p" ],
|
|
0xf1 : [ 1, "pop", "af" ],
|
|
0xf2 : [ 3, "jp", "p,nn" ],
|
|
0xf3 : [ 1, "di", "implied" ],
|
|
0xf4 : [ 3, "call", "p,nn" ],
|
|
0xf5 : [ 1, "push", "af" ],
|
|
0xf6 : [ 2, "or", "n" ],
|
|
0xf7 : [ 1, "rst", "30" ],
|
|
0xf8 : [ 1, "ret", "m" ],
|
|
0xf9 : [ 1, "ld", "sp,hl" ],
|
|
0xfa : [ 3, "jp", "m,nn" ],
|
|
0xfb : [ 1, "ei", "implied" ],
|
|
0xfc : [ 3, "call", "m,nn" ],
|
|
0xfe : [ 2, "cp", "n" ],
|
|
0xff : [ 1, "rst", "38" ],
|
|
|
|
# Multibyte instructions
|
|
|
|
0xcb00 : [ 2, "rlc", "b" ],
|
|
0xcb01 : [ 2, "rlc", "c" ],
|
|
0xcb02 : [ 2, "rlc", "d" ],
|
|
0xcb03 : [ 2, "rlc", "e" ],
|
|
0xcb04 : [ 2, "rlc", "h" ],
|
|
0xcb05 : [ 2, "rlc", "l" ],
|
|
0xcb06 : [ 2, "rlc", "indhl" ],
|
|
0xcb07 : [ 2, "rlc", "a" ],
|
|
0xcb08 : [ 2, "rrc", "b" ],
|
|
0xcb09 : [ 2, "rrc", "c" ],
|
|
0xcb0a : [ 2, "rrc", "d" ],
|
|
0xcb0b : [ 2, "rrc", "e" ],
|
|
0xcb0c : [ 2, "rrc", "h" ],
|
|
0xcb0d : [ 2, "rrc", "l" ],
|
|
0xcb0e : [ 2, "rrc", "indhl" ],
|
|
0xcb0f : [ 2, "rrc", "a" ],
|
|
|
|
0xcb10 : [ 2, "rl", "b" ],
|
|
0xcb11 : [ 2, "rl", "c" ],
|
|
0xcb12 : [ 2, "rl", "d" ],
|
|
0xcb13 : [ 2, "rl", "e" ],
|
|
0xcb14 : [ 2, "rl", "h" ],
|
|
0xcb15 : [ 2, "rl", "l" ],
|
|
0xcb16 : [ 2, "rl", "indhl" ],
|
|
0xcb17 : [ 2, "rl", "a" ],
|
|
0xcb18 : [ 2, "rr", "b" ],
|
|
0xcb19 : [ 2, "rr", "c" ],
|
|
0xcb1a : [ 2, "rr", "d" ],
|
|
0xcb1b : [ 2, "rr", "e" ],
|
|
0xcb1c : [ 2, "rr", "h" ],
|
|
0xcb1d : [ 2, "rr", "l" ],
|
|
0xcb1e : [ 2, "rr", "indhl" ],
|
|
0xcb1f : [ 2, "rr", "a" ],
|
|
|
|
0xcb20 : [ 2, "sla", "b" ],
|
|
0xcb21 : [ 2, "sla", "c" ],
|
|
0xcb22 : [ 2, "sla", "d" ],
|
|
0xcb23 : [ 2, "sla", "e" ],
|
|
0xcb24 : [ 2, "sla", "h" ],
|
|
0xcb25 : [ 2, "sla", "l" ],
|
|
0xcb26 : [ 2, "sla", "indhl" ],
|
|
0xcb27 : [ 2, "sla", "a" ],
|
|
0xcb28 : [ 2, "sra", "b" ],
|
|
0xcb29 : [ 2, "sra", "c" ],
|
|
0xcb2a : [ 2, "sra", "d" ],
|
|
0xcb2b : [ 2, "sra", "e" ],
|
|
0xcb2c : [ 2, "sra", "h" ],
|
|
0xcb2d : [ 2, "sra", "l" ],
|
|
0xcb2e : [ 2, "sra", "indhl" ],
|
|
0xcb2f : [ 2, "sra", "a" ],
|
|
|
|
0xcb38 : [ 2, "srl", "b" ],
|
|
0xcb39 : [ 2, "srl", "c" ],
|
|
0xcb3a : [ 2, "srl", "d" ],
|
|
0xcb3b : [ 2, "srl", "e" ],
|
|
0xcb3c : [ 2, "srl", "h" ],
|
|
0xcb3d : [ 2, "srl", "l" ],
|
|
0xcb3e : [ 2, "srl", "indhl" ],
|
|
0xcb3f : [ 2, "srl", "a" ],
|
|
|
|
0xcb40 : [ 2, "bit", "0,b" ],
|
|
0xcb41 : [ 2, "bit", "0,c" ],
|
|
0xcb42 : [ 2, "bit", "0,d" ],
|
|
0xcb43 : [ 2, "bit", "0,e" ],
|
|
0xcb44 : [ 2, "bit", "0,h" ],
|
|
0xcb45 : [ 2, "bit", "0,l" ],
|
|
0xcb46 : [ 2, "bit", "0,indhl" ],
|
|
0xcb47 : [ 2, "bit", "0,a" ],
|
|
0xcb48 : [ 2, "bit", "1,b" ],
|
|
0xcb49 : [ 2, "bit", "1,c" ],
|
|
0xcb4a : [ 2, "bit", "1,d" ],
|
|
0xcb4b : [ 2, "bit", "1,e" ],
|
|
0xcb4c : [ 2, "bit", "1,h" ],
|
|
0xcb4d : [ 2, "bit", "1,l" ],
|
|
0xcb4e : [ 2, "bit", "1,indhl" ],
|
|
0xcb4f : [ 2, "bit", "1,a" ],
|
|
|
|
0xcb50 : [ 2, "bit", "2,b" ],
|
|
0xcb51 : [ 2, "bit", "2,c" ],
|
|
0xcb52 : [ 2, "bit", "2,d" ],
|
|
0xcb53 : [ 2, "bit", "2,e" ],
|
|
0xcb54 : [ 2, "bit", "2,h" ],
|
|
0xcb55 : [ 2, "bit", "2,l" ],
|
|
0xcb56 : [ 2, "bit", "2,indhl" ],
|
|
0xcb57 : [ 2, "bit", "2,a" ],
|
|
0xcb58 : [ 2, "bit", "3,b" ],
|
|
0xcb59 : [ 2, "bit", "3,c" ],
|
|
0xcb5a : [ 2, "bit", "3,d" ],
|
|
0xcb5b : [ 2, "bit", "3,e" ],
|
|
0xcb5c : [ 2, "bit", "3,h" ],
|
|
0xcb5d : [ 2, "bit", "3,l" ],
|
|
0xcb5e : [ 2, "bit", "3,indhl" ],
|
|
0xcb5f : [ 2, "bit", "3,a" ],
|
|
|
|
0xcb60 : [ 2, "bit", "4,b" ],
|
|
0xcb61 : [ 2, "bit", "4,c" ],
|
|
0xcb62 : [ 2, "bit", "4,d" ],
|
|
0xcb63 : [ 2, "bit", "4,e" ],
|
|
0xcb64 : [ 2, "bit", "4,h" ],
|
|
0xcb65 : [ 2, "bit", "4,l" ],
|
|
0xcb66 : [ 2, "bit", "4,indhl" ],
|
|
0xcb67 : [ 2, "bit", "4,a" ],
|
|
0xcb68 : [ 2, "bit", "5,b" ],
|
|
0xcb69 : [ 2, "bit", "5,c" ],
|
|
0xcb6a : [ 2, "bit", "5,d" ],
|
|
0xcb6b : [ 2, "bit", "5,e" ],
|
|
0xcb6c : [ 2, "bit", "5,h" ],
|
|
0xcb6d : [ 2, "bit", "5,l" ],
|
|
0xcb6e : [ 2, "bit", "5,indhl" ],
|
|
0xcb6f : [ 2, "bit", "5,a" ],
|
|
|
|
0xcb70 : [ 2, "bit", "6,b" ],
|
|
0xcb71 : [ 2, "bit", "6,c" ],
|
|
0xcb72 : [ 2, "bit", "6,d" ],
|
|
0xcb73 : [ 2, "bit", "6,e" ],
|
|
0xcb74 : [ 2, "bit", "6,h" ],
|
|
0xcb75 : [ 2, "bit", "6,l" ],
|
|
0xcb76 : [ 2, "bit", "6,indhl" ],
|
|
0xcb77 : [ 2, "bit", "6,a" ],
|
|
0xcb78 : [ 2, "bit", "7,b" ],
|
|
0xcb79 : [ 2, "bit", "7,c" ],
|
|
0xcb7a : [ 2, "bit", "7,d" ],
|
|
0xcb7b : [ 2, "bit", "7,e" ],
|
|
0xcb7c : [ 2, "bit", "7,h" ],
|
|
0xcb7d : [ 2, "bit", "7,l" ],
|
|
0xcb7e : [ 2, "bit", "7,indhl" ],
|
|
0xcb7f : [ 2, "bit", "7,a" ],
|
|
|
|
0xcb80 : [ 2, "res", "0,b" ],
|
|
0xcb81 : [ 2, "res", "0,c" ],
|
|
0xcb82 : [ 2, "res", "0,d" ],
|
|
0xcb83 : [ 2, "res", "0,e" ],
|
|
0xcb84 : [ 2, "res", "0,h" ],
|
|
0xcb85 : [ 2, "res", "0,l" ],
|
|
0xcb86 : [ 2, "res", "0,indhl" ],
|
|
0xcb87 : [ 2, "res", "0,a" ],
|
|
0xcb88 : [ 2, "res", "1,b" ],
|
|
0xcb89 : [ 2, "res", "1,c" ],
|
|
0xcb8a : [ 2, "res", "1,d" ],
|
|
0xcb8b : [ 2, "res", "1,e" ],
|
|
0xcb8c : [ 2, "res", "1,h" ],
|
|
0xcb8d : [ 2, "res", "1,l" ],
|
|
0xcb8e : [ 2, "res", "1,indhl" ],
|
|
0xcb8f : [ 2, "res", "1,a" ],
|
|
|
|
0xcb90 : [ 2, "res", "2,b" ],
|
|
0xcb91 : [ 2, "res", "2,c" ],
|
|
0xcb92 : [ 2, "res", "2,d" ],
|
|
0xcb93 : [ 2, "res", "2,e" ],
|
|
0xcb94 : [ 2, "res", "2,h" ],
|
|
0xcb95 : [ 2, "res", "2,l" ],
|
|
0xcb96 : [ 2, "res", "2,indhl" ],
|
|
0xcb97 : [ 2, "res", "2,a" ],
|
|
0xcb98 : [ 2, "res", "3,b" ],
|
|
0xcb99 : [ 2, "res", "3,c" ],
|
|
0xcb9a : [ 2, "res", "3,d" ],
|
|
0xcb9b : [ 2, "res", "3,e" ],
|
|
0xcb9c : [ 2, "res", "3,h" ],
|
|
0xcb9d : [ 2, "res", "3,l" ],
|
|
0xcb9e : [ 2, "res", "3,indhl" ],
|
|
0xcb9f : [ 2, "res", "3,a" ],
|
|
|
|
0xcba0 : [ 2, "res", "4,b" ],
|
|
0xcba1 : [ 2, "res", "4,c" ],
|
|
0xcba2 : [ 2, "res", "4,d" ],
|
|
0xcba3 : [ 2, "res", "4,e" ],
|
|
0xcba4 : [ 2, "res", "4,h" ],
|
|
0xcba5 : [ 2, "res", "4,l" ],
|
|
0xcba6 : [ 2, "res", "4,indhl" ],
|
|
0xcba7 : [ 2, "res", "4,a" ],
|
|
0xcba8 : [ 2, "res", "5,b" ],
|
|
0xcba9 : [ 2, "res", "5,c" ],
|
|
0xcbaa : [ 2, "res", "5,d" ],
|
|
0xcbab : [ 2, "res", "5,e" ],
|
|
0xcbac : [ 2, "res", "5,h" ],
|
|
0xcbad : [ 2, "res", "5,l" ],
|
|
0xcbae : [ 2, "res", "5,indhl" ],
|
|
0xcbaf : [ 2, "res", "5,a" ],
|
|
|
|
0xcbb0 : [ 2, "res", "6,b" ],
|
|
0xcbb1 : [ 2, "res", "6,c" ],
|
|
0xcbb2 : [ 2, "res", "6,d" ],
|
|
0xcbb3 : [ 2, "res", "6,e" ],
|
|
0xcbb4 : [ 2, "res", "6,h" ],
|
|
0xcbb5 : [ 2, "res", "6,l" ],
|
|
0xcbb6 : [ 2, "res", "6,indhl" ],
|
|
0xcbb7 : [ 2, "res", "6,a" ],
|
|
0xcbb8 : [ 2, "res", "7,b" ],
|
|
0xcbb9 : [ 2, "res", "7,c" ],
|
|
0xcbba : [ 2, "res", "7,d" ],
|
|
0xcbbb : [ 2, "res", "7,e" ],
|
|
0xcbbc : [ 2, "res", "7,h" ],
|
|
0xcbbd : [ 2, "res", "7,l" ],
|
|
0xcbbe : [ 2, "res", "7,indhl" ],
|
|
0xcbbf : [ 2, "res", "7,a" ],
|
|
|
|
0xcbc0 : [ 2, "set", "0,b" ],
|
|
0xcbc1 : [ 2, "set", "0,c" ],
|
|
0xcbc2 : [ 2, "set", "0,d" ],
|
|
0xcbc3 : [ 2, "set", "0,e" ],
|
|
0xcbc4 : [ 2, "set", "0,h" ],
|
|
0xcbc5 : [ 2, "set", "0,l" ],
|
|
0xcbc6 : [ 2, "set", "0,indhl" ],
|
|
0xcbc7 : [ 2, "set", "0,a" ],
|
|
0xcbc8 : [ 2, "set", "1,b" ],
|
|
0xcbc9 : [ 2, "set", "1,c" ],
|
|
0xcbca : [ 2, "set", "1,d" ],
|
|
0xcbcb : [ 2, "set", "1,e" ],
|
|
0xcbcc : [ 2, "set", "1,h" ],
|
|
0xcbcd : [ 2, "set", "1,l" ],
|
|
0xcbce : [ 2, "set", "1,indhl" ],
|
|
0xcbcf : [ 2, "set", "1,a" ],
|
|
|
|
0xcbd0 : [ 2, "set", "2,b" ],
|
|
0xcbd1 : [ 2, "set", "2,c" ],
|
|
0xcbd2 : [ 2, "set", "2,d" ],
|
|
0xcbd3 : [ 2, "set", "2,e" ],
|
|
0xcbd4 : [ 2, "set", "2,h" ],
|
|
0xcbd5 : [ 2, "set", "2,l" ],
|
|
0xcbd6 : [ 2, "set", "2,indhl" ],
|
|
0xcbd7 : [ 2, "set", "2,a" ],
|
|
0xcbd8 : [ 2, "set", "3,b" ],
|
|
0xcbd9 : [ 2, "set", "3,c" ],
|
|
0xcbda : [ 2, "set", "3,d" ],
|
|
0xcbdb : [ 2, "set", "3,e" ],
|
|
0xcbdc : [ 2, "set", "3,h" ],
|
|
0xcbdd : [ 2, "set", "3,l" ],
|
|
0xcbde : [ 2, "set", "3,indhl" ],
|
|
0xcbdf : [ 2, "set", "3,a" ],
|
|
|
|
0xcbe0 : [ 2, "set", "4,b" ],
|
|
0xcbe1 : [ 2, "set", "4,c" ],
|
|
0xcbe2 : [ 2, "set", "4,d" ],
|
|
0xcbe3 : [ 2, "set", "4,e" ],
|
|
0xcbe4 : [ 2, "set", "4,h" ],
|
|
0xcbe5 : [ 2, "set", "4,l" ],
|
|
0xcbe6 : [ 2, "set", "4,indhl" ],
|
|
0xcbe7 : [ 2, "set", "4,a" ],
|
|
0xcbe8 : [ 2, "set", "5,b" ],
|
|
0xcbe9 : [ 2, "set", "5,c" ],
|
|
0xcbea : [ 2, "set", "5,d" ],
|
|
0xcbeb : [ 2, "set", "5,e" ],
|
|
0xcbec : [ 2, "set", "5,h" ],
|
|
0xcbed : [ 2, "set", "5,l" ],
|
|
0xcbee : [ 2, "set", "5,indhl" ],
|
|
0xcbef : [ 2, "set", "5,a" ],
|
|
|
|
0xcbf0 : [ 2, "set", "6,b" ],
|
|
0xcbf1 : [ 2, "set", "6,c" ],
|
|
0xcbf2 : [ 2, "set", "6,d" ],
|
|
0xcbf3 : [ 2, "set", "6,e" ],
|
|
0xcbf4 : [ 2, "set", "6,h" ],
|
|
0xcbf5 : [ 2, "set", "6,l" ],
|
|
0xcbf6 : [ 2, "set", "6,indhl" ],
|
|
0xcbf7 : [ 2, "set", "6,a" ],
|
|
0xcbf8 : [ 2, "set", "7,b" ],
|
|
0xcbf9 : [ 2, "set", "7,c" ],
|
|
0xcbfa : [ 2, "set", "7,d" ],
|
|
0xcbfb : [ 2, "set", "7,e" ],
|
|
0xcbfc : [ 2, "set", "7,h" ],
|
|
0xcbfd : [ 2, "set", "7,l" ],
|
|
0xcbfe : [ 2, "set", "7,indhl" ],
|
|
0xcbff : [ 2, "set", "7,a" ],
|
|
|
|
0xdd09 : [ 2, "add", "ix,bc" ],
|
|
0xdd19 : [ 2, "add", "ix,de" ],
|
|
0xdd21 : [ 4, "ld", "ix,aa" ],
|
|
0xdd22 : [ 4, "ld", "indaa,ix" ],
|
|
0xdd23 : [ 2, "inc", "ix" ],
|
|
0xdd29 : [ 2, "add", "ix,ix" ],
|
|
0xdd2a : [ 4, "ld", "ix,indaa" ],
|
|
0xdd2b : [ 2, "dec", "ix" ],
|
|
0xdd34 : [ 3, "inc", "indix+d" ],
|
|
0xdd35 : [ 3, "dec", "indix+d" ],
|
|
0xdd36 : [ 4, "ld", "indix+d,n" ],
|
|
0xdd39 : [ 2, "add", "ix,sp" ],
|
|
0xdd46 : [ 3, "ld", "b,indix+d" ],
|
|
0xdd4e : [ 3, "ld", "c,indix+d" ],
|
|
0xdd56 : [ 3, "ld", "d,indix+d" ],
|
|
0xdd5e : [ 3, "ld", "e,indix+d" ],
|
|
0xdd66 : [ 3, "ld", "h,indix+d" ],
|
|
0xdd6e : [ 3, "ld", "l,indix+d" ],
|
|
0xdd70 : [ 3, "ld", "indix+d,b" ],
|
|
0xdd71 : [ 3, "ld", "indix+d,c" ],
|
|
0xdd72 : [ 3, "ld", "indix+d,d" ],
|
|
0xdd73 : [ 3, "ld", "indix+d,e" ],
|
|
0xdd74 : [ 3, "ld", "indix+d,h" ],
|
|
0xdd75 : [ 3, "ld", "indix+d,l" ],
|
|
0xdd77 : [ 3, "ld", "indix+d,a" ],
|
|
0xdd7e : [ 3, "ld", "a,indix+d" ],
|
|
0xdd86 : [ 3, "add", "a,indix+d" ],
|
|
0xdd8e : [ 3, "adc", "a,indix+d" ],
|
|
0xdd96 : [ 3, "sub", "indix+d" ],
|
|
0xdd9e : [ 3, "sbc", "a,indix+d" ],
|
|
0xdda6 : [ 3, "and", "indix+d" ],
|
|
0xddae : [ 3, "xor", "indix+d" ],
|
|
0xddb6 : [ 3, "or", "indix+d" ],
|
|
0xddbe : [ 3, "cp", "indix+d" ],
|
|
|
|
0xed40 : [ 2, "in", "b,indc" ],
|
|
0xed41 : [ 2, "out", "indc,b" ],
|
|
0xed42 : [ 2, "sbc", "hl,bc" ],
|
|
0xed43 : [ 4, "ld", "indaa,bc" ],
|
|
0xed44 : [ 2, "neg", "implied" ],
|
|
0xed45 : [ 2, "retn", "implied" ],
|
|
0xed46 : [ 2, "im", "0" ],
|
|
0xed47 : [ 2, "ld", "i,a" ],
|
|
0xed48 : [ 2, "in", "c,indc" ],
|
|
0xed49 : [ 2, "out", "indc,c" ],
|
|
0xed4a : [ 2, "adc", "hl,bc" ],
|
|
0xed4b : [ 4, "ld", "bc,indaa" ],
|
|
0xed4d : [ 2, "reti", "implied" ],
|
|
0xed4f : [ 2, "ld", "r,a" ],
|
|
0xed50 : [ 2, "in", "d,indc" ],
|
|
0xed51 : [ 2, "out", "indc,d" ],
|
|
0xed52 : [ 2, "sbc", "hl,de" ],
|
|
0xed53 : [ 4, "ld", "indaa,de" ],
|
|
0xed56 : [ 2, "im", "1" ],
|
|
0xed57 : [ 2, "ld", "a,i" ],
|
|
0xed58 : [ 2, "in", "e,indc" ],
|
|
0xed59 : [ 2, "out", "indc,e" ],
|
|
0xed5a : [ 2, "adc", "hl,de" ],
|
|
0xed5b : [ 4, "ld", "de,indaa" ],
|
|
0xed5e : [ 2, "im", "2" ],
|
|
0xed5f : [ 2, "ld", "a,r" ],
|
|
0xed60 : [ 2, "in", "h,indc" ],
|
|
0xed61 : [ 2, "out", "indc,h" ],
|
|
0xed62 : [ 2, "sbc", "hl,hl" ],
|
|
0xed67 : [ 2, "rrd", "implied" ],
|
|
0xed68 : [ 2, "in", "l,indc" ],
|
|
0xed69 : [ 2, "out", "indc,l" ],
|
|
0xed6a : [ 2, "adc", "hl,hl" ],
|
|
0xed6f : [ 2, "rld", "implied" ],
|
|
0xed72 : [ 2, "sbc", "hl,sp" ],
|
|
0xed73 : [ 4, "ld", "indaa,sp" ],
|
|
0xed76 : [ 2, "in", "a,indc" ],
|
|
0xed79 : [ 2, "out", "indc,a" ],
|
|
0xed7a : [ 2, "adc", "hl,sp" ],
|
|
0xed7b : [ 4, "ld", "sp,indaa" ],
|
|
0xeda0 : [ 2, "ldi", "implied" ],
|
|
0xeda1 : [ 2, "cpi", "implied" ],
|
|
0xeda2 : [ 2, "ini", "implied" ],
|
|
0xeda3 : [ 2, "outi", "implied" ],
|
|
0xeda8 : [ 2, "ldd", "implied" ],
|
|
0xeda9 : [ 2, "cpd", "implied" ],
|
|
0xedaa : [ 2, "ind", "implied" ],
|
|
0xedab : [ 2, "outd", "implied" ],
|
|
0xedb0 : [ 2, "ldir", "implied" ],
|
|
0xedb1 : [ 2, "cpir", "implied" ],
|
|
0xedb2 : [ 2, "inir", "implied" ],
|
|
0xedb3 : [ 2, "otir", "implied" ],
|
|
0xedb8 : [ 2, "lddr", "implied" ],
|
|
0xedb9 : [ 2, "cpdr", "implied" ],
|
|
0xedba : [ 2, "indr", "implied" ],
|
|
0xedbb : [ 2, "otdr", "implied" ],
|
|
|
|
0xfd09 : [ 2, "add", "iy,bc" ],
|
|
0xfd19 : [ 2, "add", "iy,de" ],
|
|
0xfd21 : [ 4, "ld", "iy,aa" ],
|
|
0xfd22 : [ 4, "ld", "indaa,iy" ],
|
|
0xfd23 : [ 2, "inc", "iy" ],
|
|
0xfd29 : [ 2, "add", "iy,iy" ],
|
|
0xfd2a : [ 4, "ld", "iy,indaa" ],
|
|
0xfd2b : [ 2, "dec", "iy" ],
|
|
0xfd34 : [ 3, "inc", "indiy+d" ],
|
|
0xfd35 : [ 3, "dec", "indiy+d" ],
|
|
0xfd36 : [ 4, "ld", "indiy+d,n" ],
|
|
0xfd39 : [ 2, "add", "iy,sp" ],
|
|
0xfd46 : [ 3, "ld", "b,indiy+d" ],
|
|
0xfd4e : [ 3, "ld", "c,indiy+d" ],
|
|
0xfd56 : [ 3, "ld", "d,indiy+d" ],
|
|
0xfd5e : [ 3, "ld", "e,indiy+d" ],
|
|
0xfd66 : [ 3, "ld", "h,indiy+d" ],
|
|
0xfd6e : [ 3, "ld", "l,indiy+d" ],
|
|
0xfd70 : [ 3, "ld", "indiy+d,b" ],
|
|
0xfd71 : [ 3, "ld", "indiy+d,c" ],
|
|
0xfd72 : [ 3, "ld", "indiy+d,d" ],
|
|
0xfd73 : [ 3, "ld", "indiy+d,e" ],
|
|
0xfd74 : [ 3, "ld", "indiy+d,h" ],
|
|
0xfd75 : [ 3, "ld", "indiy+d,l" ],
|
|
0xfd77 : [ 3, "ld", "indiy+d,a" ],
|
|
0xfd7e : [ 3, "ld", "a,indiy+d" ],
|
|
0xfd86 : [ 3, "add", "a,indiy+d" ],
|
|
0xfd8e : [ 3, "adc", "a,indiy+d" ],
|
|
0xfd96 : [ 3, "sub", "indiy+d" ],
|
|
0xfd9e : [ 3, "sbc", "a,indiy+d" ],
|
|
0xfda6 : [ 3, "and", "indiy+d" ],
|
|
0xfdae : [ 3, "xor", "indiy+d" ],
|
|
0xfdb6 : [ 3, "or", "indiy+d" ],
|
|
0xfdbe : [ 3, "cp", "indiy+d" ],
|
|
|
|
# Placeholder 2-byte leadins for the 4-byte ix/iy bit instructions fully
|
|
# defined below. The z80bit flag triggers a special case in the disassembler
|
|
# to look up the 4 byte instruction.
|
|
0xddcb : [ 4, "ixbit", "implied", z80bit ],
|
|
0xfdcb : [ 4, "iybit", "implied", z80bit ],
|
|
}
|
|
|
|
def extra_opcodes(addr_table, op_table):
|
|
# Create all the 0xddcb and 0xfdcb addressing modes. The modes look like [0-7],(i[xy]+*)[,[abcdehl]]?
|
|
for index in ['x', 'y']:
|
|
for bit in range(8):
|
|
k = "%d,indi%s+d" % (bit, index)
|
|
v = "%d,(i%s+${0:02X})" % (bit, index)
|
|
addr_table[k] = v
|
|
for reg in ['a', 'b', 'c', 'd', 'e', 'h', 'l']:
|
|
k = "%d,indi%s+d,%s" % (bit, index, reg)
|
|
v = "%d,(i%s+${0:02X}),%s" % (bit, index, reg)
|
|
addr_table[k] = v
|
|
|
|
# Create all the 0xddcb and 0xfdcb opcodes. These are all 4 byte opcodes
|
|
# where the 3rd byte is a -128 - +127 offset. For the purposes of using
|
|
# this table, the 3rd byte will be marked as zero and the disassembler will
|
|
# have to insert the real 3rd byte the check of the z80bit special case
|
|
for first_byte, x_or_y in [(0xdd, 'x'), (0xfd, 'y')]:
|
|
# groups of 8, expand to full 256
|
|
mnemonics_8 = ['rlc', 'rrc', 'rl', 'rr', 'sla', 'sra', 'sll', 'sr1'] + ['bit'] * 8 + ['res'] * 8 + ['set'] * 8
|
|
mnemonics = [m for mnemonic in mnemonics_8 for m in [mnemonic]*8]
|
|
|
|
# create all 256 addressing modes, in groups of 64
|
|
addrmodes = ['indi%s+d' + a for a in [',b', ',c', ',d', ',e', ',h', ',l', '', ',a']] * 8 + [f % d for d in range(8) for f in ['%d,indi%%s+d'] * 8] + [f % d for d in range(8) for f in ['%d,indi%%s+d' + a for a in [',b', ',c', ',d', ',e', ',h', ',l', '', ',a']]] * 2
|
|
|
|
for fourth_byte, (instruction, addrmode) in enumerate(zip(mnemonics, addrmodes)):
|
|
opcode = (first_byte << 24) + (0xcb << 16) + fourth_byte
|
|
op_table[opcode] = [ 4, instruction, addrmode % x_or_y, z80bit ]
|
|
extra_opcodes(addressModeTable, opcodeTable)
|
|
del extra_opcodes
|
|
|
|
# End of processor specific code
|
|
##########################################################################
|