From d39bab73024efa0ef0f06bb870877b370dedaffe Mon Sep 17 00:00:00 2001 From: mmfoerster Date: Tue, 19 Sep 2017 23:56:43 -0400 Subject: [PATCH] Clarified causation statement about T0 T+ time code in 6502 time codes documentation --- 6502timecodes.txt | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/6502timecodes.txt b/6502timecodes.txt index 6f27a1f..add6d70 100644 --- a/6502timecodes.txt +++ b/6502timecodes.txt @@ -120,7 +120,7 @@ The time code: T0 T+ .. .. .. .. [..] -arises when RES is down when a T0 F1 clock state is clocked in. This can be -either the T0 that is usually scheduled for an instruction's last cycle, or -the T0 caused by instruction abort. +arises when RES is down when a T0 phase 1 clock state is clocked in. This can +be either the T0 that is usually scheduled for an instruction's last cycle, or +the T0 caused by instruction abort (later caused by the RES).