mirror of https://github.com/makarcz/vm6502.git
Version 2.0
Version 2.0, full emulation of 6502 op-codes, fully tested and functional. Extended description in ReadMe file. Bin2Hex tool to convert binary images to memory definition format. Microchess, EhBasic added.
This commit is contained in:
Marek Karcz
parent
0dd5a0299f
commit
67f1a62596
Binary file not shown.
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@ -0,0 +1,856 @@
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; Created with HEX2BIN (C) Marek Karcz 2016. All rights reserved.
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ADDR
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$0400
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ORG
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$0000
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ORG
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$0010
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$00 $00 $00 $c3 $82 $41 $00 $7f $00 $1f $71 $80 $0f $ff $7f $80
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$ff $0f $8f $8f $17 $02 $18 $02 $19 $02 $1a $02 $1b $02 $1f $01
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$03 $02 $04 $02 $05 $02 $06 $02 $0b $01 $4e $02 $4f $02 $50 $02
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$51 $02 $52 $02 $53 $02 $54 $02 $55 $02 $4a $02 $4b $02 $4c $02
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$4d $02 $03 $02 $04 $02 $04 $01 $05 $01 $00 $00 $00 $00 $00 $00
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ORG
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$0200
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$00 $00 $00 $00 $00 $00 $00 $00 $29 $00 $60 $49 $00 $60 $09 $00
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$60 $69 $00 $60 $e9 $00 $60 $c3 $82 $41 $00 $7f $80 $80 $00 $02
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$86 $04 $82 $00 $87 $05 $83 $01 $61 $41 $20 $00 $e1 $c1 $a0 $80
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$81 $01 $80 $02 $81 $01 $80 $00 $01 $00 $01 $02 $81 $80 $81 $80
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$7f $80 $ff $00 $01 $00 $80 $80 $02 $00 $00 $1f $71 $80 $0f $ff
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$7f $80 $ff $0f $8f $8f $00 $f1 $1f $00 $f0 $ff $ff $ff $ff $f0
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$f0 $0f $00 $ff $7f $80 $02 $80 $00 $80 $00 $00 $00 $00 $00 $00
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ORG
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$0400
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$d8 $a2 $ff $9a $a9 $00 $8d $00 $02 $a2 $05 $4c $33 $04 $a0 $05
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$d0 $08 $4c $12 $04 $88 $88 $88 $88 $88 $88 $88 $88 $88 $88 $f0
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$17 $4c $21 $04 $ca $ca $ca $ca $ca $ca $ca $ca $ca $ca $f0 $de
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$4c $30 $04 $d0 $f4 $4c $35 $04 $ad $00 $02 $c9 $00 $d0 $fe $a9
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$01 $8d $00 $02 $a0 $fe $88 $98 $aa $10 $08 $18 $69 $02 $ea $ea
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$ea $ea $ea $ea $ea $ea $ea $ea $49 $7f $8d $e6 $04 $a9 $00 $4c
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$e5 $04 $ca $ca $ca $ca $ca $ca $ca $ca $ca $ca $ca $ca $ca $ca
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$ca $ca $ca $ca $ca $ca $ca $ca $ca $ca $ca $ca $ca $ca $ca $ca
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$ca $ca $ca $ca $ca $ca $ca $ca $ca $ca $ca $ca $ca $ca $ca $ca
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$ca $ca $ca $ca $ca $ca $ca $ca $ca $ca $ca $ca $ca $ca $ca $ca
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$ca $ca $ca $ca $ca $ca $ca $ca $ca $ca $ca $ca $ca $ca $ca $ca
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$ca $ca $ca $ca $ca $ca $ca $ca $ca $ca $ca $ca $ca $ca $ca $ca
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$ca $ca $ca $ca $ca $ca $ca $ca $ca $ca $ca $ca $ca $ca $ca $ca
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$ca $ca $ca $ca $ca $ca $ca $ca $ca $ca $ca $ca $ca $ca $ca $ca
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$ca $ca $ca $ca $ca $f0 $3e $ca $ca $ca $ca $ca $ca $ca $ca $ca
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$ca $ca $ca $ca $ca $ca $ca $ca $ca $ca $ca $ca $ca $ca $ca $ca
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$ca $ca $ca $ca $ca $ca $ca $ca $ca $ca $ca $ca $ca $ca $ca $ca
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$ca $ca $ca $ca $ca $ca $ca $ca $ca $ca $ca $ca $ca $ca $ca $ca
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$ca $ca $ca $ca $ca $ca $ca $ca $ca $ca $ca $ca $ca $ca $ca $ca
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$ca $ca $ca $ca $ca $ca $ca $ca $ca $ca $ca $ca $ca $ca $ca $ca
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$ca $ca $ca $ca $ca $ca $ca $ca $ca $ca $ca $ca $ca $ca $ca $ca
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$ca $ca $ca $ca $ca $ca $ca $ca $ca $ca $ca $ca $ca $ca $ca $ca
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$ca $ca $ca $ca $ca $ca $ea $ea $ea $ea $ea $f0 $08 $4c $6d $05
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$ea $ea $ea $ea $ea $ea $ea $ea $ea $ea $c0 $00 $f0 $03 $4c $46
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$04 $ad $00 $02 $c9 $01 $d0 $fe $a9 $02 $8d $00 $02 $c0 $01 $d0
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$03 $4c $91 $05 $a9 $00 $c9 $00 $d0 $fe $90 $fe $30 $fe $c9 $01
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$f0 $fe $b0 $fe $10 $fe $aa $e0 $00 $d0 $fe $90 $fe $30 $fe $e0
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$01 $f0 $fe $b0 $fe $10 $fe $a8 $c0 $00 $d0 $fe $90 $fe $30 $fe
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$c0 $01 $f0 $fe $b0 $fe $10 $fe $ad $00 $02 $c9 $02 $d0 $fe $a9
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$03 $8d $00 $02 $a2 $ff $9a $a9 $55 $48 $a9 $aa $48 $cd $fe $01
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$d0 $fe $ba $8a $c9 $fd $d0 $fe $68 $c9 $aa $d0 $fe $68 $c9 $55
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$d0 $fe $cd $ff $01 $d0 $fe $ba $e0 $ff $d0 $fe $ad $00 $02 $c9
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$03 $d0 $fe $a9 $04 $8d $00 $02 $a9 $ff $48 $28 $10 $1a $50 $1b
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$90 $1c $d0 $1d $30 $03 $4c $16 $06 $70 $03 $4c $1b $06 $b0 $03
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$4c $20 $06 $f0 $0f $4c $25 $06 $4c $28 $06 $4c $2b $06 $4c $2e
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$06 $4c $31 $06 $08 $ba $e0 $fe $d0 $fe $68 $c9 $ff $d0 $fe $ba
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$e0 $ff $d0 $fe $a9 $00 $48 $28 $30 $1a $70 $1b $b0 $1c $f0 $1d
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$10 $03 $4c $52 $06 $50 $03 $4c $57 $06 $90 $03 $4c $5c $06 $d0
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$0f $4c $61 $06 $4c $64 $06 $4c $67 $06 $4c $6a $06 $4c $6d $06
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$08 $68 $c9 $30 $d0 $fe $a9 $02 $48 $28 $d0 $02 $f0 $03 $4c $7e
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$06 $b0 $02 $90 $03 $4c $85 $06 $30 $02 $10 $03 $4c $8c $06 $70
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$02 $50 $03 $4c $93 $06 $a9 $01 $48 $28 $f0 $02 $d0 $03 $4c $9e
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$06 $90 $02 $b0 $03 $4c $a5 $06 $30 $02 $10 $03 $4c $ac $06 $70
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$02 $50 $03 $4c $b3 $06 $a9 $80 $48 $28 $f0 $02 $d0 $03 $4c $be
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$06 $b0 $02 $90 $03 $4c $c5 $06 $10 $02 $30 $03 $4c $cc $06 $70
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$02 $50 $03 $4c $d3 $06 $a9 $40 $48 $28 $f0 $02 $d0 $03 $4c $de
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$06 $b0 $02 $90 $03 $4c $e5 $06 $30 $02 $10 $03 $4c $ec $06 $50
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$02 $70 $03 $4c $f3 $06 $a9 $fd $48 $28 $f0 $02 $d0 $03 $4c $fe
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$06 $90 $02 $b0 $03 $4c $05 $07 $10 $02 $30 $03 $4c $0c $07 $50
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$02 $70 $03 $4c $13 $07 $a9 $fe $48 $28 $d0 $02 $f0 $03 $4c $1e
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$07 $b0 $02 $90 $03 $4c $25 $07 $10 $02 $30 $03 $4c $2c $07 $50
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$02 $70 $03 $4c $33 $07 $a9 $7f $48 $28 $d0 $02 $f0 $03 $4c $3e
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$07 $90 $02 $b0 $03 $4c $45 $07 $30 $02 $10 $03 $4c $4c $07 $50
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$02 $70 $03 $4c $53 $07 $a9 $bf $48 $28 $d0 $02 $f0 $03 $4c $5e
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$07 $90 $02 $b0 $03 $4c $65 $07 $10 $02 $30 $03 $4c $6c $07 $70
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$02 $50 $03 $4c $73 $07 $ad $00 $02 $c9 $04 $d0 $fe $a9 $05 $8d
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$00 $02 $a2 $55 $a0 $aa $a9 $ff $48 $a9 $01 $28 $48 $08 $c9 $01
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$d0 $fe $68 $48 $c9 $ff $d0 $fe $28 $a9 $00 $48 $a9 $00 $28 $48
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$08 $c9 $00 $d0 $fe $68 $48 $c9 $30 $d0 $fe $28 $a9 $ff $48 $a9
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$ff $28 $48 $08 $c9 $ff $d0 $fe $68 $48 $c9 $ff $d0 $fe $28 $a9
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$00 $48 $a9 $01 $28 $48 $08 $c9 $01 $d0 $fe $68 $48 $c9 $30 $d0
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$fe $28 $a9 $ff $48 $a9 $00 $28 $48 $08 $c9 $00 $d0 $fe $68 $48
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$c9 $ff $d0 $fe $28 $a9 $00 $48 $a9 $ff $28 $48 $08 $c9 $ff $d0
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$fe $68 $48 $c9 $30 $d0 $fe $28 $a9 $ff $48 $a9 $00 $28 $68 $08
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$c9 $ff $d0 $fe $68 $48 $c9 $fd $d0 $fe $28 $a9 $00 $48 $a9 $ff
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$28 $68 $08 $c9 $00 $d0 $fe $68 $48 $c9 $32 $d0 $fe $28 $a9 $ff
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$48 $a9 $fe $28 $68 $08 $c9 $01 $d0 $fe $68 $48 $c9 $7d $d0 $fe
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$28 $a9 $00 $48 $a9 $00 $28 $68 $08 $c9 $ff $d0 $fe $68 $48 $c9
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$b0 $d0 $fe $28 $a9 $ff $48 $a9 $ff $28 $68 $08 $c9 $00 $d0 $fe
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$68 $48 $c9 $7f $d0 $fe $28 $a9 $00 $48 $a9 $fe $28 $68 $08 $c9
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$01 $d0 $fe $68 $48 $c9 $30 $d0 $fe $28 $e0 $55 $d0 $fe $c0 $aa
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$d0 $fe $ad $00 $02 $c9 $05 $d0 $fe $a9 $06 $8d $00 $02 $a9 $00
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$48 $a9 $3c $28 $49 $c3 $08 $c9 $ff $d0 $fe $68 $48 $c9 $b0 $d0
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$fe $28 $a9 $00 $48 $a9 $c3 $28 $49 $c3 $08 $c9 $00 $d0 $fe $68
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$48 $c9 $32 $d0 $fe $28 $ad $00 $02 $c9 $06 $d0 $fe $a9 $07 $8d
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$00 $02 $a2 $24 $a0 $42 $a9 $00 $48 $a9 $18 $28 $ea $08 $c9 $18
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$d0 $fe $68 $48 $c9 $30 $d0 $fe $28 $e0 $24 $d0 $fe $c0 $42 $d0
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$fe $a2 $db $a0 $bd $a9 $ff $48 $a9 $e7 $28 $ea $08 $c9 $e7 $d0
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$fe $68 $48 $c9 $ff $d0 $fe $28 $e0 $db $d0 $fe $c0 $bd $d0 $fe
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$ad $00 $02 $c9 $07 $d0 $fe $a9 $08 $8d $00 $02 $a9 $00 $48 $28
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$a9 $46 $a2 $41 $a0 $52 $4c $c9 $36 $ea $ea $d0 $fe $e8 $e8 $f0
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$fe $10 $fe $90 $fe $50 $fe $c9 $ec $d0 $fe $e0 $42 $d0 $fe $c0
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$4f $d0 $fe $ca $c8 $c8 $c8 $49 $aa $4c $32 $09 $ea $ea $d0 $fe
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$e8 $e8 $f0 $fe $30 $fe $90 $fe $50 $fe $c9 $46 $d0 $fe $e0 $41
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$d0 $fe $c0 $52 $d0 $fe $ad $00 $02 $c9 $08 $d0 $fe $a9 $09 $8d
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$00 $02 $a9 $00 $48 $28 $a9 $49 $a2 $4e $a0 $44 $6c $f8 $36 $ea
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$d0 $fe $88 $88 $08 $88 $88 $88 $28 $f0 $fe $10 $fe $90 $fe $50
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$fe $c9 $e3 $d0 $fe $e0 $4f $d0 $fe $c0 $3e $d0 $fe $ba $e0 $ff
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$d0 $fe $ad $00 $02 $c9 $09 $d0 $fe $a9 $0a $8d $00 $02 $a9 $00
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$48 $28 $a9 $4a $a2 $53 $a0 $52 $20 $34 $37 $08 $88 $88 $88 $28
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$f0 $fe $10 $fe $90 $fe $50 $fe $c9 $e0 $d0 $fe $e0 $54 $d0 $fe
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$c0 $4c $d0 $fe $ba $e0 $ff $d0 $fe $ad $00 $02 $c9 $0a $d0 $fe
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$a9 $0b $8d $00 $02 $a9 $00 $48 $28 $a9 $42 $a2 $52 $a0 $4b $00
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$88 $08 $88 $88 $88 $c9 $e8 $d0 $fe $e0 $53 $d0 $fe $c0 $45 $d0
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$fe $68 $c9 $30 $d0 $fe $ba $e0 $ff $d0 $fe $ad $00 $02 $c9 $0b
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$d0 $fe $a9 $0c $8d $00 $02 $a9 $ff $48 $28 $18 $08 $68 $48 $c9
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$fe $d0 $fe $28 $38 $08 $68 $48 $c9 $ff $d0 $fe $28 $58 $08 $68
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$48 $c9 $fb $d0 $fe $28 $78 $08 $68 $48 $c9 $ff $d0 $fe $28 $d8
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$08 $68 $48 $c9 $f7 $d0 $fe $28 $f8 $08 $68 $48 $c9 $ff $d0 $fe
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$28 $b8 $08 $68 $48 $c9 $bf $d0 $fe $28 $a9 $00 $48 $28 $08 $68
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$48 $c9 $30 $d0 $fe $28 $38 $08 $68 $48 $c9 $31 $d0 $fe $28 $18
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$08 $68 $48 $c9 $30 $d0 $fe $28 $78 $08 $68 $48 $c9 $34 $d0 $fe
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$28 $58 $08 $68 $48 $c9 $30 $d0 $fe $28 $f8 $08 $68 $48 $c9 $38
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$d0 $fe $28 $d8 $08 $68 $48 $c9 $30 $d0 $fe $28 $a9 $40 $48 $28
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$08 $68 $48 $c9 $70 $d0 $fe $28 $b8 $08 $68 $48 $c9 $30 $d0 $fe
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$28 $ad $00 $02 $c9 $0c $d0 $fe $a9 $0d $8d $00 $02 $a2 $fe $a9
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$ff $48 $28 $e8 $08 $e0 $ff $d0 $fe $68 $48 $c9 $fd $d0 $fe $28
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$e8 $08 $e0 $00 $d0 $fe $68 $48 $c9 $7f $d0 $fe $28 $e8 $08 $e0
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$01 $d0 $fe $68 $48 $c9 $7d $d0 $fe $28 $ca $08 $e0 $00 $d0 $fe
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$68 $48 $c9 $7f $d0 $fe $28 $ca $08 $e0 $ff $d0 $fe $68 $48 $c9
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$fd $d0 $fe $28 $ca $a9 $00 $48 $28 $e8 $08 $e0 $ff $d0 $fe $68
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$48 $c9 $b0 $d0 $fe $28 $e8 $08 $e0 $00 $d0 $fe $68 $48 $c9 $32
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$d0 $fe $28 $e8 $08 $e0 $01 $d0 $fe $68 $48 $c9 $30 $d0 $fe $28
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$ca $08 $e0 $00 $d0 $fe $68 $48 $c9 $32 $d0 $fe $28 $ca $08 $e0
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$ff $d0 $fe $68 $48 $c9 $b0 $d0 $fe $28 $a0 $fe $a9 $ff $48 $28
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$c8 $08 $c0 $ff $d0 $fe $68 $48 $c9 $fd $d0 $fe $28 $c8 $08 $c0
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$00 $d0 $fe $68 $48 $c9 $7f $d0 $fe $28 $c8 $08 $c0 $01 $d0 $fe
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$68 $48 $c9 $7d $d0 $fe $28 $88 $08 $c0 $00 $d0 $fe $68 $48 $c9
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$7f $d0 $fe $28 $88 $08 $c0 $ff $d0 $fe $68 $48 $c9 $fd $d0 $fe
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$28 $88 $a9 $00 $48 $28 $c8 $08 $c0 $ff $d0 $fe $68 $48 $c9 $b0
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$d0 $fe $28 $c8 $08 $c0 $00 $d0 $fe $68 $48 $c9 $32 $d0 $fe $28
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$c8 $08 $c0 $01 $d0 $fe $68 $48 $c9 $30 $d0 $fe $28 $88 $08 $c0
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$00 $d0 $fe $68 $48 $c9 $32 $d0 $fe $28 $88 $08 $c0 $ff $d0 $fe
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$68 $48 $c9 $b0 $d0 $fe $28 $a2 $ff $a9 $ff $48 $28 $8a $08 $c9
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$ff $d0 $fe $68 $48 $c9 $fd $d0 $fe $28 $08 $e8 $28 $8a $08 $c9
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$00 $d0 $fe $68 $48 $c9 $7f $d0 $fe $28 $08 $e8 $28 $8a $08 $c9
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$01 $d0 $fe $68 $48 $c9 $7d $d0 $fe $28 $a9 $00 $48 $28 $8a $08
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$c9 $01 $d0 $fe $68 $48 $c9 $30 $d0 $fe $28 $08 $ca $28 $8a $08
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$c9 $00 $d0 $fe $68 $48 $c9 $32 $d0 $fe $28 $08 $ca $28 $8a $08
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$c9 $ff $d0 $fe $68 $48 $c9 $b0 $d0 $fe $28 $a0 $ff $a9 $ff $48
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$28 $98 $08 $c9 $ff $d0 $fe $68 $48 $c9 $fd $d0 $fe $28 $08 $c8
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$28 $98 $08 $c9 $00 $d0 $fe $68 $48 $c9 $7f $d0 $fe $28 $08 $c8
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$28 $98 $08 $c9 $01 $d0 $fe $68 $48 $c9 $7d $d0 $fe $28 $a9 $00
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$48 $28 $98 $08 $c9 $01 $d0 $fe $68 $48 $c9 $30 $d0 $fe $28 $08
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$88 $28 $98 $08 $c9 $00 $d0 $fe $68 $48 $c9 $32 $d0 $fe $28 $08
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$88 $28 $98 $08 $c9 $ff $d0 $fe $68 $48 $c9 $b0 $d0 $fe $28 $a9
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$ff $48 $a2 $ff $8a $28 $a8 $08 $c0 $ff $d0 $fe $68 $48 $c9 $fd
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$d0 $fe $28 $08 $e8 $8a $28 $a8 $08 $c0 $00 $d0 $fe $68 $48 $c9
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$7f $d0 $fe $28 $08 $e8 $8a $28 $a8 $08 $c0 $01 $d0 $fe $68 $48
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$c9 $7d $d0 $fe $28 $a9 $00 $48 $a9 $00 $8a $28 $a8 $08 $c0 $01
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$d0 $fe $68 $48 $c9 $30 $d0 $fe $28 $08 $ca $8a $28 $a8 $08 $c0
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$00 $d0 $fe $68 $48 $c9 $32 $d0 $fe $28 $08 $ca $8a $28 $a8 $08
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$c0 $ff $d0 $fe $68 $48 $c9 $b0 $d0 $fe $28 $a9 $ff $48 $a0 $ff
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$98 $28 $aa $08 $e0 $ff $d0 $fe $68 $48 $c9 $fd $d0 $fe $28 $08
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$c8 $98 $28 $aa $08 $e0 $00 $d0 $fe $68 $48 $c9 $7f $d0 $fe $28
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$08 $c8 $98 $28 $aa $08 $e0 $01 $d0 $fe $68 $48 $c9 $7d $d0 $fe
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$28 $a9 $00 $48 $a9 $00 $98 $28 $aa $08 $e0 $01 $d0 $fe $68 $48
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$c9 $30 $d0 $fe $28 $08 $88 $98 $28 $aa $08 $e0 $00 $d0 $fe $68
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$48 $c9 $32 $d0 $fe $28 $08 $88 $98 $28 $aa $08 $e0 $ff $d0 $fe
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$68 $48 $c9 $b0 $d0 $fe $28 $ad $00 $02 $c9 $0d $d0 $fe $a9 $0e
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$8d $00 $02 $a2 $01 $a9 $ff $48 $28 $9a $08 $ad $01 $01 $c9 $ff
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$d0 $fe $a9 $00 $48 $28 $9a $08 $ad $01 $01 $c9 $30 $d0 $fe $ca
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$a9 $ff $48 $28 $9a $08 $ad $00 $01 $c9 $ff $d0 $fe $a9 $00 $48
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$28 $9a $08 $ad $00 $01 $c9 $30 $d0 $fe $ca $a9 $ff $48 $28 $9a
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$08 $ad $ff $01 $c9 $ff $d0 $fe $a9 $00 $48 $28 $9a $08 $ad $ff
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$01 $c9 $30 $a2 $01 $9a $a9 $ff $48 $28 $ba $08 $e0 $01 $d0 $fe
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$ad $01 $01 $c9 $7d $d0 $fe $a9 $ff $48 $28 $ba $08 $e0 $00 $d0
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$fe $ad $00 $01 $c9 $7f $d0 $fe $a9 $ff $48 $28 $ba $08 $e0 $ff
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$d0 $fe $ad $ff $01 $c9 $fd $d0 $fe $a2 $01 $9a $a9 $00 $48 $28
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$ba $08 $e0 $01 $d0 $fe $ad $01 $01 $c9 $30 $d0 $fe $a9 $00 $48
|
||||
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|
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|
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|
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||||
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||||
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|
||||
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|
||||
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|
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||||
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||||
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||||
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|
||||
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||||
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|
||||
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||||
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||||
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||||
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|
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|
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|
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|
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|
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||||
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|
||||
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|
||||
$02 $d0 $fe $a9 $00 $48 $28 $a5 $16 $08 $49 $c3 $28 $8d $06 $02
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
$e8 $a2 $03 $a9 $00 $48 $b5 $13 $28 $4a $08 $dd $28 $02 $d0 $fe
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
$03 $a9 $fe $48 $b5 $13 $28 $2a $08 $dd $20 $02 $d0 $fe $68 $49
|
||||
$7c $dd $30 $02 $d0 $fe $ca $10 $e8 $a2 $03 $a9 $01 $48 $b5 $13
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
$e8 $a2 $03 $a9 $01 $48 $b5 $13 $28 $6a $08 $dd $2c $02 $d0 $fe
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
$d0 $fe $68 $49 $30 $dd $66 $02 $d0 $fe $ca $10 $e2 $a2 $03 $b5
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
$d0 $fe $68 $49 $30 $dd $66 $02 $d0 $fe $ca $10 $e6 $a2 $03 $a9
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
$68 $49 $30 $d9 $66 $02 $d0 $fe $ca $ca $88 $10 $e4 $a2 $06 $a0
|
||||
$03 $a9 $ff $48 $b9 $5a $02 $28 $21 $3a $08 $d9 $62 $02 $d0 $fe
|
||||
$68 $49 $7d $d9 $66 $02 $d0 $fe $ca $ca $88 $10 $e4 $a0 $03 $a9
|
||||
$00 $48 $b9 $5a $02 $28 $31 $3a $08 $d9 $62 $02 $d0 $fe $68 $49
|
||||
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|
||||
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|
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|
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|
||||
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||||
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|
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|
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|
||||
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|
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|
||||
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|
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|
||||
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||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
$d0 $fe $48 $8a $48 $ba $e0 $fd $d0 $fe $68 $aa $a9 $ff $48 $28
|
||||
$68 $e8 $49 $aa $4c $0f $09 $00 $01 $37 $64 $09 $4c $fc $36 $88
|
||||
$88 $08 $88 $88 $88 $28 $b0 $fe $70 $fe $30 $fe $f0 $fe $c9 $49
|
||||
$d0 $fe $e0 $4e $d0 $fe $c0 $41 $d0 $fe $48 $8a $48 $ba $e0 $fd
|
||||
$d0 $fe $68 $aa $a9 $ff $48 $28 $68 $e8 $49 $aa $6c $fa $36 $4c
|
||||
$2f $37 $88 $88 $08 $88 $88 $88 $28 $b0 $fe $70 $fe $30 $fe $f0
|
||||
$fe $c9 $4a $d0 $fe $e0 $53 $d0 $fe $c0 $4f $d0 $fe $48 $8a $48
|
||||
$ba $e0 $fb $d0 $fe $ad $ff $01 $c9 $09 $d0 $fe $ad $fe $01 $c9
|
||||
$9a $d0 $fe $a9 $ff $48 $28 $68 $aa $68 $e8 $49 $aa $60 $4c $6e
|
||||
$37 $4c $71 $37 $4c $74 $37 $88 $88 $08 $88 $88 $88 $c9 $42 $d0
|
||||
$fe $e0 $52 $d0 $fe $c0 $48 $d0 $fe $85 $0a $86 $0b $ba $bd $02
|
||||
$01 $c9 $30 $d0 $fe $68 $c9 $34 $d0 $fe $ba $e0 $fc $d0 $fe $ad
|
||||
$ff $01 $c9 $09 $d0 $fe $ad $fe $01 $c9 $d1 $d0 $fe $a9 $ff $48
|
||||
$28 $a6 $0b $e8 $a5 $0a $49 $aa $40 $4c $b9 $37 $00 $00 $00 $00
|
||||
ORG
|
||||
$fff0
|
||||
$00 $00 $00 $00 $00 $00 $00 $00 $00 $00 $71 $37 $74 $37 $79 $37
|
||||
EXEC
|
||||
$0400
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
124
BCDCodes.dev
124
BCDCodes.dev
|
|
@ -1,62 +1,62 @@
|
|||
[Project]
|
||||
FileName=BCDCodes.dev
|
||||
Name=BCDCodes
|
||||
Type=1
|
||||
Ver=2
|
||||
ObjFiles=
|
||||
Includes=
|
||||
Libs=
|
||||
PrivateResource=
|
||||
ResourceIncludes=
|
||||
MakeIncludes=
|
||||
Compiler=
|
||||
CppCompiler=
|
||||
Linker=
|
||||
IsCpp=0
|
||||
Icon=
|
||||
ExeOutput=
|
||||
ObjectOutput=
|
||||
LogOutput=
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||||
LogOutputEnabled=0
|
||||
OverrideOutput=0
|
||||
OverrideOutputName=
|
||||
HostApplication=
|
||||
UseCustomMakefile=0
|
||||
CustomMakefile=
|
||||
CommandLine=
|
||||
Folders=
|
||||
IncludeVersionInfo=0
|
||||
SupportXPThemes=0
|
||||
CompilerSet=3
|
||||
CompilerSettings=0000000100000000000000000
|
||||
UnitCount=1
|
||||
|
||||
[VersionInfo]
|
||||
Major=1
|
||||
Minor=0
|
||||
Release=0
|
||||
Build=0
|
||||
LanguageID=1033
|
||||
CharsetID=1252
|
||||
CompanyName=
|
||||
FileVersion=
|
||||
FileDescription=Developed using the Dev-C++ IDE
|
||||
InternalName=
|
||||
LegalCopyright=
|
||||
LegalTrademarks=
|
||||
OriginalFilename=
|
||||
ProductName=
|
||||
ProductVersion=
|
||||
AutoIncBuildNr=0
|
||||
SyncProduct=1
|
||||
|
||||
[Unit1]
|
||||
FileName=bcd.c
|
||||
CompileCpp=0
|
||||
Folder=
|
||||
Compile=1
|
||||
Link=1
|
||||
Priority=1000
|
||||
OverrideBuildCmd=0
|
||||
BuildCmd=
|
||||
|
||||
[Project]
|
||||
FileName=BCDCodes.dev
|
||||
Name=BCDCodes
|
||||
Type=1
|
||||
Ver=2
|
||||
ObjFiles=
|
||||
Includes=
|
||||
Libs=
|
||||
PrivateResource=
|
||||
ResourceIncludes=
|
||||
MakeIncludes=
|
||||
Compiler=
|
||||
CppCompiler=
|
||||
Linker=
|
||||
IsCpp=0
|
||||
Icon=
|
||||
ExeOutput=
|
||||
ObjectOutput=
|
||||
LogOutput=
|
||||
LogOutputEnabled=0
|
||||
OverrideOutput=0
|
||||
OverrideOutputName=
|
||||
HostApplication=
|
||||
UseCustomMakefile=0
|
||||
CustomMakefile=
|
||||
CommandLine=
|
||||
Folders=
|
||||
IncludeVersionInfo=0
|
||||
SupportXPThemes=0
|
||||
CompilerSet=3
|
||||
CompilerSettings=0000000100000000000000000
|
||||
UnitCount=1
|
||||
|
||||
[VersionInfo]
|
||||
Major=1
|
||||
Minor=0
|
||||
Release=0
|
||||
Build=0
|
||||
LanguageID=1033
|
||||
CharsetID=1252
|
||||
CompanyName=
|
||||
FileVersion=
|
||||
FileDescription=Developed using the Dev-C++ IDE
|
||||
InternalName=
|
||||
LegalCopyright=
|
||||
LegalTrademarks=
|
||||
OriginalFilename=
|
||||
ProductName=
|
||||
ProductVersion=
|
||||
AutoIncBuildNr=0
|
||||
SyncProduct=1
|
||||
|
||||
[Unit1]
|
||||
FileName=bcd.c
|
||||
CompileCpp=0
|
||||
Folder=
|
||||
Compile=1
|
||||
Link=1
|
||||
Priority=1000
|
||||
OverrideBuildCmd=0
|
||||
BuildCmd=
|
||||
|
||||
|
|
|
|||
|
|
@ -0,0 +1,8 @@
|
|||
[Editors]
|
||||
Order=0
|
||||
Focused=0
|
||||
[Editor_0]
|
||||
CursorCol=1
|
||||
CursorRow=34
|
||||
TopLine=1
|
||||
LeftChar=1
|
||||
|
|
@ -0,0 +1,62 @@
|
|||
[Project]
|
||||
FileName=Bin2Hex.dev
|
||||
Name=Bin2Hex
|
||||
Type=1
|
||||
Ver=2
|
||||
ObjFiles=
|
||||
Includes=
|
||||
Libs=
|
||||
PrivateResource=
|
||||
ResourceIncludes=
|
||||
MakeIncludes=
|
||||
Compiler=
|
||||
CppCompiler=
|
||||
Linker=
|
||||
IsCpp=0
|
||||
Icon=
|
||||
ExeOutput=
|
||||
ObjectOutput=
|
||||
LogOutput=
|
||||
LogOutputEnabled=0
|
||||
OverrideOutput=0
|
||||
OverrideOutputName=
|
||||
HostApplication=
|
||||
UseCustomMakefile=0
|
||||
CustomMakefile=
|
||||
CommandLine=
|
||||
Folders=
|
||||
IncludeVersionInfo=0
|
||||
SupportXPThemes=0
|
||||
CompilerSet=3
|
||||
CompilerSettings=0000000100000000000000000
|
||||
UnitCount=1
|
||||
|
||||
[VersionInfo]
|
||||
Major=1
|
||||
Minor=0
|
||||
Release=0
|
||||
Build=0
|
||||
LanguageID=1033
|
||||
CharsetID=1252
|
||||
CompanyName=
|
||||
FileVersion=
|
||||
FileDescription=Developed using the Dev-C++ IDE
|
||||
InternalName=
|
||||
LegalCopyright=
|
||||
LegalTrademarks=
|
||||
OriginalFilename=
|
||||
ProductName=
|
||||
ProductVersion=
|
||||
AutoIncBuildNr=0
|
||||
SyncProduct=1
|
||||
|
||||
[Unit1]
|
||||
FileName=bin2hex.c
|
||||
CompileCpp=0
|
||||
Folder=
|
||||
Compile=1
|
||||
Link=1
|
||||
Priority=1000
|
||||
OverrideBuildCmd=0
|
||||
BuildCmd=
|
||||
|
||||
|
|
@ -0,0 +1,8 @@
|
|||
[Editor_0]
|
||||
CursorCol=26
|
||||
CursorRow=111
|
||||
TopLine=28
|
||||
LeftChar=1
|
||||
[Editors]
|
||||
Order=0
|
||||
Focused=0
|
||||
557
Display.cpp
557
Display.cpp
|
|
@ -1,245 +1,312 @@
|
|||
#include "Display.h"
|
||||
#include <ctype.h>
|
||||
#include <cstdlib>
|
||||
#include <iostream>
|
||||
#include <string.h>
|
||||
|
||||
using namespace std;
|
||||
|
||||
/*
|
||||
*--------------------------------------------------------------------
|
||||
* Method:
|
||||
* Purpose:
|
||||
* Arguments:
|
||||
* Returns:
|
||||
*--------------------------------------------------------------------
|
||||
*/
|
||||
|
||||
namespace MKBasic {
|
||||
|
||||
/*
|
||||
*--------------------------------------------------------------------
|
||||
* Method:
|
||||
* Purpose:
|
||||
* Arguments:
|
||||
* Returns:
|
||||
*--------------------------------------------------------------------
|
||||
*/
|
||||
Display::Display()
|
||||
{
|
||||
InitScr();
|
||||
}
|
||||
|
||||
/*
|
||||
*--------------------------------------------------------------------
|
||||
* Method:
|
||||
* Purpose:
|
||||
* Arguments:
|
||||
* Returns:
|
||||
*--------------------------------------------------------------------
|
||||
*/
|
||||
Display::~Display()
|
||||
{
|
||||
}
|
||||
|
||||
/*
|
||||
*--------------------------------------------------------------------
|
||||
* Method: InitScr()
|
||||
* Purpose: Initialize screen.
|
||||
* Arguments: n/a
|
||||
* Returns: n/a
|
||||
*--------------------------------------------------------------------
|
||||
*/
|
||||
void Display::InitScr()
|
||||
{
|
||||
ClrScr();
|
||||
}
|
||||
|
||||
/*
|
||||
*--------------------------------------------------------------------
|
||||
* Method:
|
||||
* Purpose:
|
||||
* Arguments:
|
||||
* Returns:
|
||||
*--------------------------------------------------------------------
|
||||
*/
|
||||
void Display::ScrollUp()
|
||||
{
|
||||
for (int row=0; row<SCREENDIM_ROW-1; row++) {
|
||||
for (int col=0; col<SCREENDIM_COL; col++) {
|
||||
mScreen[col][row] = mScreen[col][row+1];
|
||||
}
|
||||
}
|
||||
for (int col=0; col<SCREENDIM_COL; col++) {
|
||||
mScreen[col][SCREENDIM_ROW-1] = ' ';
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
*--------------------------------------------------------------------
|
||||
* Method: GotoXY()
|
||||
* Purpose: Move cursor to new coordinates.
|
||||
* Arguments: col, row - integer values, new cursor coordinates
|
||||
* Returns: n/a
|
||||
*--------------------------------------------------------------------
|
||||
*/
|
||||
void Display::GotoXY(unsigned int col, unsigned int row)
|
||||
{
|
||||
if (col < SCREENDIM_COL && row < SCREENDIM_ROW) {
|
||||
mCursorCoord.col = col;
|
||||
mCursorCoord.row = row;
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
*--------------------------------------------------------------------
|
||||
* Method:
|
||||
* Purpose:
|
||||
* Arguments:
|
||||
* Returns:
|
||||
*--------------------------------------------------------------------
|
||||
*/
|
||||
bool Display::IsSpecChar(char c)
|
||||
{
|
||||
bool ret = false;
|
||||
char sct[] = {SCREENSPECCHARS_NL,
|
||||
SCREENSPECCHARS_CR,
|
||||
SCREENSPECCHARS_TB,
|
||||
SCREENSPECCHARS_BS,
|
||||
SCREENSPECCHARS_BE,
|
||||
0};
|
||||
|
||||
for (unsigned int i=0; i<strlen(sct); i++) {
|
||||
if (c == sct[i]) {
|
||||
ret = true;
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
/*
|
||||
*--------------------------------------------------------------------
|
||||
* Method: PutChar()
|
||||
* Purpose: Output character to console. If going outside
|
||||
* lower-right corner, scroll the contents up.
|
||||
* Arguments: c - character to output.
|
||||
* Returns: n/a
|
||||
*--------------------------------------------------------------------
|
||||
*/
|
||||
void Display::PutChar(char c)
|
||||
{
|
||||
if (isalnum(c) || ispunct(c) || isspace(c) || IsSpecChar(c))
|
||||
{
|
||||
if (c == SCREENSPECCHARS_NL) {
|
||||
//mCursorCoord.col = 0;
|
||||
mCursorCoord.row++;
|
||||
if (mCursorCoord.row >= SCREENDIM_ROW) {
|
||||
ScrollUp();
|
||||
mCursorCoord.row = SCREENDIM_ROW-1;
|
||||
}
|
||||
} else if (c == SCREENSPECCHARS_CR) {
|
||||
mCursorCoord.col = 0;
|
||||
} else if (c == SCREENSPECCHARS_TB) {
|
||||
mCursorCoord.col += TABSIZE;
|
||||
if (mCursorCoord.col >= SCREENDIM_COL) {
|
||||
mCursorCoord.col = SCREENDIM_COL-1; // must work on it some more
|
||||
}
|
||||
} else if (c == SCREENSPECCHARS_BS) {
|
||||
if (mCursorCoord.col > 0) mCursorCoord.col--;
|
||||
} else if (c == SCREENSPECCHARS_BE) {
|
||||
// no action
|
||||
}
|
||||
else {
|
||||
mScreen[mCursorCoord.col][mCursorCoord.row] = c;
|
||||
mCursorCoord.col++;
|
||||
if (mCursorCoord.col >= SCREENDIM_COL) {
|
||||
mCursorCoord.col = 0;
|
||||
mCursorCoord.row++;
|
||||
if (mCursorCoord.row >= SCREENDIM_ROW) {
|
||||
ScrollUp();
|
||||
mCursorCoord.row = SCREENDIM_ROW-1;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
*--------------------------------------------------------------------
|
||||
* Method: ClrScr()
|
||||
* Purpose: Fill the screen with spaces. Set cursor in left-upper
|
||||
* corner.
|
||||
* Arguments: n/a
|
||||
* Returns: n/a
|
||||
*--------------------------------------------------------------------
|
||||
*/
|
||||
void Display::ClrScr()
|
||||
{
|
||||
for (int col=0; col<SCREENDIM_COL; col++) {
|
||||
for (int row=0; row<SCREENDIM_ROW; row++) {
|
||||
mScreen[col][row] = ' ';
|
||||
}
|
||||
}
|
||||
mCursorCoord.col = mCursorCoord.row = 0;
|
||||
}
|
||||
|
||||
/*
|
||||
*--------------------------------------------------------------------
|
||||
* Method:
|
||||
* Purpose:
|
||||
* Arguments:
|
||||
* Returns:
|
||||
*--------------------------------------------------------------------
|
||||
*/
|
||||
char Display::GetCharAt(unsigned int col, unsigned int row)
|
||||
{
|
||||
char c = -1;
|
||||
|
||||
if (col < SCREENDIM_COL && row < SCREENDIM_ROW)
|
||||
c = mScreen[col][row];
|
||||
|
||||
return c;
|
||||
}
|
||||
|
||||
/*
|
||||
*--------------------------------------------------------------------
|
||||
* Method: ShowScr()
|
||||
* Purpose: Display contents of the emulated console on... well,
|
||||
* real console.
|
||||
* Arguments: n/a
|
||||
* Returns: n/a
|
||||
*--------------------------------------------------------------------
|
||||
*/
|
||||
void Display::ShowScr()
|
||||
{
|
||||
for (int row=0; row<SCREENDIM_ROW; row++) {
|
||||
string line;
|
||||
line.clear();
|
||||
for (int col=0; col<SCREENDIM_COL; col++) {
|
||||
char c = mScreen[col][row];
|
||||
if (mCursorCoord.col == col && mCursorCoord.row == row) {
|
||||
c = '_';
|
||||
}
|
||||
line = line + c;
|
||||
//putchar(mScreen[col][row]);
|
||||
}
|
||||
cout << line;
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
*--------------------------------------------------------------------
|
||||
* Method: GetCursorCoord()
|
||||
* Purpose: Get cursor coordinates.
|
||||
* Arguments: n/a
|
||||
* Returns: pointer to cursor coordinates
|
||||
*--------------------------------------------------------------------
|
||||
*/
|
||||
CursorCoord *Display::GetCursorCoord()
|
||||
{
|
||||
return &mCursorCoord;
|
||||
}
|
||||
|
||||
} // namespace MKBasic
|
||||
#include "Display.h"
|
||||
#include <ctype.h>
|
||||
#include <cstdlib>
|
||||
#include <iostream>
|
||||
#include <string.h>
|
||||
|
||||
using namespace std;
|
||||
|
||||
/*
|
||||
*--------------------------------------------------------------------
|
||||
* Method:
|
||||
* Purpose:
|
||||
* Arguments:
|
||||
* Returns:
|
||||
*--------------------------------------------------------------------
|
||||
*/
|
||||
|
||||
namespace MKBasic {
|
||||
|
||||
/*
|
||||
*--------------------------------------------------------------------
|
||||
* Method:
|
||||
* Purpose:
|
||||
* Arguments:
|
||||
* Returns:
|
||||
*--------------------------------------------------------------------
|
||||
*/
|
||||
Display::Display()
|
||||
{
|
||||
InitScr();
|
||||
}
|
||||
|
||||
/*
|
||||
*--------------------------------------------------------------------
|
||||
* Method:
|
||||
* Purpose:
|
||||
* Arguments:
|
||||
* Returns:
|
||||
*--------------------------------------------------------------------
|
||||
*/
|
||||
Display::~Display()
|
||||
{
|
||||
}
|
||||
|
||||
/*
|
||||
*--------------------------------------------------------------------
|
||||
* Method: InitScr()
|
||||
* Purpose: Initialize screen.
|
||||
* Arguments: n/a
|
||||
* Returns: n/a
|
||||
*--------------------------------------------------------------------
|
||||
*/
|
||||
void Display::InitScr()
|
||||
{
|
||||
mScrLines = SCREENDIM_ROW;
|
||||
mScrColumns = SCREENDIM_COL;
|
||||
mShellConsoleWidth = GetConsoleWidth();
|
||||
if (mScrColumns > mShellConsoleWidth) {
|
||||
mScrColumns = mShellConsoleWidth;
|
||||
}
|
||||
ClrScr();
|
||||
}
|
||||
|
||||
#if defined(WINDOWS)
|
||||
|
||||
#include <windows.h>
|
||||
#include <conio.h>
|
||||
|
||||
/*
|
||||
*--------------------------------------------------------------------
|
||||
* Method: GetConsoleWidth()
|
||||
* Purpose: Obtain the width of shell console (the real one, not
|
||||
* the emulated one) on Windows.
|
||||
* Arguments: n/a
|
||||
* Returns: int - width of the shell console.
|
||||
*--------------------------------------------------------------------
|
||||
*/
|
||||
int Display::GetConsoleWidth()
|
||||
{
|
||||
HANDLE hStdOut;
|
||||
CONSOLE_SCREEN_BUFFER_INFO csbi;
|
||||
|
||||
hStdOut = GetStdHandle( STD_OUTPUT_HANDLE );
|
||||
if (hStdOut == INVALID_HANDLE_VALUE) return -1;
|
||||
|
||||
if (!GetConsoleScreenBufferInfo( hStdOut, &csbi )) return -2;
|
||||
|
||||
return csbi.dwSize.X;
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
#if defined(LINUX)
|
||||
|
||||
#include <termcap.h>
|
||||
|
||||
/*
|
||||
*--------------------------------------------------------------------
|
||||
* Method: GetConsoleWidth()
|
||||
* Purpose: Obtain the width of shell console (the real one, not
|
||||
* the emulated one) on Linux.
|
||||
* Arguments: n/a
|
||||
* Returns: int - width of the shell console.
|
||||
*--------------------------------------------------------------------
|
||||
*/
|
||||
int Display::GetConsoleWidth()
|
||||
{
|
||||
unsigned int conwidth = SCREENDIM_COL;
|
||||
char *termtype = getenv("TERM");
|
||||
static char termbuf[2048];
|
||||
|
||||
if (tgetent(termbuf, termtype) < 0) {
|
||||
cout << "WARNING: Could not access the termcap data base." << endl;
|
||||
cout << " Unable to determine console width." << endl;
|
||||
} else {
|
||||
conwidth = tgetnum("co");
|
||||
}
|
||||
|
||||
return conwidth;
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
/*
|
||||
*--------------------------------------------------------------------
|
||||
* Method:
|
||||
* Purpose:
|
||||
* Arguments:
|
||||
* Returns:
|
||||
*--------------------------------------------------------------------
|
||||
*/
|
||||
void Display::ScrollUp()
|
||||
{
|
||||
for (unsigned int row=0; row<mScrLines-1; row++) {
|
||||
for (unsigned int col=0; col<mScrColumns; col++) {
|
||||
mScreen[col][row] = mScreen[col][row+1];
|
||||
}
|
||||
}
|
||||
for (unsigned int col=0; col<mScrColumns; col++) {
|
||||
mScreen[col][mScrLines-1] = ' ';
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
*--------------------------------------------------------------------
|
||||
* Method: GotoXY()
|
||||
* Purpose: Move cursor to new coordinates.
|
||||
* Arguments: col, row - integer values, new cursor coordinates
|
||||
* Returns: n/a
|
||||
*--------------------------------------------------------------------
|
||||
*/
|
||||
void Display::GotoXY(unsigned int col, unsigned int row)
|
||||
{
|
||||
if (col < mScrColumns && row < mScrLines) {
|
||||
mCursorCoord.col = col;
|
||||
mCursorCoord.row = row;
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
*--------------------------------------------------------------------
|
||||
* Method:
|
||||
* Purpose:
|
||||
* Arguments:
|
||||
* Returns:
|
||||
*--------------------------------------------------------------------
|
||||
*/
|
||||
bool Display::IsSpecChar(char c)
|
||||
{
|
||||
bool ret = false;
|
||||
char sct[] = {SCREENSPECCHARS_NL,
|
||||
SCREENSPECCHARS_CR,
|
||||
SCREENSPECCHARS_TB,
|
||||
SCREENSPECCHARS_BS,
|
||||
SCREENSPECCHARS_BE,
|
||||
0};
|
||||
|
||||
for (unsigned int i=0; i<strlen(sct); i++) {
|
||||
if (c == sct[i]) {
|
||||
ret = true;
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
/*
|
||||
*--------------------------------------------------------------------
|
||||
* Method: PutChar()
|
||||
* Purpose: Output character to console. If going outside
|
||||
* lower-right corner, scroll the contents up.
|
||||
* Arguments: c - character to output.
|
||||
* Returns: n/a
|
||||
*--------------------------------------------------------------------
|
||||
*/
|
||||
void Display::PutChar(char c)
|
||||
{
|
||||
if (isalnum(c) || ispunct(c) || isspace(c) || IsSpecChar(c))
|
||||
{
|
||||
if (c == SCREENSPECCHARS_NL) {
|
||||
//mCursorCoord.col = 0;
|
||||
mCursorCoord.row++;
|
||||
if (mCursorCoord.row >= mScrLines) {
|
||||
ScrollUp();
|
||||
mCursorCoord.row = mScrLines-1;
|
||||
}
|
||||
} else if (c == SCREENSPECCHARS_CR) {
|
||||
mCursorCoord.col = 0;
|
||||
} else if (c == SCREENSPECCHARS_TB) {
|
||||
mCursorCoord.col += TABSIZE;
|
||||
if (mCursorCoord.col >= mScrColumns) {
|
||||
mCursorCoord.col = mScrColumns-1; // must work on it some more
|
||||
}
|
||||
} else if (c == SCREENSPECCHARS_BS) {
|
||||
if (mCursorCoord.col > 0) mCursorCoord.col--;
|
||||
} else if (c == SCREENSPECCHARS_BE) {
|
||||
// no action
|
||||
}
|
||||
else {
|
||||
mScreen[mCursorCoord.col][mCursorCoord.row] = c;
|
||||
mCursorCoord.col++;
|
||||
if (mCursorCoord.col >= mScrColumns) {
|
||||
mCursorCoord.col = 0;
|
||||
mCursorCoord.row++;
|
||||
if (mCursorCoord.row >= mScrLines) {
|
||||
ScrollUp();
|
||||
mCursorCoord.row = mScrLines-1;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
*--------------------------------------------------------------------
|
||||
* Method: ClrScr()
|
||||
* Purpose: Fill the screen with spaces. Set cursor in left-upper
|
||||
* corner.
|
||||
* Arguments: n/a
|
||||
* Returns: n/a
|
||||
*--------------------------------------------------------------------
|
||||
*/
|
||||
void Display::ClrScr()
|
||||
{
|
||||
for (unsigned int col=0; col<mScrColumns; col++) {
|
||||
for (unsigned int row=0; row<mScrLines; row++) {
|
||||
mScreen[col][row] = ' ';
|
||||
}
|
||||
}
|
||||
mCursorCoord.col = mCursorCoord.row = 0;
|
||||
}
|
||||
|
||||
/*
|
||||
*--------------------------------------------------------------------
|
||||
* Method:
|
||||
* Purpose:
|
||||
* Arguments:
|
||||
* Returns:
|
||||
*--------------------------------------------------------------------
|
||||
*/
|
||||
char Display::GetCharAt(unsigned int col, unsigned int row)
|
||||
{
|
||||
char c = -1;
|
||||
|
||||
if (col < mScrColumns && row < mScrLines)
|
||||
c = mScreen[col][row];
|
||||
|
||||
return c;
|
||||
}
|
||||
|
||||
/*
|
||||
*--------------------------------------------------------------------
|
||||
* Method: ShowScr()
|
||||
* Purpose: Display contents of the emulated console on a... well,
|
||||
* real console.
|
||||
* Arguments: n/a
|
||||
* Returns: n/a
|
||||
*--------------------------------------------------------------------
|
||||
*/
|
||||
void Display::ShowScr()
|
||||
{
|
||||
for (unsigned int row=0; row<mScrLines; row++) {
|
||||
string line;
|
||||
line.clear();
|
||||
for (unsigned int col=0; col<mScrColumns; col++) {
|
||||
char c = mScreen[col][row];
|
||||
if (mCursorCoord.col == col && mCursorCoord.row == row) {
|
||||
c = '_';
|
||||
}
|
||||
line = line + c;
|
||||
}
|
||||
cout << line;
|
||||
// add extra NL if the real console is wider than emulated one
|
||||
if (mShellConsoleWidth > mScrColumns) cout << endl;
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
*--------------------------------------------------------------------
|
||||
* Method: GetCursorCoord()
|
||||
* Purpose: Get cursor coordinates.
|
||||
* Arguments: n/a
|
||||
* Returns: pointer to cursor coordinates
|
||||
*--------------------------------------------------------------------
|
||||
*/
|
||||
CursorCoord *Display::GetCursorCoord()
|
||||
{
|
||||
return &mCursorCoord;
|
||||
}
|
||||
|
||||
} // namespace MKBasic
|
||||
|
|
|
|||
114
Display.h
114
Display.h
|
|
@ -1,54 +1,60 @@
|
|||
#ifndef DISPLAY_H
|
||||
#define DISPLAY_H
|
||||
|
||||
#define TABSIZE 4
|
||||
|
||||
namespace MKBasic {
|
||||
|
||||
enum eScreenDimensions {
|
||||
SCREENDIM_COL = 80,
|
||||
SCREENDIM_ROW = 24
|
||||
};
|
||||
|
||||
enum eScreenSpecChars {
|
||||
SCREENSPECCHARS_NL = (int)'\n', // new line
|
||||
SCREENSPECCHARS_CR = (int)'\r', // caret
|
||||
SCREENSPECCHARS_TB = (int)'\t', // tab
|
||||
SCREENSPECCHARS_BS = (int)'\b', // backspace
|
||||
SCREENSPECCHARS_BE = (int)'\a' // bell
|
||||
};
|
||||
|
||||
struct CursorCoord {
|
||||
int row;
|
||||
int col;
|
||||
};
|
||||
|
||||
class Display
|
||||
{
|
||||
public:
|
||||
|
||||
Display();
|
||||
~Display();
|
||||
void GotoXY(unsigned int col, unsigned int row);
|
||||
void PutChar(char c);
|
||||
void ClrScr();
|
||||
char GetCharAt(unsigned int col, unsigned int row);
|
||||
void ShowScr();
|
||||
CursorCoord *GetCursorCoord();
|
||||
|
||||
protected:
|
||||
|
||||
private:
|
||||
|
||||
char mScreen[SCREENDIM_COL][SCREENDIM_ROW];
|
||||
CursorCoord mCursorCoord;
|
||||
|
||||
void InitScr();
|
||||
void ScrollUp();
|
||||
bool IsSpecChar(char c);
|
||||
|
||||
};
|
||||
|
||||
} // namespace MKBasic
|
||||
|
||||
#endif
|
||||
#ifndef DISPLAY_H
|
||||
#define DISPLAY_H
|
||||
|
||||
#include "system.h"
|
||||
|
||||
#define TABSIZE 4
|
||||
|
||||
namespace MKBasic {
|
||||
|
||||
enum eScreenDimensions {
|
||||
SCREENDIM_COL = 80,
|
||||
SCREENDIM_ROW = 24
|
||||
};
|
||||
|
||||
enum eScreenSpecChars {
|
||||
SCREENSPECCHARS_NL = (int)'\n', // new line
|
||||
SCREENSPECCHARS_CR = (int)'\r', // caret
|
||||
SCREENSPECCHARS_TB = (int)'\t', // tab
|
||||
SCREENSPECCHARS_BS = (int)'\b', // backspace
|
||||
SCREENSPECCHARS_BE = (int)'\a' // bell
|
||||
};
|
||||
|
||||
struct CursorCoord {
|
||||
unsigned int row;
|
||||
unsigned int col;
|
||||
};
|
||||
|
||||
class Display
|
||||
{
|
||||
public:
|
||||
|
||||
Display();
|
||||
~Display();
|
||||
void GotoXY(unsigned int col, unsigned int row);
|
||||
void PutChar(char c);
|
||||
void ClrScr();
|
||||
char GetCharAt(unsigned int col, unsigned int row);
|
||||
void ShowScr();
|
||||
CursorCoord *GetCursorCoord();
|
||||
|
||||
protected:
|
||||
|
||||
private:
|
||||
|
||||
char mScreen[SCREENDIM_COL][SCREENDIM_ROW];
|
||||
CursorCoord mCursorCoord;
|
||||
unsigned int mShellConsoleWidth;
|
||||
unsigned int mScrLines;
|
||||
unsigned int mScrColumns;
|
||||
|
||||
void InitScr();
|
||||
void ScrollUp();
|
||||
bool IsSpecChar(char c);
|
||||
int GetConsoleWidth();
|
||||
|
||||
};
|
||||
|
||||
} // namespace MKBasic
|
||||
|
||||
#endif
|
||||
|
|
|
|||
26
MKBasic.cpp
26
MKBasic.cpp
|
|
@ -1,13 +1,13 @@
|
|||
#include "MKBasic.h"
|
||||
|
||||
namespace MKBasic {
|
||||
|
||||
MKBasic::MKBasic()
|
||||
{
|
||||
}
|
||||
|
||||
MKBasic::~MKBasic()
|
||||
{
|
||||
}
|
||||
|
||||
} // namespace MKBasic
|
||||
#include "MKBasic.h"
|
||||
|
||||
namespace MKBasic {
|
||||
|
||||
MKBasic::MKBasic()
|
||||
{
|
||||
}
|
||||
|
||||
MKBasic::~MKBasic()
|
||||
{
|
||||
}
|
||||
|
||||
} // namespace MKBasic
|
||||
|
|
|
|||
374
MKBasic.dev
374
MKBasic.dev
|
|
@ -1,182 +1,192 @@
|
|||
[Project]
|
||||
FileName=MKBasic.dev
|
||||
Name=MKBasic
|
||||
Type=1
|
||||
Ver=2
|
||||
ObjFiles=
|
||||
Includes=
|
||||
Libs=
|
||||
PrivateResource=
|
||||
ResourceIncludes=
|
||||
MakeIncludes=
|
||||
Compiler=
|
||||
CppCompiler=
|
||||
Linker=
|
||||
IsCpp=1
|
||||
Icon=
|
||||
ExeOutput=
|
||||
ObjectOutput=
|
||||
LogOutput=
|
||||
LogOutputEnabled=0
|
||||
OverrideOutput=0
|
||||
OverrideOutputName=MKBasic.exe
|
||||
HostApplication=
|
||||
UseCustomMakefile=0
|
||||
CustomMakefile=
|
||||
CommandLine=
|
||||
Folders=
|
||||
IncludeVersionInfo=0
|
||||
SupportXPThemes=0
|
||||
CompilerSet=3
|
||||
CompilerSettings=00000001c0111000001000000
|
||||
UnitCount=13
|
||||
|
||||
[VersionInfo]
|
||||
Major=1
|
||||
Minor=0
|
||||
Release=0
|
||||
Build=0
|
||||
LanguageID=1033
|
||||
CharsetID=1252
|
||||
CompanyName=
|
||||
FileVersion=1.0.0.0
|
||||
FileDescription=Developed using the Dev-C++ IDE
|
||||
InternalName=
|
||||
LegalCopyright=
|
||||
LegalTrademarks=
|
||||
OriginalFilename=
|
||||
ProductName=
|
||||
ProductVersion=1.0.0.0
|
||||
AutoIncBuildNr=0
|
||||
SyncProduct=1
|
||||
|
||||
[Unit1]
|
||||
FileName=main.cpp
|
||||
CompileCpp=1
|
||||
Folder=
|
||||
Compile=1
|
||||
Link=1
|
||||
Priority=1000
|
||||
OverrideBuildCmd=0
|
||||
BuildCmd=
|
||||
|
||||
[Unit2]
|
||||
FileName=VMachine.h
|
||||
CompileCpp=1
|
||||
Folder=
|
||||
Compile=1
|
||||
Link=1
|
||||
Priority=1000
|
||||
OverrideBuildCmd=0
|
||||
BuildCmd=
|
||||
|
||||
[Unit3]
|
||||
FileName=VMachine.cpp
|
||||
CompileCpp=1
|
||||
Folder=
|
||||
Compile=1
|
||||
Link=1
|
||||
Priority=1000
|
||||
OverrideBuildCmd=0
|
||||
BuildCmd=
|
||||
|
||||
[Unit4]
|
||||
FileName=MKBasic.h
|
||||
CompileCpp=1
|
||||
Folder=
|
||||
Compile=1
|
||||
Link=1
|
||||
Priority=1000
|
||||
OverrideBuildCmd=0
|
||||
BuildCmd=
|
||||
|
||||
[Unit5]
|
||||
FileName=MKBasic.cpp
|
||||
CompileCpp=1
|
||||
Folder=
|
||||
Compile=1
|
||||
Link=1
|
||||
Priority=1000
|
||||
OverrideBuildCmd=0
|
||||
BuildCmd=
|
||||
|
||||
[Unit6]
|
||||
FileName=MKCpu.h
|
||||
CompileCpp=1
|
||||
Folder=
|
||||
Compile=1
|
||||
Link=1
|
||||
Priority=1000
|
||||
OverrideBuildCmd=0
|
||||
BuildCmd=
|
||||
|
||||
[Unit7]
|
||||
FileName=MKCpu.cpp
|
||||
CompileCpp=1
|
||||
Folder=
|
||||
Compile=1
|
||||
Link=1
|
||||
Priority=1000
|
||||
OverrideBuildCmd=0
|
||||
BuildCmd=
|
||||
|
||||
[Unit8]
|
||||
FileName=Memory.h
|
||||
CompileCpp=1
|
||||
Folder=
|
||||
Compile=1
|
||||
Link=1
|
||||
Priority=1000
|
||||
OverrideBuildCmd=0
|
||||
BuildCmd=
|
||||
|
||||
[Unit9]
|
||||
FileName=Memory.cpp
|
||||
CompileCpp=1
|
||||
Folder=
|
||||
Compile=1
|
||||
Link=1
|
||||
Priority=1000
|
||||
OverrideBuildCmd=0
|
||||
BuildCmd=
|
||||
|
||||
[Unit10]
|
||||
FileName=Display.h
|
||||
CompileCpp=1
|
||||
Folder=
|
||||
Compile=1
|
||||
Link=1
|
||||
Priority=1000
|
||||
OverrideBuildCmd=0
|
||||
BuildCmd=
|
||||
|
||||
[Unit11]
|
||||
FileName=Display.cpp
|
||||
CompileCpp=1
|
||||
Folder=
|
||||
Compile=1
|
||||
Link=1
|
||||
Priority=1000
|
||||
OverrideBuildCmd=0
|
||||
BuildCmd=
|
||||
|
||||
[Unit12]
|
||||
FileName=MKGenException.h
|
||||
CompileCpp=1
|
||||
Folder=
|
||||
Compile=1
|
||||
Link=1
|
||||
Priority=1000
|
||||
OverrideBuildCmd=0
|
||||
BuildCmd=
|
||||
|
||||
[Unit13]
|
||||
FileName=MKGenException.cpp
|
||||
CompileCpp=1
|
||||
Folder=
|
||||
Compile=1
|
||||
Link=1
|
||||
Priority=1000
|
||||
OverrideBuildCmd=0
|
||||
BuildCmd=
|
||||
|
||||
[Project]
|
||||
FileName=MKBasic.dev
|
||||
Name=MKBasic
|
||||
Type=1
|
||||
Ver=2
|
||||
ObjFiles=
|
||||
Includes=
|
||||
Libs=
|
||||
PrivateResource=
|
||||
ResourceIncludes=
|
||||
MakeIncludes=
|
||||
Compiler=
|
||||
CppCompiler=
|
||||
Linker=
|
||||
IsCpp=1
|
||||
Icon=
|
||||
ExeOutput=
|
||||
ObjectOutput=
|
||||
LogOutput=
|
||||
LogOutputEnabled=0
|
||||
OverrideOutput=0
|
||||
OverrideOutputName=MKBasic.exe
|
||||
HostApplication=
|
||||
UseCustomMakefile=0
|
||||
CustomMakefile=
|
||||
CommandLine=
|
||||
Folders=
|
||||
IncludeVersionInfo=0
|
||||
SupportXPThemes=0
|
||||
CompilerSet=3
|
||||
CompilerSettings=00000001c0111000001000000
|
||||
UnitCount=14
|
||||
|
||||
[VersionInfo]
|
||||
Major=1
|
||||
Minor=0
|
||||
Release=0
|
||||
Build=0
|
||||
LanguageID=1033
|
||||
CharsetID=1252
|
||||
CompanyName=
|
||||
FileVersion=1.0.0.0
|
||||
FileDescription=Developed using the Dev-C++ IDE
|
||||
InternalName=
|
||||
LegalCopyright=
|
||||
LegalTrademarks=
|
||||
OriginalFilename=
|
||||
ProductName=
|
||||
ProductVersion=1.0.0.0
|
||||
AutoIncBuildNr=0
|
||||
SyncProduct=1
|
||||
|
||||
[Unit1]
|
||||
FileName=main.cpp
|
||||
CompileCpp=1
|
||||
Folder=
|
||||
Compile=1
|
||||
Link=1
|
||||
Priority=1000
|
||||
OverrideBuildCmd=0
|
||||
BuildCmd=
|
||||
|
||||
[Unit2]
|
||||
FileName=VMachine.h
|
||||
CompileCpp=1
|
||||
Folder=
|
||||
Compile=1
|
||||
Link=1
|
||||
Priority=1000
|
||||
OverrideBuildCmd=0
|
||||
BuildCmd=
|
||||
|
||||
[Unit3]
|
||||
FileName=VMachine.cpp
|
||||
CompileCpp=1
|
||||
Folder=
|
||||
Compile=1
|
||||
Link=1
|
||||
Priority=1000
|
||||
OverrideBuildCmd=0
|
||||
BuildCmd=
|
||||
|
||||
[Unit4]
|
||||
FileName=MKBasic.h
|
||||
CompileCpp=1
|
||||
Folder=
|
||||
Compile=1
|
||||
Link=1
|
||||
Priority=1000
|
||||
OverrideBuildCmd=0
|
||||
BuildCmd=
|
||||
|
||||
[Unit5]
|
||||
FileName=MKBasic.cpp
|
||||
CompileCpp=1
|
||||
Folder=
|
||||
Compile=1
|
||||
Link=1
|
||||
Priority=1000
|
||||
OverrideBuildCmd=0
|
||||
BuildCmd=
|
||||
|
||||
[Unit6]
|
||||
FileName=MKCpu.h
|
||||
CompileCpp=1
|
||||
Folder=
|
||||
Compile=1
|
||||
Link=1
|
||||
Priority=1000
|
||||
OverrideBuildCmd=0
|
||||
BuildCmd=
|
||||
|
||||
[Unit7]
|
||||
FileName=MKCpu.cpp
|
||||
CompileCpp=1
|
||||
Folder=
|
||||
Compile=1
|
||||
Link=1
|
||||
Priority=1000
|
||||
OverrideBuildCmd=0
|
||||
BuildCmd=
|
||||
|
||||
[Unit8]
|
||||
FileName=Memory.h
|
||||
CompileCpp=1
|
||||
Folder=
|
||||
Compile=1
|
||||
Link=1
|
||||
Priority=1000
|
||||
OverrideBuildCmd=0
|
||||
BuildCmd=
|
||||
|
||||
[Unit9]
|
||||
FileName=Memory.cpp
|
||||
CompileCpp=1
|
||||
Folder=
|
||||
Compile=1
|
||||
Link=1
|
||||
Priority=1000
|
||||
OverrideBuildCmd=0
|
||||
BuildCmd=
|
||||
|
||||
[Unit10]
|
||||
FileName=Display.h
|
||||
CompileCpp=1
|
||||
Folder=
|
||||
Compile=1
|
||||
Link=1
|
||||
Priority=1000
|
||||
OverrideBuildCmd=0
|
||||
BuildCmd=
|
||||
|
||||
[Unit11]
|
||||
FileName=Display.cpp
|
||||
CompileCpp=1
|
||||
Folder=
|
||||
Compile=1
|
||||
Link=1
|
||||
Priority=1000
|
||||
OverrideBuildCmd=0
|
||||
BuildCmd=
|
||||
|
||||
[Unit12]
|
||||
FileName=MKGenException.h
|
||||
CompileCpp=1
|
||||
Folder=
|
||||
Compile=1
|
||||
Link=1
|
||||
Priority=1000
|
||||
OverrideBuildCmd=0
|
||||
BuildCmd=
|
||||
|
||||
[Unit13]
|
||||
FileName=MKGenException.cpp
|
||||
CompileCpp=1
|
||||
Folder=
|
||||
Compile=1
|
||||
Link=1
|
||||
Priority=1000
|
||||
OverrideBuildCmd=0
|
||||
BuildCmd=
|
||||
|
||||
[Unit14]
|
||||
FileName=system.h
|
||||
CompileCpp=1
|
||||
Folder=
|
||||
Compile=1
|
||||
Link=1
|
||||
Priority=1000
|
||||
OverrideBuildCmd=0
|
||||
BuildCmd=
|
||||
|
||||
|
|
|
|||
36
MKBasic.h
36
MKBasic.h
|
|
@ -1,18 +1,18 @@
|
|||
#ifndef MKBASIC_H
|
||||
#define MKBASIC_H
|
||||
|
||||
#include "VMachine.h"
|
||||
|
||||
namespace MKBasic {
|
||||
|
||||
class MKBasic : public VMachine
|
||||
{
|
||||
public:
|
||||
MKBasic();
|
||||
~MKBasic();
|
||||
protected:
|
||||
};
|
||||
|
||||
} // namespace MKBasic
|
||||
|
||||
#endif
|
||||
#ifndef MKBASIC_H
|
||||
#define MKBASIC_H
|
||||
|
||||
#include "VMachine.h"
|
||||
|
||||
namespace MKBasic {
|
||||
|
||||
class MKBasic : public VMachine
|
||||
{
|
||||
public:
|
||||
MKBasic();
|
||||
~MKBasic();
|
||||
protected:
|
||||
};
|
||||
|
||||
} // namespace MKBasic
|
||||
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -0,0 +1,38 @@
|
|||
[Editors]
|
||||
Order=0,7,8,1,2,5,6
|
||||
Focused=0
|
||||
[Editor_0]
|
||||
CursorCol=17
|
||||
CursorRow=470
|
||||
TopLine=424
|
||||
LeftChar=1
|
||||
[Editor_1]
|
||||
CursorCol=33
|
||||
CursorRow=38
|
||||
TopLine=28
|
||||
LeftChar=1
|
||||
[Editor_2]
|
||||
CursorCol=15
|
||||
CursorRow=600
|
||||
TopLine=554
|
||||
LeftChar=1
|
||||
[Editor_5]
|
||||
CursorCol=1
|
||||
CursorRow=1
|
||||
TopLine=260
|
||||
LeftChar=1
|
||||
[Editor_6]
|
||||
CursorCol=17
|
||||
CursorRow=1151
|
||||
TopLine=332
|
||||
LeftChar=1
|
||||
[Editor_7]
|
||||
CursorCol=1
|
||||
CursorRow=1
|
||||
TopLine=25
|
||||
LeftChar=1
|
||||
[Editor_8]
|
||||
CursorCol=1
|
||||
CursorRow=1
|
||||
TopLine=220
|
||||
LeftChar=1
|
||||
886
MKCpu.h
886
MKCpu.h
|
|
@ -1,424 +1,462 @@
|
|||
#ifndef MKCPU_H
|
||||
#define MKCPU_H
|
||||
|
||||
#include "Memory.h"
|
||||
|
||||
namespace MKBasic {
|
||||
|
||||
struct Regs {
|
||||
unsigned char Acc; // 8-bit accumulator
|
||||
unsigned short Acc16; // 16-bit accumulator
|
||||
unsigned char IndX; // 8-bit index register X
|
||||
unsigned char IndY; // 8-bit index register Y
|
||||
unsigned short Ptr16; // general purpose 16-bit register
|
||||
unsigned short PtrAddr; // cpu code counter - current read/write address
|
||||
unsigned char PtrStack; // 8-bit stack pointer (0-255).
|
||||
unsigned char Flags; // CPU flags
|
||||
bool SoftIrq; // true when interrupted with BRK
|
||||
bool LastRTS; // true if RTS encountered and stack empty.
|
||||
};
|
||||
|
||||
/*
|
||||
* Virtual CPU, 6502 addressing modes:
|
||||
|
||||
+---------------------+--------------------------+
|
||||
| mode | assembler format |
|
||||
+=====================+==========================+
|
||||
| Immediate | #aa |
|
||||
| Absolute | aaaa |
|
||||
| Zero Page | aa | Note:
|
||||
| Implied | |
|
||||
| Indirect Absolute | (aaaa) | aa = 2 hex digits
|
||||
| Absolute Indexed,X | aaaa,X | as $FF
|
||||
| Absolute Indexed,Y | aaaa,Y |
|
||||
| Zero Page Indexed,X | aa,X | aaaa = 4 hex
|
||||
| Zero Page Indexed,Y | aa,Y | digits as
|
||||
| Indexed Indirect | (aa,X) | $FFFF
|
||||
| Indirect Indexed | (aa),Y |
|
||||
| Relative | aaaa | Can also be
|
||||
| Accumulator | A | assembler labels
|
||||
+---------------------+--------------------------+
|
||||
|
||||
Short notation:
|
||||
|
||||
imm = #$00
|
||||
zp = $00
|
||||
zpx = $00,X
|
||||
zpy = $00,Y
|
||||
izx = ($00,X)
|
||||
izy = ($00),Y
|
||||
abs = $0000
|
||||
abx = $0000,X
|
||||
aby = $0000,Y
|
||||
ind = ($0000)
|
||||
rel = $0000 (PC-relative)
|
||||
|
||||
See: 6502AssemblyInOneStep.txt for details.
|
||||
|
||||
*/
|
||||
enum eAddrModes {
|
||||
ADDRMODE_IMM = 0,
|
||||
ADDRMODE_ABS,
|
||||
ADDRMODE_ZP,
|
||||
ADDRMODE_IMP,
|
||||
ADDRMODE_IND,
|
||||
ADDRMODE_ABX,
|
||||
ADDRMODE_ABY,
|
||||
ADDRMODE_ZPX,
|
||||
ADDRMODE_ZPY,
|
||||
ADDRMODE_IZX,
|
||||
ADDRMODE_IZY,
|
||||
ADDRMODE_REL,
|
||||
ADDRMODE_ACC
|
||||
};
|
||||
// assumed little-endian order of bytes (start with least significant)
|
||||
// MEM - memory location from where the value is read/written,
|
||||
// & - reference operator (e.g.: &addr means: value under addr memory location)
|
||||
// PC - program counter (PC+1 means - next memory location after opcode)
|
||||
enum eOpCodes {
|
||||
OPCODE_BRK = 0x00, // software interrupt, no arguments ($00 : BRK)
|
||||
|
||||
/* full compatibility with 65C02 (illegal opcodes not supported, will be used for extended functions */
|
||||
OPCODE_ORA_IZX = 0x01, // bitwise OR with Accumulator, Indexed Indirect ($01 arg : ORA (arg,X) ;arg=0..$FF), MEM=&(arg+X)
|
||||
OPCODE_ILL_02 = 0x02, // illegal opcode
|
||||
OPCODE_ILL_03 = 0x03, // illegal opcode
|
||||
OPCODE_ILL_04 = 0x04, // illegal opcode
|
||||
OPCODE_ORA_ZP = 0x05, // bitwise OR with Accumulator, Zero Page ($05 arg : ORA arg ;arg=0..$FF), MEM=arg
|
||||
OPCODE_ASL_ZP = 0x06, // Arithmetic Shift Left, Zero Page ($06 arg : ASL arg ;arg=0..$FF), MEM=arg
|
||||
OPCODE_ILL_07 = 0x07, // illegal opcode
|
||||
OPCODE_PHP = 0x08, // PusH Processor status on Stack, Implied ($08 : PHP)
|
||||
OPCODE_ORA_IMM = 0x09, // bitwise OR with Accumulator, Immediate ($09 arg : ORA #arg ;arg=0..$FF), MEM=PC+1
|
||||
OPCODE_ASL = 0x0A, // Arithmetic Shift Left, Accumulator ($0A : ASL)
|
||||
OPCODE_ILL_0B = 0x0B, // illegal opcode
|
||||
OPCODE_ILL_0C = 0x0C, // illegal opcode
|
||||
OPCODE_ORA_ABS = 0x0D, // bitwise OR with Accumulator, Absolute ($0D addrlo addrhi : ORA addr ;addr=0..$FFFF), MEM=addr
|
||||
OPCODE_ASL_ABS = 0x0E, // Arithmetic Shift Left, Absolute ($0E addrlo addrhi : ASL addr ;addr=0..$FFFF), MEM=addr
|
||||
OPCODE_ILL_0F = 0x0F, // illegal opcode
|
||||
OPCODE_BPL_REL = 0x10, // Branch on PLus, Relative ($10 signoffs : BPL signoffs ;signoffs=0..$FF [-128 ($80)..127 ($7F)])
|
||||
OPCODE_ORA_IZY = 0x11, // bitwise OR with Accumulator, Indirect Indexed ($11 arg : ORA (arg),Y ;arg=0..$FF), MEM=&arg+Y
|
||||
OPCODE_ILL_12 = 0x12, // illegal opcode
|
||||
OPCODE_ILL_13 = 0x13, // illegal opcode
|
||||
OPCODE_ILL_14 = 0x14, // illegal opcode
|
||||
OPCODE_ORA_ZPX = 0x15, // bitwise OR with Accumulator, Zero Page Indexed, X ($15 arg : ORA arg,X ;arg=0..$FF), MEM=arg+X
|
||||
OPCODE_ASL_ZPX = 0x16, // Arithmetic Shift Left, Zero Page Indexed, X ($16 arg : ASL arg,X ;arg=0..$FF), MEM=arg+X
|
||||
OPCODE_ILL_17 = 0x17, // illegal opcode
|
||||
OPCODE_CLC = 0x18, // CLear Carry, Implied ($18 : CLC)
|
||||
OPCODE_ORA_ABY = 0x19, // bitwise OR with Accumulator, Absolute Indexed, Y ($19 addrlo addrhi : ORA addr,Y ;addr=0..$FFFF), MEM=addr+Y
|
||||
OPCODE_ILL_1A = 0x1A, // illegal opcode
|
||||
OPCODE_ILL_1B = 0x1B, // illegal opcode
|
||||
OPCODE_ILL_1C = 0x1C, // illegal opcode
|
||||
OPCODE_ORA_ABX = 0x1D, // bitwise OR with Accumulator, Absolute Indexed, X ($1D addrlo addrhi : ORA addr,X ;addr=0..$FFFF), MEM=addr+X
|
||||
OPCODE_ASL_ABX = 0x1E, // Arithmetic Shift Left, Absolute Indexed, X ($1E addrlo addrhi : ASL addr,X ;addr=0..$FFFF), MEM=addr+X
|
||||
OPCODE_ILL_1F = 0x1F, // illegal opcode
|
||||
OPCODE_JSR_ABS = 0x20, // Jump to SubRoutine, Absolute ($20 addrlo addrhi : JSR addr ;addr=0..$FFFF), MEM=addr
|
||||
OPCODE_AND_IZX = 0x21, // bitwise AND with accumulator, Indexed Indirect ($21 arg : AND (arg,X) ;arg=0..$FF), MEM=&(arg+X)
|
||||
OPCODE_ILL_22 = 0x22, // illegal opcode
|
||||
OPCODE_ILL_23 = 0x23, // illegal opcode
|
||||
OPCODE_BIT_ZP = 0x24, // test BITs, Zero Page ($24 arg : BIT arg ;arg=0..$FF), MEM=arg
|
||||
OPCODE_AND_ZP = 0x25, // bitwise AND with accumulator, Zero Page ($25 arg : AND arg ;arg=0..$FF), MEM=arg
|
||||
OPCODE_ROL_ZP = 0x26, // ROtate Left, Zero Page ($26 arg : ROL arg ;arg=0..$FF), MEM=arg
|
||||
OPCODE_ILL_27 = 0x27, // illegal opcode
|
||||
OPCODE_PLP = 0x28, // PuLl Processor status, Implied ($28 : PLP)
|
||||
OPCODE_AND_IMM = 0x29, // bitwise AND with accumulator, Immediate ($29 arg : AND #arg ;arg=0..$FF), MEM=PC+1
|
||||
OPCODE_ROL = 0x2A, // ROtate Left, Accumulator ($2A : ROL)
|
||||
OPCODE_ILL_2B = 0x2B, // illegal opcode
|
||||
OPCODE_BIT_ABS = 0x2C, // test BITs, Absolute ($2C addrlo addrhi : BIT addr ;addr=0..$FFFF), MEM=addr
|
||||
OPCODE_AND_ABS = 0x2D, // bitwise AND with accumulator, Absolute ($2D addrlo addrhi : AND addr ;addr=0..$FFFF), MEM=addr
|
||||
OPCODE_ROL_ABS = 0x2E, // ROtate Left, Absolute ($2E addrlo addrhi : ROL addr ;addr=0..$FFFF), MEM=addr
|
||||
OPCODE_ILL_2F = 0x2F, // illegal opcode
|
||||
OPCODE_BMI_REL = 0x30, // Branch on MInus, Relative ($30 signoffs : BMI signoffs ;signoffs=0..$FF [-128 ($80)..127 ($7F)])
|
||||
OPCODE_AND_IZY = 0x31, // bitwise AND with accumulator, Indirect Indexed ($31 arg : AND (arg),Y ;arg=0..$FF), MEM=&arg+Y
|
||||
OPCODE_ILL_32 = 0x32, // illegal opcode
|
||||
OPCODE_ILL_33 = 0x33, // illegal opcode
|
||||
OPCODE_ILL_34 = 0x34, // illegal opcode
|
||||
OPCODE_AND_ZPX = 0x35, // bitwise AND with accumulator, Zero Page Indexed, X ($35 arg : AND arg,X ;arg=0..$FF), MEM=arg+X
|
||||
OPCODE_ROL_ZPX = 0x36, // ROtate Left, Zero Page Indexed, X ($36 arg : ROL arg,X ;arg=0..$FF), MEM=arg+X
|
||||
OPCODE_ILL_37 = 0x37, // illegal opcode
|
||||
OPCODE_SEC = 0x38, // SEt Carry, Implied ($38 : SEC)
|
||||
OPCODE_AND_ABY = 0x39, // bitwise AND with accumulator, Absolute Indexed, Y ($39 addrlo addrhi : AND addr,Y ;addr=0..$FFFF), MEM=addr+Y
|
||||
OPCODE_ILL_3A = 0x3A, // illegal opcode
|
||||
OPCODE_ILL_3B = 0x3B, // illegal opcode
|
||||
OPCODE_ILL_3C = 0x3C, // illegal opcode
|
||||
OPCODE_AND_ABX = 0x3D, // bitwise AND with accumulator, Absolute Indexed, X ($3D addrlo addrhi : AND addr,X ;addr=0..$FFFF), MEM=addr+X
|
||||
OPCODE_ROL_ABX = 0x3E, // ROtate Left, Absolute Indexed, X ($3E addrlo addrhi : ROL addr,X ;addr=0..$FFFF), MEM=addr+X
|
||||
OPCODE_ILL_3F = 0x3F, // illegal opcode
|
||||
OPCODE_RTI = 0x40, // ReTurn from Interrupt, Implied ($40 : RTI)
|
||||
OPCODE_EOR_IZX = 0x41, // bitwise Exclusive OR, Indexed Indirect ($41 arg : EOR (arg,X) ;arg=0..$FF), MEM=&(arg+X)
|
||||
OPCODE_ILL_42 = 0x42, // illegal opcode
|
||||
OPCODE_ILL_43 = 0x43, // illegal opcode
|
||||
OPCODE_ILL_44 = 0x44, // illegal opcode
|
||||
OPCODE_EOR_ZP = 0x45, // bitwise Exclusive OR, Zero Page ($45 arg : EOR arg ;arg=0..$FF), MEM=arg
|
||||
OPCODE_LSR_ZP = 0x46, // Logical Shift Right, Zero Page ($46 arg : LSR arg ;arg=0..$FF), MEM=arg
|
||||
OPCODE_ILL_47 = 0x47, // illegal opcode
|
||||
OPCODE_PHA = 0x48, // PusH Accumulator, Implied ($48 : PHA)
|
||||
OPCODE_EOR_IMM = 0x49, // bitwise Exclusive OR, Immediate ($49 arg : EOR #arg ;arg=0..$FF), MEM=PC+1
|
||||
OPCODE_LSR = 0x4A, // Logical Shift Right, Accumulator ($4A : LSR)
|
||||
OPCODE_ILL_4B = 0x4B, // illegal opcode
|
||||
OPCODE_JMP_ABS = 0x4C, // JuMP, Absolute ($4C addrlo addrhi : JMP addr ;addr=0..$FFFF), MEM=addr
|
||||
OPCODE_EOR_ABS = 0x4D, // bitwise Exclusive OR, Absolute ($4D addrlo addrhi : EOR addr ;addr=0..$FFFF), MEM=addr
|
||||
OPCODE_LSR_ABS = 0x4E, // Logical Shift Right, Absolute ($4E addrlo addrhi : LSR addr ;addr=0..$FFFF), MEM=addr
|
||||
OPCODE_ILL_4F = 0x4F, // illegal opcode
|
||||
OPCODE_BVC_REL = 0x50, // Branch on oVerflow Clear, Relative ($50 signoffs : BVC signoffs ;signoffs=0..$FF [-128 ($80)..127 ($7F)])
|
||||
OPCODE_EOR_IZY = 0x51, // bitwise Exclusive OR, Indirect Indexed ($51 arg : EOR (arg),Y ;arg=0..$FF), MEM=&arg+Y
|
||||
OPCODE_ILL_52 = 0x52, // illegal opcode
|
||||
OPCODE_ILL_53 = 0x53, // illegal opcode
|
||||
OPCODE_ILL_54 = 0x54, // illegal opcode
|
||||
OPCODE_EOR_ZPX = 0x55, // bitwise Exclusive OR, Zero Page Indexed, X ($55 arg : EOR arg,X ;arg=0..$FF), MEM=arg+X
|
||||
OPCODE_LSR_ZPX = 0x56, // Logical Shift Right, Zero Page Indexed, X ($56 arg : LSR arg,X ;arg=0..$FF), MEM=arg+X
|
||||
OPCODE_ILL_57 = 0x57, // illegal opcode
|
||||
OPCODE_CLI = 0x58, // CLear Interrupt, Implied ($58 : CLI)
|
||||
OPCODE_EOR_ABY = 0x59, // bitwise Exclusive OR, Absolute Indexed, Y ($59 addrlo addrhi : EOR addr,Y ;addr=0..$FFFF), MEM=addr+Y
|
||||
OPCODE_ILL_5A = 0x5A, // illegal opcode
|
||||
OPCODE_ILL_5B = 0x5B, // illegal opcode
|
||||
OPCODE_ILL_5C = 0x5C, // illegal opcode
|
||||
OPCODE_EOR_ABX = 0x5D, // bitwise Exclusive OR, Absolute Indexed, X ($5D addrlo addrhi : EOR addr,X ;addr=0..$FFFF), MEM=addr+X
|
||||
OPCODE_LSR_ABX = 0x5E, // Logical Shift Right, Absolute Indexed, X ($5E addrlo addrhi : LSR addr,X ;addr=0..$FFFF), MEM=addr+X
|
||||
OPCODE_ILL_5F = 0x5F, // illegal opcode
|
||||
OPCODE_RTS = 0x60, // ReTurn from Subroutine, Implied ($60 : RTS)
|
||||
OPCODE_ADC_IZX = 0x61, // ADd with Carry, Indexed Indirect ($61 arg : ADC (arg,X) ;arg=0..$FF), MEM=&(arg+X)
|
||||
OPCODE_ILL_62 = 0x62, // illegal opcode
|
||||
OPCODE_ILL_63 = 0x63, // illegal opcode
|
||||
OPCODE_ILL_64 = 0x64, // illegal opcode
|
||||
OPCODE_ADC_ZP = 0x65, // ADd with Carry, Zero Page ($65 arg : ADC arg ;arg=0..$FF), MEM=arg
|
||||
OPCODE_ROR_ZP = 0x66, // ROtate Right, Zero Page ($66 arg : ROR arg ;arg=0..$FF), MEM=arg
|
||||
OPCODE_ILL_67 = 0x67, // illegal opcode
|
||||
OPCODE_PLA = 0x68, // PuLl Accumulator, Implied ($68 : PLA)
|
||||
OPCODE_ADC_IMM = 0x69, // ADd with Carry, Immediate ($69 arg : ADC #arg ;arg=0..$FF), MEM=PC+1
|
||||
OPCODE_ROR = 0x6A, // ROtate Right, Accumulator ($6A : ROR)
|
||||
OPCODE_ILL_6B = 0x6B, // illegal opcode
|
||||
OPCODE_JMP_IND = 0x6C, // JuMP, Indirect Absolute ($6C addrlo addrhi : JMP (addr) ;addr=0..FFFF), MEM=&addr
|
||||
OPCODE_ADC_ABS = 0x6D, // ADd with Carry, Absolute ($6D addrlo addrhi : ADC addr ;addr=0..$FFFF), MEM=addr
|
||||
OPCODE_ROR_ABS = 0x6E, // ROtate Right, Absolute ($6E addrlo addrhi : ROR addr ;addr=0..$FFFF), MEM=addr
|
||||
OPCODE_ILL_6F = 0x6F, // illegal opcode
|
||||
OPCODE_BVS_REL = 0x70, // Branch on oVerflow Set, Relative ($70 signoffs : BVS signoffs ;signoffs=0..$FF [-128 ($80)..127 ($7F)])
|
||||
OPCODE_ADC_IZY = 0x71, // ADd with Carry, Indirect Indexed ($71 arg : ADC (arg),Y ;arg=0..$FF), MEM=&arg+Y
|
||||
OPCODE_ILL_72 = 0x72, // illegal opcode
|
||||
OPCODE_ILL_73 = 0x73, // illegal opcode
|
||||
OPCODE_ILL_74 = 0x74, // illegal opcode
|
||||
OPCODE_ADC_ZPX = 0x75, // ADd with Carry, Zero Page Indexed, X ($75 arg : ADC arg,X ;arg=0..$FF), MEM=arg+X
|
||||
OPCODE_ROR_ZPX = 0x76, // ROtate Right, Zero Page Indexed, X ($76 arg : ROR arg,X ;arg=0..$FF), MEM=arg+X
|
||||
OPCODE_ILL_77 = 0x77, // illegal opcode
|
||||
OPCODE_SEI = 0x78, // SEt Interrupt, Implied ($78 : SEI)
|
||||
OPCODE_ADC_ABY = 0x79, // ADd with Carry, Absolute Indexed, Y ($79 addrlo addrhi : ADC addr,Y ;addr=0..$FFFF), MEM=addr+Y
|
||||
OPCODE_ILL_7A = 0x7A, // illegal opcode
|
||||
OPCODE_ILL_7B = 0x7B, // illegal opcode
|
||||
OPCODE_ILL_7C = 0x7C, // illegal opcode
|
||||
OPCODE_ADC_ABX = 0x7D, // ADd with Carry, Absolute Indexed, X ($7D addrlo addrhi : ADC addr,X ;addr=0..$FFFF), MEM=addr+X
|
||||
OPCODE_ROR_ABX = 0x7E, // ROtate Right, Absolute Indexed, X ($7E addrlo addrhi : ROR addr,X ;addr=0..$FFFF), MEM=addr+X
|
||||
OPCODE_ILL_7F = 0x7F, // illegal opcode
|
||||
OPCODE_ILL_80 = 0x80, // illegal opcode
|
||||
OPCODE_STA_IZX = 0x81, // STore Accumulator, Indexed Indirect ($81 arg : STA (arg,X) ;arg=0..$FF), MEM=&(arg+X)
|
||||
OPCODE_ILL_82 = 0x82, // illegal opcode
|
||||
OPCODE_ILL_83 = 0x83, // illegal opcode
|
||||
OPCODE_STY_ZP = 0x84, // STore Y register, Zero Page ($84 arg : STY arg ;arg=0..$FF), MEM=arg
|
||||
OPCODE_STA_ZP = 0x85, // STore Accumulator, Zero Page ($85 arg : STA arg ;arg=0..$FF), MEM=arg
|
||||
OPCODE_STX_ZP = 0x86, // STore X register, Zero Page ($86 arg : STX arg ;arg=0..$FF), MEM=arg
|
||||
OPCODE_ILL_87 = 0x87, // illegal opcode
|
||||
OPCODE_DEY = 0x88, // DEcrement Y, Implied ($88 : DEY)
|
||||
OPCODE_ILL_89 = 0x89, // illegal opcode
|
||||
OPCODE_TXA = 0x8A, // Transfer X to A, Implied ($8A : TXA)
|
||||
OPCODE_ILL_8B = 0x8B, // illegal opcode
|
||||
OPCODE_STY_ABS = 0x8C, // STore Y register, Absolute ($8C addrlo addrhi : STY addr ;addr=0..$FFFF), MEM=addr
|
||||
OPCODE_STA_ABS = 0x8D, // STore Accumulator, Absolute ($8D addrlo addrhi : STA addr ;addr=0..$FFFF), MEM=addr
|
||||
OPCODE_STX_ABS = 0x8E, // STore X register, Absolute ($8E addrlo addrhi : STX addr ;addr=0..$FFFF), MEM=addr
|
||||
OPCODE_ILL_8F = 0x8F, // illegal opcode
|
||||
OPCODE_BCC_REL = 0x90, // Branch on Carry Clear, Relative ($90 signoffs : BCC signoffs ;signoffs=0..$FF [-128 ($80)..127 ($7F)])
|
||||
OPCODE_STA_IZY = 0x91, // STore Accumulator, Indirect Indexed ($91 arg : STA (arg),Y ;arg=0..$FF), MEM=&arg+Y
|
||||
OPCODE_ILL_92 = 0x92, // illegal opcode
|
||||
OPCODE_ILL_93 = 0x93, // illegal opcode
|
||||
OPCODE_STY_ZPX = 0x94, // STore Y register, Zero Page Indexed, X ($94 arg : STY arg,X ;arg=0..$FF), MEM=arg+X
|
||||
OPCODE_STA_ZPX = 0x95, // STore Accumulator, Zero Page Indexed, X ($95 arg : STA arg,X ;arg=0..$FF), MEM=arg+X
|
||||
OPCODE_STX_ZPY = 0x96, // STore X register, Zero Page Indexed, Y ($96 arg : STX arg,Y ;arg=0..$FF), MEM=arg+Y
|
||||
OPCODE_ILL_97 = 0x97, // illegal opcode
|
||||
OPCODE_TYA = 0x98, // Transfer Y to A, Implied ($98 : TYA)
|
||||
OPCODE_STA_ABY = 0x99, // STore Accumulator, Absolute Indexed, Y ($99 addrlo addrhi : STA addr,Y ;addr=0..$FFFF), MEM=addr+Y
|
||||
OPCODE_TXS = 0x9A, // Transfer X to Stack ptr, Implied ($9A : TXS)
|
||||
OPCODE_ILL_9B = 0x9B, // illegal opcode
|
||||
OPCODE_ILL_9C = 0x9C, // illegal opcode
|
||||
OPCODE_STA_ABX = 0x9D, // STore Accumulator, Absolute Indexed, X ($9D addrlo addrhi : STA addr,X ;addr=0..$FFFF), MEM=addr+X
|
||||
OPCODE_ILL_9E = 0x9E, // illegal opcode
|
||||
OPCODE_ILL_9F = 0x9F, // illegal opcode
|
||||
OPCODE_LDY_IMM = 0xA0, // LoaD Y register, Immediate ($A0 arg : LDY #arg ;arg=0..$FF), MEM=PC+1
|
||||
OPCODE_LDA_IZX = 0xA1, // LoaD Accumulator, Indexed Indirect ($A1 arg : LDA (arg,X) ;arg=0..$FF), MEM=&(arg+X)
|
||||
OPCODE_LDX_IMM = 0xA2, // LoaD X register, Immediate ($A2 arg : LDX #arg ;arg=0..$FF), MEM=PC+1
|
||||
OPCODE_ILL_A3 = 0xA3, // illegal opcode
|
||||
OPCODE_LDY_ZP = 0xA4, // LoaD Y register, Zero Page ($A4 arg : LDY arg ;arg=0..$FF), MEM=arg
|
||||
OPCODE_LDA_ZP = 0xA5, // LoaD Accumulator, Zero Page ($A5 arg : LDA arg ;arg=0..$FF), MEM=arg
|
||||
OPCODE_LDX_ZP = 0xA6, // LoaD X register, Zero Page ($A6 arg : LDX arg ;arg=0..$FF), MEM=arg
|
||||
OPCODE_ILL_A7 = 0xA7, // illegal opcode
|
||||
OPCODE_TAY = 0xA8, // Transfer A to Y, Implied ($A8 : TAY)
|
||||
OPCODE_LDA_IMM = 0xA9, // LoaD Accumulator, Immediate ($A9 arg : LDA #arg ;arg=0..$FF), MEM=PC+1
|
||||
OPCODE_TAX = 0xAA, // Transfer A to X, Implied ($AA : TAX)
|
||||
OPCODE_ILL_AB = 0xAB, // illegal opcode
|
||||
OPCODE_LDY_ABS = 0xAC, // LoaD Y register, Absolute ($AC addrlo addrhi : LDY addr ;addr=0..$FFFF), MEM=addr
|
||||
OPCODE_LDA_ABS = 0xAD, // LoaD Accumulator, Absolute ($AD addrlo addrhi : LDA addr ;addr=0..$FFFF), MEM=addr
|
||||
OPCODE_LDX_ABS = 0xAE, // LoaD X register, Absolute ($AE addrlo addrhi : LDX addr ;addr=0..$FFFF), MEM=addr
|
||||
OPCODE_ILL_AF = 0xAF, // illegal opcode
|
||||
OPCODE_BCS_REL = 0xB0, // Branch on Carry Set, Relative ($B0 signoffs : BCS signoffs ;signoffs=0..$FF [-128 ($80)..127 ($7F)])
|
||||
OPCODE_LDA_IZY = 0xB1, // LoaD Accumulator, Indirect Indexed ($B1 arg : LDA (arg),Y ;arg=0..$FF), MEM=&arg+Y
|
||||
OPCODE_ILL_B2 = 0xB2, // illegal opcode
|
||||
OPCODE_ILL_B3 = 0xB3, // illegal opcode
|
||||
OPCODE_LDY_ZPX = 0xB4, // LoaD Y register, Zero Page Indexed, X ($B4 arg : LDY arg,X ;arg=0..$FF), MEM=arg+X
|
||||
OPCODE_LDA_ZPX = 0xB5, // LoaD Accumulator, Zero Page Indexed, X ($B5 arg : LDA arg,X ;arg=0..$FF), MEM=arg+X
|
||||
OPCODE_LDX_ZPY = 0xB6, // LoaD X register, Zero Page Indexed, Y ($B6 arg : LDX arg,Y ;arg=0..$FF), MEM=arg+Y
|
||||
OPCODE_ILL_B7 = 0xB7, // illegal opcode
|
||||
OPCODE_CLV = 0xB8, // CLear oVerflow, Implied ($B8 : CLV)
|
||||
OPCODE_LDA_ABY = 0xB9, // LoaD Accumulator, Absolute Indexed, Y ($B9 addrlo addrhi : LDA addr,Y ;addr=0..$FFFF), MEM=addr+Y
|
||||
OPCODE_TSX = 0xBA, // Transfer Stack ptr to X, Implied ($BA : TSX)
|
||||
OPCODE_ILL_BB = 0xBB, // illegal opcode
|
||||
OPCODE_LDY_ABX = 0xBC, // LoaD Y register, Absolute Indexed, X ($BC addrlo addrhi : LDY addr,X ;addr=0..$FFFF), MEM=addr+X
|
||||
OPCODE_LDA_ABX = 0xBD, // LoaD Accumulator, Absolute Indexed, X ($BD addrlo addrhi : LDA addr,X ;addr=0..$FFFF), MEM=addr+X
|
||||
OPCODE_LDX_ABY = 0xBE, // LoaD X register, Absolute Indexed, Y ($BE addrlo addrhi : LDX addr,Y ;addr=0..$FFFF), MEM=addr+Y
|
||||
OPCODE_ILL_BF = 0xBF, // illegal opcode
|
||||
OPCODE_CPY_IMM = 0xC0, // ComPare Y register, Immediate ($C0 arg : CPY #arg ;arg=0..$FF), MEM=PC+1
|
||||
OPCODE_CMP_IZX = 0xC1, // CoMPare accumulator, Indexed Indirect ($A1 arg : LDA (arg,X) ;arg=0..$FF), MEM=&(arg+X)
|
||||
OPCODE_ILL_C2 = 0xC2, // illegal opcode
|
||||
OPCODE_ILL_C3 = 0xC3, // illegal opcode
|
||||
OPCODE_CPY_ZP = 0xC4, // ComPare Y register, Zero Page ($C4 arg : CPY arg ;arg=0..$FF), MEM=arg
|
||||
OPCODE_CMP_ZP = 0xC5, // CoMPare accumulator, Zero Page ($C5 arg : CMP arg ;arg=0..$FF), MEM=arg
|
||||
OPCODE_DEC_ZP = 0xC6, // DECrement memory, Zero Page ($C6 arg : DEC arg ;arg=0..$FF), MEM=arg
|
||||
OPCODE_ILL_C7 = 0xC7, // illegal opcode
|
||||
OPCODE_INY = 0xC8, // INcrement Y, Implied ($C8 : INY)OPCODE_INY = 0xC8, // INcrement Y, Implied ($C8 : INY)
|
||||
OPCODE_CMP_IMM = 0xC9, // CoMPare accumulator, Immediate ($C9 arg : CMP #arg ;arg=0..$FF), MEM=PC+1
|
||||
OPCODE_DEX = 0xCA, // DEcrement X, Implied ($CA : DEX)
|
||||
OPCODE_ILL_CB = 0xCB, // illegal opcode
|
||||
OPCODE_CPY_ABS = 0xCC, // ComPare Y register, Absolute ($CC addrlo addrhi : CPY addr ;addr=0..$FFFF), MEM=addr
|
||||
OPCODE_CMP_ABS = 0xCD, // CoMPare accumulator, Absolute ($CD addrlo addrhi : CMP addr ;addr=0..$FFFF), MEM=addr
|
||||
OPCODE_DEC_ABS = 0xCE, // DECrement memory, Absolute ($CE addrlo addrhi : CMP addr ;addr=0..$FFFF), MEM=addr
|
||||
OPCODE_ILL_CF = 0xCF, // illegal opcode
|
||||
OPCODE_BNE_REL = 0xD0, // Branch on Not Equal, Relative ($D0 signoffs : BNE signoffs ;signoffs=0..$FF [-128 ($80)..127 ($7F)])
|
||||
OPCODE_CMP_IZY = 0xD1, // CoMPare accumulator, Indirect Indexed ($D1 arg : CMP (arg),Y ;arg=0..$FF), MEM=&arg+Y
|
||||
OPCODE_ILL_D2 = 0xD2, // illegal opcode
|
||||
OPCODE_ILL_D3 = 0xD3, // illegal opcode
|
||||
OPCODE_ILL_D4 = 0xD4, // illegal opcode
|
||||
OPCODE_CMP_ZPX = 0xD5, // CoMPare accumulator, Zero Page Indexed, X ($D5 arg : CMP arg,X ;arg=0..$FF), MEM=arg+X
|
||||
OPCODE_DEC_ZPX = 0xD6, // DECrement memory, Zero Page Indexed, X ($D6 arg : DEC arg,X ;arg=0..$FF), MEM=arg+X
|
||||
OPCODE_ILL_D7 = 0xD7, // illegal opcode
|
||||
OPCODE_CLD = 0xD8, // CLear Decimal, Implied ($D8 : CLD)
|
||||
OPCODE_CMP_ABY = 0xD9, // CoMPare accumulator, Absolute Indexed, Y ($D9 addrlo addrhi : CMP addr,Y ;addr=0..$FFFF), MEM=addr+Y
|
||||
OPCODE_ILL_DA = 0xDA, // illegal opcode
|
||||
OPCODE_ILL_DB = 0xDB, // illegal opcode
|
||||
OPCODE_ILL_DC = 0xDC, // illegal opcode
|
||||
OPCODE_CMP_ABX = 0xDD, // CoMPare accumulator, Absolute Indexed, X ($DD addrlo addrhi : CMP addr,X ;addr=0..$FFFF), MEM=addr+X
|
||||
OPCODE_DEC_ABX = 0xDE, // DECrement memory, Absolute Indexed, X ($DE addrlo addrhi : DEC addr,X ;addr=0..$FFFF), MEM=addr+X
|
||||
OPCODE_ILL_DF = 0xDF, // illegal opcode
|
||||
OPCODE_CPX_IMM = 0xE0, // ComPare X register, Immediate ($E0 arg : CPX #arg ;arg=0..$FF), MEM=PC+1
|
||||
OPCODE_SBC_IZX = 0xE1, // SuBtract with Carry, Indexed Indirect ($E1 arg : SBC (arg,X) ;arg=0..$FF), MEM=&(arg+X)
|
||||
OPCODE_ILL_E2 = 0xE2, // illegal opcode
|
||||
OPCODE_ILL_E3 = 0xE3, // illegal opcode
|
||||
OPCODE_CPX_ZP = 0xE4, // ComPare X register, Zero Page ($E4 arg : CPX arg ;arg=0..$FF), MEM=arg
|
||||
OPCODE_SBC_ZP = 0xE5, // SuBtract with Carry, Zero Page ($E5 arg : SBC arg ;arg=0..$FF), MEM=arg
|
||||
OPCODE_INC_ZP = 0xE6, // INCrement memory, Zero Page ($E6 arg : INC arg ;arg=0..$FF), MEM=arg
|
||||
OPCODE_ILL_E7 = 0xE7, // illegal opcode
|
||||
OPCODE_INX = 0xE8, // INcrement X, Implied ($E8 : INX)
|
||||
OPCODE_SBC_IMM = 0xE9, // SuBtract with Carry, Immediate ($E9 arg : SBC #arg ;arg=0..$FF), MEM=PC+1
|
||||
OPCODE_NOP = 0xEA, // NO oPeration, Implied ($EA : NOP)
|
||||
OPCODE_ILL_EB = 0xEB, // illegal opcode
|
||||
OPCODE_CPX_ABS = 0xEC, // ComPare X register, Absolute ($EC addrlo addrhi : CPX addr ;addr=0..$FFFF), MEM=addr
|
||||
OPCODE_SBC_ABS = 0xED, // SuBtract with Carry, Absolute ($ED addrlo addrhi : SBC addr ;addr=0..$FFFF), MEM=addr
|
||||
OPCODE_INC_ABS = 0xEE, // INCrement memory, Absolute ($EE addrlo addrhi : INC addr ;addr=0..$FFFF), MEM=addr
|
||||
OPCODE_ILL_EF = 0xEF, // illegal opcode
|
||||
OPCODE_BEQ_REL = 0xF0, // Branch on EQual, Relative ($F0 signoffs : BEQ signoffs ;signoffs=0..$FF [-128 ($80)..127 ($7F)])
|
||||
OPCODE_SBC_IZY = 0xF1, // SuBtract with Carry, Indirect Indexed ($F1 arg : SBC (arg),Y ;arg=0..$FF), MEM=&arg+Y
|
||||
OPCODE_ILL_F2 = 0xF2, // illegal opcode
|
||||
OPCODE_ILL_F3 = 0xF3, // illegal opcode
|
||||
OPCODE_ILL_F4 = 0xF4, // illegal opcode
|
||||
OPCODE_SBC_ZPX = 0xF5, // SuBtract with Carry, Zero Page Indexed, X ($F5 arg : SBC arg,X ;arg=0..$FF), MEM=arg+X
|
||||
OPCODE_INC_ZPX = 0xF6, // INCrement memory, Zero Page Indexed, X ($F6 arg : INC arg,X ;arg=0..$FF), MEM=arg+X
|
||||
OPCODE_ILL_F7 = 0xF7, // illegal opcode
|
||||
OPCODE_SED = 0xF8, // SEt Decimal, Implied ($F8 : SED)
|
||||
OPCODE_SBC_ABY = 0xF9, // SuBtract with Carry, Absolute Indexed, Y ($F9 addrlo addrhi : SBC addr,Y ;addr=0..$FFFF), MEM=addr+Y
|
||||
OPCODE_ILL_FA = 0xFA, // illegal opcode
|
||||
OPCODE_ILL_FB = 0xFB, // illegal opcode
|
||||
OPCODE_ILL_FC = 0xFC, // illegal opcode
|
||||
OPCODE_SBC_ABX = 0xFD, // SuBtract with Carry, Absolute Indexed, X ($FD addrlo addrhi : SBC addr,X ;addr=0..$FFFF), MEM=addr+X
|
||||
OPCODE_INC_ABX = 0xFE, // INCrement memory, Absolute Indexed, X ($FE addrlo addrhi : INC addr,X ;addr=0..$FFFF), MEM=addr+X
|
||||
OPCODE_ILL_FF = 0xFF, // illegal opcode
|
||||
};
|
||||
|
||||
/*
|
||||
*------------------------------------------------------------------------------
|
||||
bit -> 7 0
|
||||
+---+---+---+---+---+---+---+---+
|
||||
| N | V | | B | D | I | Z | C | <-- flag, 0/1 = reset/set
|
||||
+---+---+---+---+---+---+---+---+
|
||||
|
||||
|
||||
N = NEGATIVE. Set if bit 7 of the accumulator is set.
|
||||
|
||||
V = OVERFLOW. Set if the addition of two like-signed numbers or the
|
||||
subtraction of two unlike-signed numbers produces a result
|
||||
greater than +127 or less than -128.
|
||||
|
||||
B = BRK COMMAND. Set if an interrupt caused by a BRK, reset if
|
||||
caused by an external interrupt.
|
||||
|
||||
D = DECIMAL MODE. Set if decimal mode active.
|
||||
|
||||
I = IRQ DISABLE. Set if maskable interrupts are disabled.
|
||||
|
||||
Z = ZERO. Set if the result of the last operation (load/inc/dec/
|
||||
add/sub) was zero.
|
||||
|
||||
C = CARRY. Set if the add produced a carry, or if the subtraction
|
||||
produced a borrow. Also holds bits after a logical shift.
|
||||
*------------------------------------------------------------------------------
|
||||
*/
|
||||
enum eCpuFlagMasks {
|
||||
FLAGS_CARRY = 0x01, // 0: C
|
||||
FLAGS_ZERO = 0x02, // 1: Z
|
||||
FLAGS_IRQ = 0x04, // 2: I
|
||||
FLAGS_DEC = 0x08, // 3: D
|
||||
FLAGS_BRK = 0x10, // 4: B (Clear if interrupt vectoring, set if BRK or PHP)
|
||||
FLAGS_UNUSED = 0x20, // 5: Unused flag (always set).
|
||||
FLAGS_OVERFLOW = 0x40, // 6: V
|
||||
FLAGS_SIGN = 0x80 // 7: N
|
||||
};
|
||||
|
||||
enum eLogicOps {
|
||||
LOGOP_OR,
|
||||
LOGOP_AND,
|
||||
LOGOP_EOR
|
||||
};
|
||||
|
||||
class MKCpu
|
||||
{
|
||||
public:
|
||||
|
||||
MKCpu();
|
||||
MKCpu(Memory *pmem);
|
||||
~MKCpu();
|
||||
|
||||
Regs *ExecOpcode(unsigned short memaddr);
|
||||
Regs *GetRegs();
|
||||
|
||||
protected:
|
||||
|
||||
private:
|
||||
|
||||
struct Regs mReg; // CPU registers
|
||||
Memory *mpMem; // pointer to memory object
|
||||
bool mLocalMem; // true - memory locally allocated
|
||||
|
||||
void InitCpu();
|
||||
void SetFlags(unsigned char reg); // set CPU flags ZERO and SIGN based on Acc, X or Y
|
||||
unsigned char ShiftLeft(unsigned char arg8); // Arithmetic Shift Left, set Carry flag
|
||||
unsigned char ShiftRight(unsigned char arg8); // Logical Shift Right, update flags NZC.
|
||||
unsigned char RotateLeft(unsigned char arg8); // Rotate left, Carry to bit 0, bit 7 to Carry, update flags N and Z.
|
||||
unsigned char RotateRight(unsigned char arg8); // Rotate left, Carry to bit 7, bit 0 to Carry, update flags N and Z.
|
||||
unsigned short GetArg16(unsigned char offs); // Get 2-byte argument, add offset, increase PC.
|
||||
void LogicOpAcc(unsigned short addr, int logop); // Perform logical bitwise operation between memory location and Acc.
|
||||
// Result in Acc. Set flags.
|
||||
unsigned short ComputeRelJump(unsigned char offs); // Compute new PC based on relative offset.
|
||||
unsigned char Conv2Bcd(unsigned short v); // Convert number to BCD representation.
|
||||
unsigned short Bcd2Num(unsigned char v); // Convert BCD code to number.
|
||||
bool CheckFlag(unsigned char flag); // Return true if given CPU status flag is set, false otherwise.
|
||||
void SetFlag(bool set, unsigned char flag); // Set or unset processor status flag.
|
||||
unsigned char AddWithCarry(unsigned char mem8); // Add With Carry, update flags and Acc.
|
||||
unsigned char SubWithCarry(unsigned char mem8); // Subtract With Carry, update flags and Acc.
|
||||
unsigned short GetAddrWithMode(int mode); // Get address of the byte argument with specified addr. mode
|
||||
};
|
||||
|
||||
} // namespace MKBasic
|
||||
|
||||
#endif
|
||||
#ifndef MKCPU_H
|
||||
#define MKCPU_H
|
||||
|
||||
#include <string>
|
||||
#include <map>
|
||||
#include <queue>
|
||||
#include "system.h"
|
||||
#include "Memory.h"
|
||||
|
||||
using namespace std;
|
||||
|
||||
namespace MKBasic {
|
||||
|
||||
#define DISS_BUF_SIZE 60 // disassembled instruction buffer size
|
||||
|
||||
struct Regs {
|
||||
unsigned char Acc; // 8-bit accumulator
|
||||
unsigned short Acc16; // 16-bit accumulator
|
||||
unsigned char IndX; // 8-bit index register X
|
||||
unsigned char IndY; // 8-bit index register Y
|
||||
unsigned short Ptr16; // general purpose 16-bit register
|
||||
unsigned short PtrAddr; // cpu code counter (PC) - current read/write address
|
||||
unsigned char PtrStack; // 8-bit stack pointer (0-255).
|
||||
unsigned char Flags; // CPU flags
|
||||
bool SoftIrq; // true when interrupted with BRK or trapped opcode
|
||||
bool LastRTS; // true if RTS encountered and stack empty.
|
||||
unsigned short LastAddr; // PC at the time of previous op-code
|
||||
string LastInstr; // instruction and argument executed in previous step
|
||||
int LastOpCode; // op-code of last instruction
|
||||
unsigned short LastArg; // argument to the last instruction
|
||||
int LastAddrMode; // addressing mode of last instruction
|
||||
};
|
||||
|
||||
/*
|
||||
* Virtual CPU, 6502 addressing modes:
|
||||
|
||||
+---------------------+--------------------------+
|
||||
| mode | assembler format |
|
||||
+=====================+==========================+
|
||||
| Immediate | #aa |
|
||||
| Absolute | aaaa |
|
||||
| Zero Page | aa | Note:
|
||||
| Implied | |
|
||||
| Indirect Absolute | (aaaa) | aa = 2 hex digits
|
||||
| Absolute Indexed,X | aaaa,X | as $FF
|
||||
| Absolute Indexed,Y | aaaa,Y |
|
||||
| Zero Page Indexed,X | aa,X | aaaa = 4 hex
|
||||
| Zero Page Indexed,Y | aa,Y | digits as
|
||||
| Indexed Indirect | (aa,X) | $FFFF
|
||||
| Indirect Indexed | (aa),Y |
|
||||
| Relative | aaaa | Can also be
|
||||
| Accumulator | A | assembler labels
|
||||
+---------------------+--------------------------+
|
||||
|
||||
Short notation:
|
||||
|
||||
imm = #$00
|
||||
zp = $00
|
||||
zpx = $00,X
|
||||
zpy = $00,Y
|
||||
izx = ($00,X)
|
||||
izy = ($00),Y
|
||||
abs = $0000
|
||||
abx = $0000,X
|
||||
aby = $0000,Y
|
||||
ind = ($0000)
|
||||
rel = $0000 (PC-relative)
|
||||
|
||||
See: 6502AssemblyInOneStep.txt for details.
|
||||
|
||||
*/
|
||||
enum eAddrModes {
|
||||
ADDRMODE_IMM = 0,
|
||||
ADDRMODE_ABS,
|
||||
ADDRMODE_ZP,
|
||||
ADDRMODE_IMP,
|
||||
ADDRMODE_IND,
|
||||
ADDRMODE_ABX,
|
||||
ADDRMODE_ABY,
|
||||
ADDRMODE_ZPX,
|
||||
ADDRMODE_ZPY,
|
||||
ADDRMODE_IZX,
|
||||
ADDRMODE_IZY,
|
||||
ADDRMODE_REL,
|
||||
ADDRMODE_ACC,
|
||||
ADDRMODE_UND, // undetermined (for some illegal codes)
|
||||
ADDRMODE_LENGTH // should be always last
|
||||
};
|
||||
// assumed little-endian order of bytes (start with least significant)
|
||||
// MEM - memory location from where the value is read/written,
|
||||
// & - reference operator (e.g.: &addr means: value under addr memory location)
|
||||
// PC - program counter (PC+1 means - next memory location after opcode)
|
||||
enum eOpCodes {
|
||||
OPCODE_BRK = 0x00, // software interrupt, no arguments ($00 : BRK)
|
||||
|
||||
/* full compatibility with 65C02 (illegal opcodes not supported, will be used for extended functions */
|
||||
OPCODE_ORA_IZX = 0x01, // bitwise OR with Accumulator, Indexed Indirect ($01 arg : ORA (arg,X) ;arg=0..$FF), MEM=&(arg+X)
|
||||
OPCODE_ILL_02 = 0x02, // illegal opcode
|
||||
OPCODE_ILL_03 = 0x03, // illegal opcode
|
||||
OPCODE_ILL_04 = 0x04, // illegal opcode
|
||||
OPCODE_ORA_ZP = 0x05, // bitwise OR with Accumulator, Zero Page ($05 arg : ORA arg ;arg=0..$FF), MEM=arg
|
||||
OPCODE_ASL_ZP = 0x06, // Arithmetic Shift Left, Zero Page ($06 arg : ASL arg ;arg=0..$FF), MEM=arg
|
||||
OPCODE_ILL_07 = 0x07, // illegal opcode
|
||||
OPCODE_PHP = 0x08, // PusH Processor status on Stack, Implied ($08 : PHP)
|
||||
OPCODE_ORA_IMM = 0x09, // bitwise OR with Accumulator, Immediate ($09 arg : ORA #arg ;arg=0..$FF), MEM=PC+1
|
||||
OPCODE_ASL = 0x0A, // Arithmetic Shift Left, Accumulator ($0A : ASL)
|
||||
OPCODE_ILL_0B = 0x0B, // illegal opcode
|
||||
OPCODE_ILL_0C = 0x0C, // illegal opcode
|
||||
OPCODE_ORA_ABS = 0x0D, // bitwise OR with Accumulator, Absolute ($0D addrlo addrhi : ORA addr ;addr=0..$FFFF), MEM=addr
|
||||
OPCODE_ASL_ABS = 0x0E, // Arithmetic Shift Left, Absolute ($0E addrlo addrhi : ASL addr ;addr=0..$FFFF), MEM=addr
|
||||
OPCODE_ILL_0F = 0x0F, // illegal opcode
|
||||
OPCODE_BPL_REL = 0x10, // Branch on PLus, Relative ($10 signoffs : BPL signoffs ;signoffs=0..$FF [-128 ($80)..127 ($7F)])
|
||||
OPCODE_ORA_IZY = 0x11, // bitwise OR with Accumulator, Indirect Indexed ($11 arg : ORA (arg),Y ;arg=0..$FF), MEM=&arg+Y
|
||||
OPCODE_ILL_12 = 0x12, // illegal opcode
|
||||
OPCODE_ILL_13 = 0x13, // illegal opcode
|
||||
OPCODE_ILL_14 = 0x14, // illegal opcode
|
||||
OPCODE_ORA_ZPX = 0x15, // bitwise OR with Accumulator, Zero Page Indexed, X ($15 arg : ORA arg,X ;arg=0..$FF), MEM=arg+X
|
||||
OPCODE_ASL_ZPX = 0x16, // Arithmetic Shift Left, Zero Page Indexed, X ($16 arg : ASL arg,X ;arg=0..$FF), MEM=arg+X
|
||||
OPCODE_ILL_17 = 0x17, // illegal opcode
|
||||
OPCODE_CLC = 0x18, // CLear Carry, Implied ($18 : CLC)
|
||||
OPCODE_ORA_ABY = 0x19, // bitwise OR with Accumulator, Absolute Indexed, Y ($19 addrlo addrhi : ORA addr,Y ;addr=0..$FFFF), MEM=addr+Y
|
||||
OPCODE_ILL_1A = 0x1A, // illegal opcode
|
||||
OPCODE_ILL_1B = 0x1B, // illegal opcode
|
||||
OPCODE_ILL_1C = 0x1C, // illegal opcode
|
||||
OPCODE_ORA_ABX = 0x1D, // bitwise OR with Accumulator, Absolute Indexed, X ($1D addrlo addrhi : ORA addr,X ;addr=0..$FFFF), MEM=addr+X
|
||||
OPCODE_ASL_ABX = 0x1E, // Arithmetic Shift Left, Absolute Indexed, X ($1E addrlo addrhi : ASL addr,X ;addr=0..$FFFF), MEM=addr+X
|
||||
OPCODE_ILL_1F = 0x1F, // illegal opcode
|
||||
OPCODE_JSR_ABS = 0x20, // Jump to SubRoutine, Absolute ($20 addrlo addrhi : JSR addr ;addr=0..$FFFF), MEM=addr
|
||||
OPCODE_AND_IZX = 0x21, // bitwise AND with accumulator, Indexed Indirect ($21 arg : AND (arg,X) ;arg=0..$FF), MEM=&(arg+X)
|
||||
OPCODE_ILL_22 = 0x22, // illegal opcode
|
||||
OPCODE_ILL_23 = 0x23, // illegal opcode
|
||||
OPCODE_BIT_ZP = 0x24, // test BITs, Zero Page ($24 arg : BIT arg ;arg=0..$FF), MEM=arg
|
||||
OPCODE_AND_ZP = 0x25, // bitwise AND with accumulator, Zero Page ($25 arg : AND arg ;arg=0..$FF), MEM=arg
|
||||
OPCODE_ROL_ZP = 0x26, // ROtate Left, Zero Page ($26 arg : ROL arg ;arg=0..$FF), MEM=arg
|
||||
OPCODE_ILL_27 = 0x27, // illegal opcode
|
||||
OPCODE_PLP = 0x28, // PuLl Processor status, Implied ($28 : PLP)
|
||||
OPCODE_AND_IMM = 0x29, // bitwise AND with accumulator, Immediate ($29 arg : AND #arg ;arg=0..$FF), MEM=PC+1
|
||||
OPCODE_ROL = 0x2A, // ROtate Left, Accumulator ($2A : ROL)
|
||||
OPCODE_ILL_2B = 0x2B, // illegal opcode
|
||||
OPCODE_BIT_ABS = 0x2C, // test BITs, Absolute ($2C addrlo addrhi : BIT addr ;addr=0..$FFFF), MEM=addr
|
||||
OPCODE_AND_ABS = 0x2D, // bitwise AND with accumulator, Absolute ($2D addrlo addrhi : AND addr ;addr=0..$FFFF), MEM=addr
|
||||
OPCODE_ROL_ABS = 0x2E, // ROtate Left, Absolute ($2E addrlo addrhi : ROL addr ;addr=0..$FFFF), MEM=addr
|
||||
OPCODE_ILL_2F = 0x2F, // illegal opcode
|
||||
OPCODE_BMI_REL = 0x30, // Branch on MInus, Relative ($30 signoffs : BMI signoffs ;signoffs=0..$FF [-128 ($80)..127 ($7F)])
|
||||
OPCODE_AND_IZY = 0x31, // bitwise AND with accumulator, Indirect Indexed ($31 arg : AND (arg),Y ;arg=0..$FF), MEM=&arg+Y
|
||||
OPCODE_ILL_32 = 0x32, // illegal opcode
|
||||
OPCODE_ILL_33 = 0x33, // illegal opcode
|
||||
OPCODE_ILL_34 = 0x34, // illegal opcode
|
||||
OPCODE_AND_ZPX = 0x35, // bitwise AND with accumulator, Zero Page Indexed, X ($35 arg : AND arg,X ;arg=0..$FF), MEM=arg+X
|
||||
OPCODE_ROL_ZPX = 0x36, // ROtate Left, Zero Page Indexed, X ($36 arg : ROL arg,X ;arg=0..$FF), MEM=arg+X
|
||||
OPCODE_ILL_37 = 0x37, // illegal opcode
|
||||
OPCODE_SEC = 0x38, // SEt Carry, Implied ($38 : SEC)
|
||||
OPCODE_AND_ABY = 0x39, // bitwise AND with accumulator, Absolute Indexed, Y ($39 addrlo addrhi : AND addr,Y ;addr=0..$FFFF), MEM=addr+Y
|
||||
OPCODE_ILL_3A = 0x3A, // illegal opcode
|
||||
OPCODE_ILL_3B = 0x3B, // illegal opcode
|
||||
OPCODE_ILL_3C = 0x3C, // illegal opcode
|
||||
OPCODE_AND_ABX = 0x3D, // bitwise AND with accumulator, Absolute Indexed, X ($3D addrlo addrhi : AND addr,X ;addr=0..$FFFF), MEM=addr+X
|
||||
OPCODE_ROL_ABX = 0x3E, // ROtate Left, Absolute Indexed, X ($3E addrlo addrhi : ROL addr,X ;addr=0..$FFFF), MEM=addr+X
|
||||
OPCODE_ILL_3F = 0x3F, // illegal opcode
|
||||
OPCODE_RTI = 0x40, // ReTurn from Interrupt, Implied ($40 : RTI)
|
||||
OPCODE_EOR_IZX = 0x41, // bitwise Exclusive OR, Indexed Indirect ($41 arg : EOR (arg,X) ;arg=0..$FF), MEM=&(arg+X)
|
||||
OPCODE_ILL_42 = 0x42, // illegal opcode
|
||||
OPCODE_ILL_43 = 0x43, // illegal opcode
|
||||
OPCODE_ILL_44 = 0x44, // illegal opcode
|
||||
OPCODE_EOR_ZP = 0x45, // bitwise Exclusive OR, Zero Page ($45 arg : EOR arg ;arg=0..$FF), MEM=arg
|
||||
OPCODE_LSR_ZP = 0x46, // Logical Shift Right, Zero Page ($46 arg : LSR arg ;arg=0..$FF), MEM=arg
|
||||
OPCODE_ILL_47 = 0x47, // illegal opcode
|
||||
OPCODE_PHA = 0x48, // PusH Accumulator, Implied ($48 : PHA)
|
||||
OPCODE_EOR_IMM = 0x49, // bitwise Exclusive OR, Immediate ($49 arg : EOR #arg ;arg=0..$FF), MEM=PC+1
|
||||
OPCODE_LSR = 0x4A, // Logical Shift Right, Accumulator ($4A : LSR)
|
||||
OPCODE_ILL_4B = 0x4B, // illegal opcode
|
||||
OPCODE_JMP_ABS = 0x4C, // JuMP, Absolute ($4C addrlo addrhi : JMP addr ;addr=0..$FFFF), MEM=addr
|
||||
OPCODE_EOR_ABS = 0x4D, // bitwise Exclusive OR, Absolute ($4D addrlo addrhi : EOR addr ;addr=0..$FFFF), MEM=addr
|
||||
OPCODE_LSR_ABS = 0x4E, // Logical Shift Right, Absolute ($4E addrlo addrhi : LSR addr ;addr=0..$FFFF), MEM=addr
|
||||
OPCODE_ILL_4F = 0x4F, // illegal opcode
|
||||
OPCODE_BVC_REL = 0x50, // Branch on oVerflow Clear, Relative ($50 signoffs : BVC signoffs ;signoffs=0..$FF [-128 ($80)..127 ($7F)])
|
||||
OPCODE_EOR_IZY = 0x51, // bitwise Exclusive OR, Indirect Indexed ($51 arg : EOR (arg),Y ;arg=0..$FF), MEM=&arg+Y
|
||||
OPCODE_ILL_52 = 0x52, // illegal opcode
|
||||
OPCODE_ILL_53 = 0x53, // illegal opcode
|
||||
OPCODE_ILL_54 = 0x54, // illegal opcode
|
||||
OPCODE_EOR_ZPX = 0x55, // bitwise Exclusive OR, Zero Page Indexed, X ($55 arg : EOR arg,X ;arg=0..$FF), MEM=arg+X
|
||||
OPCODE_LSR_ZPX = 0x56, // Logical Shift Right, Zero Page Indexed, X ($56 arg : LSR arg,X ;arg=0..$FF), MEM=arg+X
|
||||
OPCODE_ILL_57 = 0x57, // illegal opcode
|
||||
OPCODE_CLI = 0x58, // CLear Interrupt, Implied ($58 : CLI)
|
||||
OPCODE_EOR_ABY = 0x59, // bitwise Exclusive OR, Absolute Indexed, Y ($59 addrlo addrhi : EOR addr,Y ;addr=0..$FFFF), MEM=addr+Y
|
||||
OPCODE_ILL_5A = 0x5A, // illegal opcode
|
||||
OPCODE_ILL_5B = 0x5B, // illegal opcode
|
||||
OPCODE_ILL_5C = 0x5C, // illegal opcode
|
||||
OPCODE_EOR_ABX = 0x5D, // bitwise Exclusive OR, Absolute Indexed, X ($5D addrlo addrhi : EOR addr,X ;addr=0..$FFFF), MEM=addr+X
|
||||
OPCODE_LSR_ABX = 0x5E, // Logical Shift Right, Absolute Indexed, X ($5E addrlo addrhi : LSR addr,X ;addr=0..$FFFF), MEM=addr+X
|
||||
OPCODE_ILL_5F = 0x5F, // illegal opcode
|
||||
OPCODE_RTS = 0x60, // ReTurn from Subroutine, Implied ($60 : RTS)
|
||||
OPCODE_ADC_IZX = 0x61, // ADd with Carry, Indexed Indirect ($61 arg : ADC (arg,X) ;arg=0..$FF), MEM=&(arg+X)
|
||||
OPCODE_ILL_62 = 0x62, // illegal opcode
|
||||
OPCODE_ILL_63 = 0x63, // illegal opcode
|
||||
OPCODE_ILL_64 = 0x64, // illegal opcode
|
||||
OPCODE_ADC_ZP = 0x65, // ADd with Carry, Zero Page ($65 arg : ADC arg ;arg=0..$FF), MEM=arg
|
||||
OPCODE_ROR_ZP = 0x66, // ROtate Right, Zero Page ($66 arg : ROR arg ;arg=0..$FF), MEM=arg
|
||||
OPCODE_ILL_67 = 0x67, // illegal opcode
|
||||
OPCODE_PLA = 0x68, // PuLl Accumulator, Implied ($68 : PLA)
|
||||
OPCODE_ADC_IMM = 0x69, // ADd with Carry, Immediate ($69 arg : ADC #arg ;arg=0..$FF), MEM=PC+1
|
||||
OPCODE_ROR = 0x6A, // ROtate Right, Accumulator ($6A : ROR)
|
||||
OPCODE_ILL_6B = 0x6B, // illegal opcode
|
||||
OPCODE_JMP_IND = 0x6C, // JuMP, Indirect Absolute ($6C addrlo addrhi : JMP (addr) ;addr=0..FFFF), MEM=&addr
|
||||
OPCODE_ADC_ABS = 0x6D, // ADd with Carry, Absolute ($6D addrlo addrhi : ADC addr ;addr=0..$FFFF), MEM=addr
|
||||
OPCODE_ROR_ABS = 0x6E, // ROtate Right, Absolute ($6E addrlo addrhi : ROR addr ;addr=0..$FFFF), MEM=addr
|
||||
OPCODE_ILL_6F = 0x6F, // illegal opcode
|
||||
OPCODE_BVS_REL = 0x70, // Branch on oVerflow Set, Relative ($70 signoffs : BVS signoffs ;signoffs=0..$FF [-128 ($80)..127 ($7F)])
|
||||
OPCODE_ADC_IZY = 0x71, // ADd with Carry, Indirect Indexed ($71 arg : ADC (arg),Y ;arg=0..$FF), MEM=&arg+Y
|
||||
OPCODE_ILL_72 = 0x72, // illegal opcode
|
||||
OPCODE_ILL_73 = 0x73, // illegal opcode
|
||||
OPCODE_ILL_74 = 0x74, // illegal opcode
|
||||
OPCODE_ADC_ZPX = 0x75, // ADd with Carry, Zero Page Indexed, X ($75 arg : ADC arg,X ;arg=0..$FF), MEM=arg+X
|
||||
OPCODE_ROR_ZPX = 0x76, // ROtate Right, Zero Page Indexed, X ($76 arg : ROR arg,X ;arg=0..$FF), MEM=arg+X
|
||||
OPCODE_ILL_77 = 0x77, // illegal opcode
|
||||
OPCODE_SEI = 0x78, // SEt Interrupt, Implied ($78 : SEI)
|
||||
OPCODE_ADC_ABY = 0x79, // ADd with Carry, Absolute Indexed, Y ($79 addrlo addrhi : ADC addr,Y ;addr=0..$FFFF), MEM=addr+Y
|
||||
OPCODE_ILL_7A = 0x7A, // illegal opcode
|
||||
OPCODE_ILL_7B = 0x7B, // illegal opcode
|
||||
OPCODE_ILL_7C = 0x7C, // illegal opcode
|
||||
OPCODE_ADC_ABX = 0x7D, // ADd with Carry, Absolute Indexed, X ($7D addrlo addrhi : ADC addr,X ;addr=0..$FFFF), MEM=addr+X
|
||||
OPCODE_ROR_ABX = 0x7E, // ROtate Right, Absolute Indexed, X ($7E addrlo addrhi : ROR addr,X ;addr=0..$FFFF), MEM=addr+X
|
||||
OPCODE_ILL_7F = 0x7F, // illegal opcode
|
||||
OPCODE_ILL_80 = 0x80, // illegal opcode
|
||||
OPCODE_STA_IZX = 0x81, // STore Accumulator, Indexed Indirect ($81 arg : STA (arg,X) ;arg=0..$FF), MEM=&(arg+X)
|
||||
OPCODE_ILL_82 = 0x82, // illegal opcode
|
||||
OPCODE_ILL_83 = 0x83, // illegal opcode
|
||||
OPCODE_STY_ZP = 0x84, // STore Y register, Zero Page ($84 arg : STY arg ;arg=0..$FF), MEM=arg
|
||||
OPCODE_STA_ZP = 0x85, // STore Accumulator, Zero Page ($85 arg : STA arg ;arg=0..$FF), MEM=arg
|
||||
OPCODE_STX_ZP = 0x86, // STore X register, Zero Page ($86 arg : STX arg ;arg=0..$FF), MEM=arg
|
||||
OPCODE_ILL_87 = 0x87, // illegal opcode
|
||||
OPCODE_DEY = 0x88, // DEcrement Y, Implied ($88 : DEY)
|
||||
OPCODE_ILL_89 = 0x89, // illegal opcode
|
||||
OPCODE_TXA = 0x8A, // Transfer X to A, Implied ($8A : TXA)
|
||||
OPCODE_ILL_8B = 0x8B, // illegal opcode
|
||||
OPCODE_STY_ABS = 0x8C, // STore Y register, Absolute ($8C addrlo addrhi : STY addr ;addr=0..$FFFF), MEM=addr
|
||||
OPCODE_STA_ABS = 0x8D, // STore Accumulator, Absolute ($8D addrlo addrhi : STA addr ;addr=0..$FFFF), MEM=addr
|
||||
OPCODE_STX_ABS = 0x8E, // STore X register, Absolute ($8E addrlo addrhi : STX addr ;addr=0..$FFFF), MEM=addr
|
||||
OPCODE_ILL_8F = 0x8F, // illegal opcode
|
||||
OPCODE_BCC_REL = 0x90, // Branch on Carry Clear, Relative ($90 signoffs : BCC signoffs ;signoffs=0..$FF [-128 ($80)..127 ($7F)])
|
||||
OPCODE_STA_IZY = 0x91, // STore Accumulator, Indirect Indexed ($91 arg : STA (arg),Y ;arg=0..$FF), MEM=&arg+Y
|
||||
OPCODE_ILL_92 = 0x92, // illegal opcode
|
||||
OPCODE_ILL_93 = 0x93, // illegal opcode
|
||||
OPCODE_STY_ZPX = 0x94, // STore Y register, Zero Page Indexed, X ($94 arg : STY arg,X ;arg=0..$FF), MEM=arg+X
|
||||
OPCODE_STA_ZPX = 0x95, // STore Accumulator, Zero Page Indexed, X ($95 arg : STA arg,X ;arg=0..$FF), MEM=arg+X
|
||||
OPCODE_STX_ZPY = 0x96, // STore X register, Zero Page Indexed, Y ($96 arg : STX arg,Y ;arg=0..$FF), MEM=arg+Y
|
||||
OPCODE_ILL_97 = 0x97, // illegal opcode
|
||||
OPCODE_TYA = 0x98, // Transfer Y to A, Implied ($98 : TYA)
|
||||
OPCODE_STA_ABY = 0x99, // STore Accumulator, Absolute Indexed, Y ($99 addrlo addrhi : STA addr,Y ;addr=0..$FFFF), MEM=addr+Y
|
||||
OPCODE_TXS = 0x9A, // Transfer X to Stack ptr, Implied ($9A : TXS)
|
||||
OPCODE_ILL_9B = 0x9B, // illegal opcode
|
||||
OPCODE_ILL_9C = 0x9C, // illegal opcode
|
||||
OPCODE_STA_ABX = 0x9D, // STore Accumulator, Absolute Indexed, X ($9D addrlo addrhi : STA addr,X ;addr=0..$FFFF), MEM=addr+X
|
||||
OPCODE_ILL_9E = 0x9E, // illegal opcode
|
||||
OPCODE_ILL_9F = 0x9F, // illegal opcode
|
||||
OPCODE_LDY_IMM = 0xA0, // LoaD Y register, Immediate ($A0 arg : LDY #arg ;arg=0..$FF), MEM=PC+1
|
||||
OPCODE_LDA_IZX = 0xA1, // LoaD Accumulator, Indexed Indirect ($A1 arg : LDA (arg,X) ;arg=0..$FF), MEM=&(arg+X)
|
||||
OPCODE_LDX_IMM = 0xA2, // LoaD X register, Immediate ($A2 arg : LDX #arg ;arg=0..$FF), MEM=PC+1
|
||||
OPCODE_ILL_A3 = 0xA3, // illegal opcode
|
||||
OPCODE_LDY_ZP = 0xA4, // LoaD Y register, Zero Page ($A4 arg : LDY arg ;arg=0..$FF), MEM=arg
|
||||
OPCODE_LDA_ZP = 0xA5, // LoaD Accumulator, Zero Page ($A5 arg : LDA arg ;arg=0..$FF), MEM=arg
|
||||
OPCODE_LDX_ZP = 0xA6, // LoaD X register, Zero Page ($A6 arg : LDX arg ;arg=0..$FF), MEM=arg
|
||||
OPCODE_ILL_A7 = 0xA7, // illegal opcode
|
||||
OPCODE_TAY = 0xA8, // Transfer A to Y, Implied ($A8 : TAY)
|
||||
OPCODE_LDA_IMM = 0xA9, // LoaD Accumulator, Immediate ($A9 arg : LDA #arg ;arg=0..$FF), MEM=PC+1
|
||||
OPCODE_TAX = 0xAA, // Transfer A to X, Implied ($AA : TAX)
|
||||
OPCODE_ILL_AB = 0xAB, // illegal opcode
|
||||
OPCODE_LDY_ABS = 0xAC, // LoaD Y register, Absolute ($AC addrlo addrhi : LDY addr ;addr=0..$FFFF), MEM=addr
|
||||
OPCODE_LDA_ABS = 0xAD, // LoaD Accumulator, Absolute ($AD addrlo addrhi : LDA addr ;addr=0..$FFFF), MEM=addr
|
||||
OPCODE_LDX_ABS = 0xAE, // LoaD X register, Absolute ($AE addrlo addrhi : LDX addr ;addr=0..$FFFF), MEM=addr
|
||||
OPCODE_ILL_AF = 0xAF, // illegal opcode
|
||||
OPCODE_BCS_REL = 0xB0, // Branch on Carry Set, Relative ($B0 signoffs : BCS signoffs ;signoffs=0..$FF [-128 ($80)..127 ($7F)])
|
||||
OPCODE_LDA_IZY = 0xB1, // LoaD Accumulator, Indirect Indexed ($B1 arg : LDA (arg),Y ;arg=0..$FF), MEM=&arg+Y
|
||||
OPCODE_ILL_B2 = 0xB2, // illegal opcode
|
||||
OPCODE_ILL_B3 = 0xB3, // illegal opcode
|
||||
OPCODE_LDY_ZPX = 0xB4, // LoaD Y register, Zero Page Indexed, X ($B4 arg : LDY arg,X ;arg=0..$FF), MEM=arg+X
|
||||
OPCODE_LDA_ZPX = 0xB5, // LoaD Accumulator, Zero Page Indexed, X ($B5 arg : LDA arg,X ;arg=0..$FF), MEM=arg+X
|
||||
OPCODE_LDX_ZPY = 0xB6, // LoaD X register, Zero Page Indexed, Y ($B6 arg : LDX arg,Y ;arg=0..$FF), MEM=arg+Y
|
||||
OPCODE_ILL_B7 = 0xB7, // illegal opcode
|
||||
OPCODE_CLV = 0xB8, // CLear oVerflow, Implied ($B8 : CLV)
|
||||
OPCODE_LDA_ABY = 0xB9, // LoaD Accumulator, Absolute Indexed, Y ($B9 addrlo addrhi : LDA addr,Y ;addr=0..$FFFF), MEM=addr+Y
|
||||
OPCODE_TSX = 0xBA, // Transfer Stack ptr to X, Implied ($BA : TSX)
|
||||
OPCODE_ILL_BB = 0xBB, // illegal opcode
|
||||
OPCODE_LDY_ABX = 0xBC, // LoaD Y register, Absolute Indexed, X ($BC addrlo addrhi : LDY addr,X ;addr=0..$FFFF), MEM=addr+X
|
||||
OPCODE_LDA_ABX = 0xBD, // LoaD Accumulator, Absolute Indexed, X ($BD addrlo addrhi : LDA addr,X ;addr=0..$FFFF), MEM=addr+X
|
||||
OPCODE_LDX_ABY = 0xBE, // LoaD X register, Absolute Indexed, Y ($BE addrlo addrhi : LDX addr,Y ;addr=0..$FFFF), MEM=addr+Y
|
||||
OPCODE_ILL_BF = 0xBF, // illegal opcode
|
||||
OPCODE_CPY_IMM = 0xC0, // ComPare Y register, Immediate ($C0 arg : CPY #arg ;arg=0..$FF), MEM=PC+1
|
||||
OPCODE_CMP_IZX = 0xC1, // CoMPare accumulator, Indexed Indirect ($A1 arg : LDA (arg,X) ;arg=0..$FF), MEM=&(arg+X)
|
||||
OPCODE_ILL_C2 = 0xC2, // illegal opcode
|
||||
OPCODE_ILL_C3 = 0xC3, // illegal opcode
|
||||
OPCODE_CPY_ZP = 0xC4, // ComPare Y register, Zero Page ($C4 arg : CPY arg ;arg=0..$FF), MEM=arg
|
||||
OPCODE_CMP_ZP = 0xC5, // CoMPare accumulator, Zero Page ($C5 arg : CMP arg ;arg=0..$FF), MEM=arg
|
||||
OPCODE_DEC_ZP = 0xC6, // DECrement memory, Zero Page ($C6 arg : DEC arg ;arg=0..$FF), MEM=arg
|
||||
OPCODE_ILL_C7 = 0xC7, // illegal opcode
|
||||
OPCODE_INY = 0xC8, // INcrement Y, Implied ($C8 : INY)OPCODE_INY = 0xC8, // INcrement Y, Implied ($C8 : INY)
|
||||
OPCODE_CMP_IMM = 0xC9, // CoMPare accumulator, Immediate ($C9 arg : CMP #arg ;arg=0..$FF), MEM=PC+1
|
||||
OPCODE_DEX = 0xCA, // DEcrement X, Implied ($CA : DEX)
|
||||
OPCODE_ILL_CB = 0xCB, // illegal opcode
|
||||
OPCODE_CPY_ABS = 0xCC, // ComPare Y register, Absolute ($CC addrlo addrhi : CPY addr ;addr=0..$FFFF), MEM=addr
|
||||
OPCODE_CMP_ABS = 0xCD, // CoMPare accumulator, Absolute ($CD addrlo addrhi : CMP addr ;addr=0..$FFFF), MEM=addr
|
||||
OPCODE_DEC_ABS = 0xCE, // DECrement memory, Absolute ($CE addrlo addrhi : CMP addr ;addr=0..$FFFF), MEM=addr
|
||||
OPCODE_ILL_CF = 0xCF, // illegal opcode
|
||||
OPCODE_BNE_REL = 0xD0, // Branch on Not Equal, Relative ($D0 signoffs : BNE signoffs ;signoffs=0..$FF [-128 ($80)..127 ($7F)])
|
||||
OPCODE_CMP_IZY = 0xD1, // CoMPare accumulator, Indirect Indexed ($D1 arg : CMP (arg),Y ;arg=0..$FF), MEM=&arg+Y
|
||||
OPCODE_ILL_D2 = 0xD2, // illegal opcode
|
||||
OPCODE_ILL_D3 = 0xD3, // illegal opcode
|
||||
OPCODE_ILL_D4 = 0xD4, // illegal opcode
|
||||
OPCODE_CMP_ZPX = 0xD5, // CoMPare accumulator, Zero Page Indexed, X ($D5 arg : CMP arg,X ;arg=0..$FF), MEM=arg+X
|
||||
OPCODE_DEC_ZPX = 0xD6, // DECrement memory, Zero Page Indexed, X ($D6 arg : DEC arg,X ;arg=0..$FF), MEM=arg+X
|
||||
OPCODE_ILL_D7 = 0xD7, // illegal opcode
|
||||
OPCODE_CLD = 0xD8, // CLear Decimal, Implied ($D8 : CLD)
|
||||
OPCODE_CMP_ABY = 0xD9, // CoMPare accumulator, Absolute Indexed, Y ($D9 addrlo addrhi : CMP addr,Y ;addr=0..$FFFF), MEM=addr+Y
|
||||
OPCODE_ILL_DA = 0xDA, // illegal opcode
|
||||
OPCODE_ILL_DB = 0xDB, // illegal opcode
|
||||
OPCODE_ILL_DC = 0xDC, // illegal opcode
|
||||
OPCODE_CMP_ABX = 0xDD, // CoMPare accumulator, Absolute Indexed, X ($DD addrlo addrhi : CMP addr,X ;addr=0..$FFFF), MEM=addr+X
|
||||
OPCODE_DEC_ABX = 0xDE, // DECrement memory, Absolute Indexed, X ($DE addrlo addrhi : DEC addr,X ;addr=0..$FFFF), MEM=addr+X
|
||||
OPCODE_ILL_DF = 0xDF, // illegal opcode
|
||||
OPCODE_CPX_IMM = 0xE0, // ComPare X register, Immediate ($E0 arg : CPX #arg ;arg=0..$FF), MEM=PC+1
|
||||
OPCODE_SBC_IZX = 0xE1, // SuBtract with Carry, Indexed Indirect ($E1 arg : SBC (arg,X) ;arg=0..$FF), MEM=&(arg+X)
|
||||
OPCODE_ILL_E2 = 0xE2, // illegal opcode
|
||||
OPCODE_ILL_E3 = 0xE3, // illegal opcode
|
||||
OPCODE_CPX_ZP = 0xE4, // ComPare X register, Zero Page ($E4 arg : CPX arg ;arg=0..$FF), MEM=arg
|
||||
OPCODE_SBC_ZP = 0xE5, // SuBtract with Carry, Zero Page ($E5 arg : SBC arg ;arg=0..$FF), MEM=arg
|
||||
OPCODE_INC_ZP = 0xE6, // INCrement memory, Zero Page ($E6 arg : INC arg ;arg=0..$FF), MEM=arg
|
||||
OPCODE_ILL_E7 = 0xE7, // illegal opcode
|
||||
OPCODE_INX = 0xE8, // INcrement X, Implied ($E8 : INX)
|
||||
OPCODE_SBC_IMM = 0xE9, // SuBtract with Carry, Immediate ($E9 arg : SBC #arg ;arg=0..$FF), MEM=PC+1
|
||||
OPCODE_NOP = 0xEA, // NO oPeration, Implied ($EA : NOP)
|
||||
OPCODE_ILL_EB = 0xEB, // illegal opcode
|
||||
OPCODE_CPX_ABS = 0xEC, // ComPare X register, Absolute ($EC addrlo addrhi : CPX addr ;addr=0..$FFFF), MEM=addr
|
||||
OPCODE_SBC_ABS = 0xED, // SuBtract with Carry, Absolute ($ED addrlo addrhi : SBC addr ;addr=0..$FFFF), MEM=addr
|
||||
OPCODE_INC_ABS = 0xEE, // INCrement memory, Absolute ($EE addrlo addrhi : INC addr ;addr=0..$FFFF), MEM=addr
|
||||
OPCODE_ILL_EF = 0xEF, // illegal opcode
|
||||
OPCODE_BEQ_REL = 0xF0, // Branch on EQual, Relative ($F0 signoffs : BEQ signoffs ;signoffs=0..$FF [-128 ($80)..127 ($7F)])
|
||||
OPCODE_SBC_IZY = 0xF1, // SuBtract with Carry, Indirect Indexed ($F1 arg : SBC (arg),Y ;arg=0..$FF), MEM=&arg+Y
|
||||
OPCODE_ILL_F2 = 0xF2, // illegal opcode
|
||||
OPCODE_ILL_F3 = 0xF3, // illegal opcode
|
||||
OPCODE_ILL_F4 = 0xF4, // illegal opcode
|
||||
OPCODE_SBC_ZPX = 0xF5, // SuBtract with Carry, Zero Page Indexed, X ($F5 arg : SBC arg,X ;arg=0..$FF), MEM=arg+X
|
||||
OPCODE_INC_ZPX = 0xF6, // INCrement memory, Zero Page Indexed, X ($F6 arg : INC arg,X ;arg=0..$FF), MEM=arg+X
|
||||
OPCODE_ILL_F7 = 0xF7, // illegal opcode
|
||||
OPCODE_SED = 0xF8, // SEt Decimal, Implied ($F8 : SED)
|
||||
OPCODE_SBC_ABY = 0xF9, // SuBtract with Carry, Absolute Indexed, Y ($F9 addrlo addrhi : SBC addr,Y ;addr=0..$FFFF), MEM=addr+Y
|
||||
OPCODE_ILL_FA = 0xFA, // illegal opcode
|
||||
OPCODE_ILL_FB = 0xFB, // illegal opcode
|
||||
OPCODE_ILL_FC = 0xFC, // illegal opcode
|
||||
OPCODE_SBC_ABX = 0xFD, // SuBtract with Carry, Absolute Indexed, X ($FD addrlo addrhi : SBC addr,X ;addr=0..$FFFF), MEM=addr+X
|
||||
OPCODE_INC_ABX = 0xFE, // INCrement memory, Absolute Indexed, X ($FE addrlo addrhi : INC addr,X ;addr=0..$FFFF), MEM=addr+X
|
||||
OPCODE_ILL_FF = 0xFF // illegal opcode
|
||||
};
|
||||
|
||||
struct OpCode {
|
||||
int code; // the byte value of the opcode
|
||||
int addrmode; // addressing mode (see eAddrModes)
|
||||
int time; // # of cycles
|
||||
string amf; // assembler mnemonic
|
||||
};
|
||||
|
||||
typedef map<eOpCodes,OpCode> OpCodesMap;
|
||||
|
||||
/*
|
||||
*------------------------------------------------------------------------------
|
||||
bit -> 7 0
|
||||
+---+---+---+---+---+---+---+---+
|
||||
| N | V | | B | D | I | Z | C | <-- flag, 0/1 = reset/set
|
||||
+---+---+---+---+---+---+---+---+
|
||||
|
||||
|
||||
N = NEGATIVE. Set if bit 7 of the accumulator is set.
|
||||
|
||||
V = OVERFLOW. Set if the addition of two like-signed numbers or the
|
||||
subtraction of two unlike-signed numbers produces a result
|
||||
greater than +127 or less than -128.
|
||||
|
||||
B = BRK COMMAND. Set if an interrupt caused by a BRK, reset if
|
||||
caused by an external interrupt.
|
||||
|
||||
D = DECIMAL MODE. Set if decimal mode active.
|
||||
|
||||
I = IRQ DISABLE. Set if maskable interrupts are disabled.
|
||||
|
||||
Z = ZERO. Set if the result of the last operation (load/inc/dec/
|
||||
add/sub) was zero.
|
||||
|
||||
C = CARRY. Set if the add produced a carry, or if the subtraction
|
||||
produced a borrow. Also holds bits after a logical shift.
|
||||
*------------------------------------------------------------------------------
|
||||
*/
|
||||
enum eCpuFlagMasks {
|
||||
FLAGS_CARRY = 0x01, // 0: C
|
||||
FLAGS_ZERO = 0x02, // 1: Z
|
||||
FLAGS_IRQ = 0x04, // 2: I
|
||||
FLAGS_DEC = 0x08, // 3: D
|
||||
FLAGS_BRK = 0x10, // 4: B (Clear if interrupt vectoring, set if BRK or PHP)
|
||||
FLAGS_UNUSED = 0x20, // 5: Unused flag (always set).
|
||||
FLAGS_OVERFLOW = 0x40, // 6: V
|
||||
FLAGS_SIGN = 0x80 // 7: N
|
||||
};
|
||||
|
||||
enum eLogicOps {
|
||||
LOGOP_OR,
|
||||
LOGOP_AND,
|
||||
LOGOP_EOR
|
||||
};
|
||||
|
||||
class MKCpu
|
||||
{
|
||||
public:
|
||||
|
||||
MKCpu();
|
||||
MKCpu(Memory *pmem);
|
||||
~MKCpu();
|
||||
|
||||
Regs *ExecOpcode(unsigned short memaddr);
|
||||
Regs *GetRegs();
|
||||
queue<string> GetExecHistory();
|
||||
unsigned short Disassemble(unsigned short addr,
|
||||
char *instrbuf); // Disassemble instruction in memory, return next instruction addr.
|
||||
|
||||
protected:
|
||||
|
||||
private:
|
||||
|
||||
struct Regs mReg; // CPU registers
|
||||
Memory *mpMem; // pointer to memory object
|
||||
bool mLocalMem; // true - memory locally allocated
|
||||
OpCodesMap mOpCodesMap; // hash table of all opcodes
|
||||
int mAddrModesLen[ADDRMODE_LENGTH]; // array of instructions lengths per addressing mode
|
||||
string mArgFmtTbl[ADDRMODE_LENGTH]; // array of instructions assembly formats per addressing mode
|
||||
queue<string> mExecHistory; // history of last 20 op-codes with arguments and registers statuses
|
||||
|
||||
|
||||
void InitCpu();
|
||||
void SetFlags(unsigned char reg); // set CPU flags ZERO and SIGN based on Acc, X or Y
|
||||
unsigned char ShiftLeft(unsigned char arg8); // Arithmetic Shift Left, set Carry flag
|
||||
unsigned char ShiftRight(unsigned char arg8); // Logical Shift Right, update flags NZC.
|
||||
unsigned char RotateLeft(unsigned char arg8); // Rotate left, Carry to bit 0, bit 7 to Carry, update flags N and Z.
|
||||
unsigned char RotateRight(unsigned char arg8); // Rotate left, Carry to bit 7, bit 0 to Carry, update flags N and Z.
|
||||
unsigned short GetArg16(unsigned char offs); // Get 2-byte argument, add offset, increase PC.
|
||||
void LogicOpAcc(unsigned short addr, int logop); // Perform logical bitwise operation between memory location and Acc.
|
||||
// Result in Acc. Set flags.
|
||||
unsigned short ComputeRelJump(unsigned char offs); // Compute new PC based on relative offset.
|
||||
unsigned short ComputeRelJump(unsigned short addr,
|
||||
unsigned char offs); // Compute new address after branch based on relative offset.
|
||||
unsigned char Conv2Bcd(unsigned short v); // Convert number to BCD representation.
|
||||
unsigned short Bcd2Num(unsigned char v); // Convert BCD code to number.
|
||||
bool CheckFlag(unsigned char flag); // Return true if given CPU status flag is set, false otherwise.
|
||||
void SetFlag(bool set, unsigned char flag); // Set or unset processor status flag.
|
||||
unsigned char AddWithCarry(unsigned char mem8); // Add With Carry, update flags and Acc.
|
||||
unsigned char SubWithCarry(unsigned char mem8); // Subtract With Carry, update flags and Acc.
|
||||
unsigned short GetAddrWithMode(int mode); // Get address of the byte argument with specified addr. mode
|
||||
unsigned short GetArgWithMode(unsigned short opcaddr,
|
||||
int mode); // Get argument from address with specified addr. mode
|
||||
unsigned short Disassemble(); // Disassemble instruction and argument per addressing mode
|
||||
void Add2History(string s); // add entry to op-codes execute history
|
||||
};
|
||||
|
||||
} // namespace MKBasic
|
||||
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -1,20 +1,20 @@
|
|||
#include "MKGenException.h"
|
||||
|
||||
namespace MKBasic {
|
||||
|
||||
MKGenException::MKGenException()
|
||||
{
|
||||
msCause = "Ouch!";
|
||||
}
|
||||
|
||||
MKGenException::MKGenException(string cause)
|
||||
{
|
||||
msCause = cause;
|
||||
}
|
||||
|
||||
string MKGenException::GetCause()
|
||||
{
|
||||
return msCause;
|
||||
}
|
||||
|
||||
} // namespace MKBasic
|
||||
#include "MKGenException.h"
|
||||
|
||||
namespace MKBasic {
|
||||
|
||||
MKGenException::MKGenException()
|
||||
{
|
||||
msCause = "Ouch!";
|
||||
}
|
||||
|
||||
MKGenException::MKGenException(string cause)
|
||||
{
|
||||
msCause = cause;
|
||||
}
|
||||
|
||||
string MKGenException::GetCause()
|
||||
{
|
||||
return msCause;
|
||||
}
|
||||
|
||||
} // namespace MKBasic
|
||||
|
|
|
|||
|
|
@ -1,23 +1,24 @@
|
|||
#ifndef MKGENEXCEPTION_H
|
||||
#define MKGENEXCEPTION_H
|
||||
|
||||
#include <string>
|
||||
#include <exception>
|
||||
|
||||
using namespace std;
|
||||
|
||||
namespace MKBasic {
|
||||
|
||||
class MKGenException : public exception {
|
||||
public:
|
||||
MKGenException();
|
||||
MKGenException(string cause);
|
||||
string GetCause();
|
||||
|
||||
private:
|
||||
string msCause;
|
||||
};
|
||||
|
||||
} // namespace MKBasic
|
||||
|
||||
#endif
|
||||
#ifndef MKGENEXCEPTION_H
|
||||
#define MKGENEXCEPTION_H
|
||||
|
||||
#include <string>
|
||||
#include <exception>
|
||||
|
||||
using namespace std;
|
||||
|
||||
namespace MKBasic {
|
||||
|
||||
class MKGenException : public exception {
|
||||
public:
|
||||
MKGenException();
|
||||
MKGenException(string cause);
|
||||
~MKGenException() throw() {};
|
||||
string GetCause();
|
||||
|
||||
private:
|
||||
string msCause;
|
||||
};
|
||||
|
||||
} // namespace MKBasic
|
||||
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -0,0 +1,46 @@
|
|||
# Project: MKBasic
|
||||
# Makefile created by Dev-C++ 5.11
|
||||
|
||||
CPP = g++.exe -D__DEBUG__
|
||||
CC = gcc.exe -D__DEBUG__
|
||||
WINDRES = windres.exe
|
||||
OBJ = main.o VMachine.o MKBasic.o MKCpu.o Memory.o Display.o MKGenException.o
|
||||
LINKOBJ = main.o VMachine.o MKBasic.o MKCpu.o Memory.o Display.o MKGenException.o
|
||||
LIBS = -L"C:/Program Files (x86)/Dev-Cpp/MinGW64/lib32" -L"C:/Program Files (x86)/Dev-Cpp/MinGW64/x86_64-w64-mingw32/lib32" -static-libgcc -m32 -g3
|
||||
INCS = -I"C:/Program Files (x86)/Dev-Cpp/MinGW64/include" -I"C:/Program Files (x86)/Dev-Cpp/MinGW64/x86_64-w64-mingw32/include" -I"C:/Program Files (x86)/Dev-Cpp/MinGW64/lib/gcc/x86_64-w64-mingw32/4.9.2/include"
|
||||
CXXINCS = -I"C:/Program Files (x86)/Dev-Cpp/MinGW64/include" -I"C:/Program Files (x86)/Dev-Cpp/MinGW64/x86_64-w64-mingw32/include" -I"C:/Program Files (x86)/Dev-Cpp/MinGW64/lib/gcc/x86_64-w64-mingw32/4.9.2/include" -I"C:/Program Files (x86)/Dev-Cpp/MinGW64/lib/gcc/x86_64-w64-mingw32/4.9.2/include/c++"
|
||||
BIN = MKBasic.exe
|
||||
CXXFLAGS = $(CXXINCS) -m32 -std=c++11 -Wall -Wextra -pedantic -g3
|
||||
CFLAGS = $(INCS) -m32 -std=c++11 -Wall -Wextra -pedantic -g3
|
||||
RM = rm.exe -f
|
||||
|
||||
.PHONY: all all-before all-after clean clean-custom
|
||||
|
||||
all: all-before $(BIN) all-after
|
||||
|
||||
clean: clean-custom
|
||||
${RM} $(OBJ) $(BIN)
|
||||
|
||||
$(BIN): $(OBJ)
|
||||
$(CPP) $(LINKOBJ) -o $(BIN) $(LIBS)
|
||||
|
||||
main.o: main.cpp
|
||||
$(CPP) -c main.cpp -o main.o $(CXXFLAGS)
|
||||
|
||||
VMachine.o: VMachine.cpp
|
||||
$(CPP) -c VMachine.cpp -o VMachine.o $(CXXFLAGS)
|
||||
|
||||
MKBasic.o: MKBasic.cpp
|
||||
$(CPP) -c MKBasic.cpp -o MKBasic.o $(CXXFLAGS)
|
||||
|
||||
MKCpu.o: MKCpu.cpp
|
||||
$(CPP) -c MKCpu.cpp -o MKCpu.o $(CXXFLAGS)
|
||||
|
||||
Memory.o: Memory.cpp
|
||||
$(CPP) -c Memory.cpp -o Memory.o $(CXXFLAGS)
|
||||
|
||||
Display.o: Display.cpp
|
||||
$(CPP) -c Display.cpp -o Display.o $(CXXFLAGS)
|
||||
|
||||
MKGenException.o: MKGenException.cpp
|
||||
$(CPP) -c MKGenException.cpp -o MKGenException.o $(CXXFLAGS)
|
||||
773
Memory.cpp
773
Memory.cpp
|
|
@ -1,310 +1,463 @@
|
|||
#include "Memory.h"
|
||||
#include <stdio.h>
|
||||
#include <conio.h>
|
||||
|
||||
//#define DBG 1
|
||||
#if defined (DBG)
|
||||
#include <iostream>
|
||||
using namespace std;
|
||||
#endif
|
||||
|
||||
/*
|
||||
*--------------------------------------------------------------------
|
||||
* Method:
|
||||
* Purpose:
|
||||
* Arguments:
|
||||
* Returns:
|
||||
*--------------------------------------------------------------------
|
||||
*/
|
||||
|
||||
namespace MKBasic {
|
||||
|
||||
/*
|
||||
*--------------------------------------------------------------------
|
||||
* Method:
|
||||
* Purpose:
|
||||
* Arguments:
|
||||
* Returns:
|
||||
*--------------------------------------------------------------------
|
||||
*/
|
||||
Memory::Memory()
|
||||
{
|
||||
Initialize();
|
||||
}
|
||||
|
||||
/*
|
||||
*--------------------------------------------------------------------
|
||||
* Method:
|
||||
* Purpose:
|
||||
* Arguments:
|
||||
* Returns:
|
||||
*--------------------------------------------------------------------
|
||||
*/
|
||||
Memory::~Memory()
|
||||
{
|
||||
}
|
||||
|
||||
/*
|
||||
*--------------------------------------------------------------------
|
||||
* Method:
|
||||
* Purpose:
|
||||
* Arguments:
|
||||
* Returns:
|
||||
*--------------------------------------------------------------------
|
||||
*/
|
||||
void Memory::Initialize()
|
||||
{
|
||||
unsigned short addr = 0;
|
||||
for (int i=0; i < 0xFFFF; i++) {
|
||||
m8bitMem[addr++] = 0;
|
||||
}
|
||||
mCharIOAddr = CHARIO_ADDR;
|
||||
mCharIOActive = false;
|
||||
mIOEcho = false;
|
||||
mInBufDataBegin = mInBufDataEnd = 0;
|
||||
mOutBufDataBegin = mOutBufDataEnd = 0;
|
||||
mROMBegin = ROM_BEGIN;
|
||||
mROMEnd = ROM_END;
|
||||
mROMActive = false;
|
||||
}
|
||||
|
||||
/*
|
||||
*--------------------------------------------------------------------
|
||||
* Method:
|
||||
* Purpose:
|
||||
* Arguments:
|
||||
* Returns:
|
||||
*--------------------------------------------------------------------
|
||||
*/
|
||||
void Memory::EnableROM()
|
||||
{
|
||||
mROMActive = true;
|
||||
}
|
||||
|
||||
/*
|
||||
*--------------------------------------------------------------------
|
||||
* Method:
|
||||
* Purpose:
|
||||
* Arguments:
|
||||
* Returns:
|
||||
*--------------------------------------------------------------------
|
||||
*/
|
||||
void Memory::EnableROM(unsigned short start, unsigned short end)
|
||||
{
|
||||
if (mROMEnd > mROMBegin) {
|
||||
mROMBegin = start;
|
||||
mROMEnd = end;
|
||||
}
|
||||
EnableROM();
|
||||
}
|
||||
|
||||
/*
|
||||
*--------------------------------------------------------------------
|
||||
* Method: ReadCharKb()
|
||||
* Purpose: If char I/O active, read character from console
|
||||
* (non-blocking) and put in an input FIFO buffer.
|
||||
* Arguments: n/a
|
||||
* Returns: n/a
|
||||
*--------------------------------------------------------------------
|
||||
*/
|
||||
unsigned char Memory::ReadCharKb()
|
||||
{
|
||||
unsigned char ret = 0;
|
||||
if (mCharIOActive) {
|
||||
int c;
|
||||
putchar('?');
|
||||
while(!kbhit());
|
||||
c = getch();
|
||||
if (mIOEcho) putchar(c);
|
||||
mCharIOBufIn[mInBufDataEnd] = c;
|
||||
mInBufDataEnd++;
|
||||
if (mInBufDataEnd >= CHARIO_BUF_SIZE) mInBufDataEnd = 0;
|
||||
ret = c;
|
||||
}
|
||||
return ret;
|
||||
}
|
||||
|
||||
/*
|
||||
*--------------------------------------------------------------------
|
||||
* Method: GetCharIn()
|
||||
* Purpose: Return character from the emulated character I/O FIFO
|
||||
* input buffer or -1 if FIFO empty or char I/O not active.
|
||||
* Arguments: n/a
|
||||
* Returns: character
|
||||
*--------------------------------------------------------------------
|
||||
*/
|
||||
char Memory::GetCharIn()
|
||||
{
|
||||
char ret = -1;
|
||||
if (mCharIOActive) {
|
||||
if (mInBufDataEnd != mInBufDataBegin) {
|
||||
ret = mCharIOBufIn[mInBufDataBegin];
|
||||
mInBufDataBegin++;
|
||||
if (mInBufDataBegin >= CHARIO_BUF_SIZE) mInBufDataBegin = 0;
|
||||
}
|
||||
}
|
||||
return ret;
|
||||
}
|
||||
|
||||
/*
|
||||
*--------------------------------------------------------------------
|
||||
* Method: GetCharOut()
|
||||
* Purpose: Return character from the emulated character I/O FIFO
|
||||
* output buffer or -1 if FIFO empty or char I/O not
|
||||
* active.
|
||||
* Arguments: n/a
|
||||
* Returns: character
|
||||
*--------------------------------------------------------------------
|
||||
*/
|
||||
char Memory::GetCharOut()
|
||||
{
|
||||
char ret = -1;
|
||||
if (mCharIOActive) {
|
||||
if (mOutBufDataEnd != mOutBufDataBegin) {
|
||||
ret = mCharIOBufOut[mOutBufDataBegin];
|
||||
mOutBufDataBegin++;
|
||||
if (mOutBufDataBegin >= CHARIO_BUF_SIZE) mOutBufDataBegin = 0;
|
||||
}
|
||||
}
|
||||
return ret;
|
||||
}
|
||||
|
||||
/*
|
||||
*--------------------------------------------------------------------
|
||||
* Method: PutCharIO()
|
||||
* Purpose: Put character in the output char I/O FIFO buffer.
|
||||
* Arguments: c - character
|
||||
* Returns: n/a
|
||||
*--------------------------------------------------------------------
|
||||
*/
|
||||
void Memory::PutCharIO(char c)
|
||||
{
|
||||
if (mCharIOActive) {
|
||||
mCharIOBufOut[mOutBufDataEnd] = c;
|
||||
mOutBufDataEnd++;
|
||||
if (mOutBufDataEnd >= CHARIO_BUF_SIZE) mOutBufDataEnd = 0;
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
*--------------------------------------------------------------------
|
||||
* Method:
|
||||
* Purpose:
|
||||
* Arguments:
|
||||
* Returns:
|
||||
*--------------------------------------------------------------------
|
||||
*/
|
||||
unsigned char Memory::Peek8bit(unsigned short addr)
|
||||
{
|
||||
if (mCharIOActive && addr == mCharIOAddr) {
|
||||
#if defined (DBG)
|
||||
cout << "DBG: Peek8bit($" << hex << addr << ") BEFORE ReadCharKb()" << endl;
|
||||
cout << "DBG: m8bitMem[$" << hex << addr << "] = $" << hex << (unsigned short)m8bitMem[addr] << endl;
|
||||
for (unsigned int a = 0xFFF0; a < 0x10000; a++) {
|
||||
cout << "DBG: m8bitMem[$" << hex << a << "] = $" << hex << (unsigned short)m8bitMem[a] << endl;
|
||||
}
|
||||
#endif
|
||||
m8bitMem[addr] = ReadCharKb();
|
||||
#if defined (DBG)
|
||||
cout << "************************" << endl;
|
||||
cout << "DBG: Peek8bit($" << hex << addr << ") AFTER ReadCharKb()" << endl;
|
||||
cout << "DBG: m8bitMem[$" << hex << addr << "] = $" << hex << (unsigned short)m8bitMem[addr] << endl;
|
||||
for (unsigned int a = 0xFFF0; a < 0x10000; a++) {
|
||||
cout << "DBG: m8bitMem[$" << hex << a << "] = $" << hex << (unsigned short)m8bitMem[a] << endl;
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
return m8bitMem[addr];
|
||||
}
|
||||
|
||||
/*
|
||||
*--------------------------------------------------------------------
|
||||
* Method:
|
||||
* Purpose:
|
||||
* Arguments:
|
||||
* Returns:
|
||||
*--------------------------------------------------------------------
|
||||
*/
|
||||
unsigned short Memory::Peek16bit(unsigned short addr)
|
||||
{
|
||||
unsigned short ret = 0;
|
||||
|
||||
if (mCharIOActive && addr == mCharIOAddr) {
|
||||
#if defined (DBG)
|
||||
cout << "DBG: Peek16bit(" << addr << ")" << endl;
|
||||
#endif
|
||||
m8bitMem[addr] = ReadCharKb();
|
||||
}
|
||||
|
||||
ret = m8bitMem[addr++];
|
||||
ret += m8bitMem[addr] * 256;
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
/*
|
||||
*--------------------------------------------------------------------
|
||||
* Method: Poke8bit()
|
||||
* Purpose: Write byte to specified memory location.
|
||||
* If the memory location is mapped to character I/O,
|
||||
* write value to output buffer and memory location.
|
||||
* If the memory location is protected (ROM), do not
|
||||
* write the value.
|
||||
* Arguments: addr - (0x0000..0xffff) memory address,
|
||||
* val - value (0x00..0xff)
|
||||
* Returns: n/a
|
||||
*--------------------------------------------------------------------
|
||||
*/
|
||||
void Memory::Poke8bit(unsigned short addr, unsigned char val)
|
||||
{
|
||||
if (mCharIOActive && addr == mCharIOAddr)
|
||||
PutCharIO(val);
|
||||
if (!mROMActive || (addr < ROM_BEGIN || addr > ROM_END)) {
|
||||
m8bitMem[addr] = val;
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
*--------------------------------------------------------------------
|
||||
* Method: SetCharIO()
|
||||
* Purpose: Activates and sets an address of basic character I/O
|
||||
* emulation (console).
|
||||
* Arguments: addr - address of I/O area (0x0000..0xFFFF)
|
||||
* Returns: n/a
|
||||
*--------------------------------------------------------------------
|
||||
*/
|
||||
void Memory::SetCharIO(unsigned short addr, bool echo)
|
||||
{
|
||||
mCharIOAddr = addr;
|
||||
mCharIOActive = true;
|
||||
mIOEcho = echo;
|
||||
}
|
||||
|
||||
/*
|
||||
*--------------------------------------------------------------------
|
||||
* Method: DisableCharIO()
|
||||
* Purpose: Deactivates basic character I/O emulation (console).
|
||||
* Arguments: n/a
|
||||
* Returns: n/a
|
||||
*--------------------------------------------------------------------
|
||||
*/
|
||||
void Memory::DisableCharIO()
|
||||
{
|
||||
mCharIOActive = false;
|
||||
}
|
||||
|
||||
/*
|
||||
*--------------------------------------------------------------------
|
||||
* Method: GetCharIOAddr()
|
||||
* Purpose: Returns current address of basic character I/O area.
|
||||
* Arguments: n/a
|
||||
* Returns: address of I/O area
|
||||
*--------------------------------------------------------------------
|
||||
*/
|
||||
unsigned short Memory::GetCharIOAddr()
|
||||
{
|
||||
return mCharIOAddr;
|
||||
}
|
||||
|
||||
} // namespace MKBasic
|
||||
|
||||
#include "Memory.h"
|
||||
|
||||
#include <stdio.h>
|
||||
#include <ctype.h>
|
||||
#if defined(WINDOWS)
|
||||
#include <conio.h>
|
||||
#endif
|
||||
|
||||
//#define DBG 1
|
||||
#if defined (DBG)
|
||||
#include <iostream>
|
||||
using namespace std;
|
||||
#endif
|
||||
|
||||
/*
|
||||
*--------------------------------------------------------------------
|
||||
* Method:
|
||||
* Purpose:
|
||||
* Arguments:
|
||||
* Returns:
|
||||
*--------------------------------------------------------------------
|
||||
*/
|
||||
|
||||
namespace MKBasic {
|
||||
|
||||
/*
|
||||
*--------------------------------------------------------------------
|
||||
* Method:
|
||||
* Purpose:
|
||||
* Arguments:
|
||||
* Returns:
|
||||
*--------------------------------------------------------------------
|
||||
*/
|
||||
Memory::Memory()
|
||||
{
|
||||
Initialize();
|
||||
}
|
||||
|
||||
/*
|
||||
*--------------------------------------------------------------------
|
||||
* Method:
|
||||
* Purpose:
|
||||
* Arguments:
|
||||
* Returns:
|
||||
*--------------------------------------------------------------------
|
||||
*/
|
||||
Memory::~Memory()
|
||||
{
|
||||
}
|
||||
|
||||
/*
|
||||
*--------------------------------------------------------------------
|
||||
* Method:
|
||||
* Purpose:
|
||||
* Arguments:
|
||||
* Returns:
|
||||
*--------------------------------------------------------------------
|
||||
*/
|
||||
void Memory::Initialize()
|
||||
{
|
||||
unsigned short addr = 0;
|
||||
for (int i=0; i < 0xFFFF; i++) {
|
||||
m8bitMem[addr++] = 0;
|
||||
}
|
||||
mCharIOAddr = CHARIO_ADDR;
|
||||
mCharIOActive = false;
|
||||
mIOEcho = false;
|
||||
mInBufDataBegin = mInBufDataEnd = 0;
|
||||
mOutBufDataBegin = mOutBufDataEnd = 0;
|
||||
mROMBegin = ROM_BEGIN;
|
||||
mROMEnd = ROM_END;
|
||||
mROMActive = false;
|
||||
}
|
||||
|
||||
#if defined(LINUX)
|
||||
#include <stdlib.h>
|
||||
#include <string.h>
|
||||
#include <signal.h>
|
||||
|
||||
struct termios orig_termios;
|
||||
|
||||
/*
|
||||
*--------------------------------------------------------------------
|
||||
* Method:
|
||||
* Purpose:
|
||||
* Arguments:
|
||||
* Returns:
|
||||
*--------------------------------------------------------------------
|
||||
*/
|
||||
void reset_terminal_mode()
|
||||
{
|
||||
tcsetattr(0, TCSANOW, &orig_termios);
|
||||
}
|
||||
|
||||
/*
|
||||
*--------------------------------------------------------------------
|
||||
* Method:
|
||||
* Purpose:
|
||||
* Arguments:
|
||||
* Returns:
|
||||
*--------------------------------------------------------------------
|
||||
*/
|
||||
void Memory::set_conio_terminal_mode()
|
||||
{
|
||||
struct termios new_termios;
|
||||
|
||||
/* take two copies - one for now, one for later */
|
||||
tcgetattr(0, &orig_termios);
|
||||
memcpy(&new_termios, &orig_termios, sizeof(new_termios));
|
||||
|
||||
/* register cleanup handler, and set the new terminal mode */
|
||||
atexit(reset_terminal_mode);
|
||||
cfmakeraw(&new_termios);
|
||||
tcsetattr(0, TCSANOW, &new_termios);
|
||||
}
|
||||
|
||||
/*
|
||||
*--------------------------------------------------------------------
|
||||
* Method:
|
||||
* Purpose:
|
||||
* Arguments:
|
||||
* Returns:
|
||||
*--------------------------------------------------------------------
|
||||
*/
|
||||
int Memory::kbhit()
|
||||
{
|
||||
struct timeval tv = { 0L, 0L };
|
||||
fd_set fds;
|
||||
FD_ZERO(&fds);
|
||||
FD_SET(0, &fds);
|
||||
return select(1, &fds, NULL, NULL, &tv);
|
||||
}
|
||||
|
||||
/*
|
||||
*--------------------------------------------------------------------
|
||||
* Method:
|
||||
* Purpose:
|
||||
* Arguments:
|
||||
* Returns:
|
||||
*--------------------------------------------------------------------
|
||||
*/
|
||||
int Memory::getch()
|
||||
{
|
||||
int r;
|
||||
unsigned char c;
|
||||
if ((r = read(0, &c, sizeof(c))) < 0) {
|
||||
return r;
|
||||
} else {
|
||||
return c;
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
/*
|
||||
*--------------------------------------------------------------------
|
||||
* Method:
|
||||
* Purpose:
|
||||
* Arguments:
|
||||
* Returns:
|
||||
*--------------------------------------------------------------------
|
||||
*/
|
||||
void Memory::EnableROM()
|
||||
{
|
||||
mROMActive = true;
|
||||
}
|
||||
|
||||
/*
|
||||
*--------------------------------------------------------------------
|
||||
* Method:
|
||||
* Purpose:
|
||||
* Arguments:
|
||||
* Returns:
|
||||
*--------------------------------------------------------------------
|
||||
*/
|
||||
void Memory::DisableROM()
|
||||
{
|
||||
mROMActive = false;
|
||||
}
|
||||
|
||||
/*
|
||||
*--------------------------------------------------------------------
|
||||
* Method:
|
||||
* Purpose:
|
||||
* Arguments:
|
||||
* Returns:
|
||||
*--------------------------------------------------------------------
|
||||
*/
|
||||
void Memory::SetROM(unsigned short start, unsigned short end)
|
||||
{
|
||||
if (mROMEnd > mROMBegin) {
|
||||
mROMBegin = start;
|
||||
mROMEnd = end;
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
*--------------------------------------------------------------------
|
||||
* Method:
|
||||
* Purpose:
|
||||
* Arguments:
|
||||
* Returns:
|
||||
*--------------------------------------------------------------------
|
||||
*/
|
||||
void Memory::EnableROM(unsigned short start, unsigned short end)
|
||||
{
|
||||
SetROM(start,end);
|
||||
EnableROM();
|
||||
}
|
||||
|
||||
/*
|
||||
*--------------------------------------------------------------------
|
||||
* Method: ReadCharKb()
|
||||
* Purpose: If char I/O active, read character from console
|
||||
* (non-blocking) and put in an input FIFO buffer.
|
||||
* Arguments: nonblock - if true, works in non-blocking mode
|
||||
* Returns: n/a
|
||||
*--------------------------------------------------------------------
|
||||
*/
|
||||
unsigned char Memory::ReadCharKb(bool nonblock)
|
||||
{
|
||||
unsigned char ret = 0;
|
||||
if (mCharIOActive) {
|
||||
#if defined(LINUX)
|
||||
set_conio_terminal_mode();
|
||||
#endif
|
||||
static int c = ' ';
|
||||
putchar('\n');
|
||||
if (mIOEcho && isprint(c)) putchar(c);
|
||||
else putchar(' ');
|
||||
fputs("<-Character Input (CTRL-Y to BREAK) ?\r",stdout);
|
||||
fflush(stdout);
|
||||
if (!nonblock) while(!kbhit());
|
||||
else c = 0;
|
||||
c = getch();
|
||||
#if defined(LINUX)
|
||||
if (c == 3) { // capture CTRL-C in CONIO mode
|
||||
reset_terminal_mode();
|
||||
kill(getpid(),SIGINT);
|
||||
}
|
||||
#endif
|
||||
fputs(" \r",stdout);
|
||||
fflush(stdout);
|
||||
mCharIOBufIn[mInBufDataEnd] = c;
|
||||
mInBufDataEnd++;
|
||||
if (mInBufDataEnd >= CHARIO_BUF_SIZE) mInBufDataEnd = 0;
|
||||
ret = c;
|
||||
#if defined(LINUX)
|
||||
reset_terminal_mode();
|
||||
#endif
|
||||
}
|
||||
return ret;
|
||||
}
|
||||
|
||||
/*
|
||||
*--------------------------------------------------------------------
|
||||
* Method: GetCharIn()
|
||||
* Purpose: Return character from the emulated character I/O FIFO
|
||||
* input buffer or -1 if FIFO empty or char I/O not active.
|
||||
* Arguments: n/a
|
||||
* Returns: character
|
||||
*--------------------------------------------------------------------
|
||||
*/
|
||||
char Memory::GetCharIn()
|
||||
{
|
||||
char ret = -1;
|
||||
if (mCharIOActive) {
|
||||
if (mInBufDataEnd != mInBufDataBegin) {
|
||||
ret = mCharIOBufIn[mInBufDataBegin];
|
||||
mInBufDataBegin++;
|
||||
if (mInBufDataBegin >= CHARIO_BUF_SIZE) mInBufDataBegin = 0;
|
||||
}
|
||||
}
|
||||
return ret;
|
||||
}
|
||||
|
||||
/*
|
||||
*--------------------------------------------------------------------
|
||||
* Method: GetCharOut()
|
||||
* Purpose: Return character from the emulated character I/O FIFO
|
||||
* output buffer or -1 if FIFO empty or char I/O not
|
||||
* active.
|
||||
* Arguments: n/a
|
||||
* Returns: character
|
||||
*--------------------------------------------------------------------
|
||||
*/
|
||||
char Memory::GetCharOut()
|
||||
{
|
||||
char ret = -1;
|
||||
if (mCharIOActive) {
|
||||
if (mOutBufDataEnd != mOutBufDataBegin) {
|
||||
ret = mCharIOBufOut[mOutBufDataBegin];
|
||||
mOutBufDataBegin++;
|
||||
if (mOutBufDataBegin >= CHARIO_BUF_SIZE) mOutBufDataBegin = 0;
|
||||
}
|
||||
}
|
||||
return ret;
|
||||
}
|
||||
|
||||
/*
|
||||
*--------------------------------------------------------------------
|
||||
* Method: PutCharIO()
|
||||
* Purpose: Put character in the output char I/O FIFO buffer.
|
||||
* Arguments: c - character
|
||||
* Returns: n/a
|
||||
*--------------------------------------------------------------------
|
||||
*/
|
||||
void Memory::PutCharIO(char c)
|
||||
{
|
||||
if (mCharIOActive) {
|
||||
mCharIOBufOut[mOutBufDataEnd] = c;
|
||||
mOutBufDataEnd++;
|
||||
if (mOutBufDataEnd >= CHARIO_BUF_SIZE) mOutBufDataEnd = 0;
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
*--------------------------------------------------------------------
|
||||
* Method:
|
||||
* Purpose:
|
||||
* Arguments:
|
||||
* Returns:
|
||||
*--------------------------------------------------------------------
|
||||
*/
|
||||
unsigned char Memory::Peek8bit(unsigned short addr)
|
||||
{
|
||||
if (mCharIOActive && addr == mCharIOAddr) {
|
||||
m8bitMem[addr] = ReadCharKb(false); // blocking mode input
|
||||
} else if (mCharIOActive && addr == mCharIOAddr+1) {
|
||||
m8bitMem[addr] = ReadCharKb(true); // non-blocking mode input
|
||||
}
|
||||
|
||||
return m8bitMem[addr];
|
||||
}
|
||||
|
||||
/*
|
||||
*--------------------------------------------------------------------
|
||||
* Method:
|
||||
* Purpose:
|
||||
* Arguments:
|
||||
* Returns:
|
||||
*--------------------------------------------------------------------
|
||||
*/
|
||||
unsigned short Memory::Peek16bit(unsigned short addr)
|
||||
{
|
||||
unsigned short ret = 0;
|
||||
|
||||
if (mCharIOActive && addr == mCharIOAddr) {
|
||||
m8bitMem[addr] = ReadCharKb(false); // blocking mode input
|
||||
} else if (mCharIOActive && addr == mCharIOAddr+1) {
|
||||
m8bitMem[addr] = ReadCharKb(true); // non-blocking mode input
|
||||
}
|
||||
|
||||
ret = m8bitMem[addr++];
|
||||
ret += m8bitMem[addr] * 256;
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
/*
|
||||
*--------------------------------------------------------------------
|
||||
* Method: Poke8bit()
|
||||
* Purpose: Write byte to specified memory location.
|
||||
* If the memory location is mapped to character I/O,
|
||||
* write value to output buffer and memory location.
|
||||
* If the memory location is protected (ROM), do not
|
||||
* write the value.
|
||||
* Arguments: addr - (0x0000..0xffff) memory address,
|
||||
* val - value (0x00..0xff)
|
||||
* Returns: n/a
|
||||
*--------------------------------------------------------------------
|
||||
*/
|
||||
void Memory::Poke8bit(unsigned short addr, unsigned char val)
|
||||
{
|
||||
if (mCharIOActive && addr == mCharIOAddr)
|
||||
PutCharIO(val);
|
||||
if (!mROMActive || (addr < mROMBegin || addr > mROMEnd)) {
|
||||
m8bitMem[addr] = val;
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
*--------------------------------------------------------------------
|
||||
* Method: SetCharIO()
|
||||
* Purpose: Activates and sets an address of basic character I/O
|
||||
* emulation (console).
|
||||
* Arguments: addr - address of I/O area (0x0000..0xFFFF)
|
||||
* Returns: n/a
|
||||
*--------------------------------------------------------------------
|
||||
*/
|
||||
void Memory::SetCharIO(unsigned short addr, bool echo)
|
||||
{
|
||||
mCharIOAddr = addr;
|
||||
mCharIOActive = true;
|
||||
mIOEcho = echo;
|
||||
}
|
||||
|
||||
/*
|
||||
*--------------------------------------------------------------------
|
||||
* Method: DisableCharIO()
|
||||
* Purpose: Deactivates basic character I/O emulation (console).
|
||||
* Arguments: n/a
|
||||
* Returns: n/a
|
||||
*--------------------------------------------------------------------
|
||||
*/
|
||||
void Memory::DisableCharIO()
|
||||
{
|
||||
mCharIOActive = false;
|
||||
}
|
||||
|
||||
/*
|
||||
*--------------------------------------------------------------------
|
||||
* Method: GetCharIOAddr()
|
||||
* Purpose: Returns current address of basic character I/O area.
|
||||
* Arguments: n/a
|
||||
* Returns: address of I/O area
|
||||
*--------------------------------------------------------------------
|
||||
*/
|
||||
unsigned short Memory::GetCharIOAddr()
|
||||
{
|
||||
return mCharIOAddr;
|
||||
}
|
||||
|
||||
/*
|
||||
*--------------------------------------------------------------------
|
||||
* Method:
|
||||
* Purpose:
|
||||
* Arguments:
|
||||
* Returns:
|
||||
*--------------------------------------------------------------------
|
||||
*/
|
||||
unsigned short Memory::GetROMBegin()
|
||||
{
|
||||
return mROMBegin;
|
||||
}
|
||||
|
||||
/*
|
||||
*--------------------------------------------------------------------
|
||||
* Method:
|
||||
* Purpose:
|
||||
* Arguments:
|
||||
* Returns:
|
||||
*--------------------------------------------------------------------
|
||||
*/
|
||||
unsigned short Memory::GetROMEnd()
|
||||
{
|
||||
return mROMEnd;
|
||||
}
|
||||
|
||||
/*
|
||||
*--------------------------------------------------------------------
|
||||
* Method:
|
||||
* Purpose:
|
||||
* Arguments:
|
||||
* Returns:
|
||||
*--------------------------------------------------------------------
|
||||
*/
|
||||
bool Memory::IsROMEnabled()
|
||||
{
|
||||
return mROMActive;
|
||||
}
|
||||
|
||||
} // namespace MKBasic
|
||||
|
|
|
|||
132
Memory.h
132
Memory.h
|
|
@ -1,55 +1,77 @@
|
|||
#ifndef MEMORY_H
|
||||
#define MEMORY_H
|
||||
|
||||
#define MAX_8BIT_ADDR 0xFFFF
|
||||
#define CHARIO_ADDR 0xE000
|
||||
#define CHARIO_BUF_SIZE 256
|
||||
#define ROM_BEGIN 0xD000
|
||||
#define ROM_END 0xDFFF
|
||||
|
||||
namespace MKBasic {
|
||||
|
||||
class Memory
|
||||
{
|
||||
public:
|
||||
|
||||
Memory();
|
||||
~Memory();
|
||||
|
||||
void Initialize();
|
||||
unsigned char Peek8bit(unsigned short addr);
|
||||
unsigned short Peek16bit(unsigned short addr);
|
||||
void Poke8bit(unsigned short addr, unsigned char val);
|
||||
void SetCharIO(unsigned short addr, bool echo);
|
||||
void DisableCharIO();
|
||||
unsigned short GetCharIOAddr();
|
||||
char GetCharIn();
|
||||
char GetCharOut();
|
||||
void EnableROM();
|
||||
void EnableROM(unsigned short start, unsigned short end);
|
||||
|
||||
protected:
|
||||
|
||||
private:
|
||||
|
||||
unsigned char m8bitMem[MAX_8BIT_ADDR+1];
|
||||
char mCharIOBufIn[CHARIO_BUF_SIZE];
|
||||
char mCharIOBufOut[CHARIO_BUF_SIZE];
|
||||
unsigned int mInBufDataBegin;
|
||||
unsigned int mInBufDataEnd;
|
||||
unsigned int mOutBufDataBegin;
|
||||
unsigned int mOutBufDataEnd;
|
||||
unsigned short mCharIOAddr;
|
||||
bool mCharIOActive;
|
||||
bool mIOEcho;
|
||||
unsigned short mROMBegin;
|
||||
unsigned short mROMEnd;
|
||||
bool mROMActive;
|
||||
|
||||
unsigned char ReadCharKb();
|
||||
void PutCharIO(char c);
|
||||
};
|
||||
|
||||
} // namespace MKBasic
|
||||
|
||||
#endif
|
||||
#ifndef MEMORY_H
|
||||
#define MEMORY_H
|
||||
|
||||
#include "system.h"
|
||||
|
||||
#if defined(LINUX)
|
||||
#include <unistd.h>
|
||||
#include <sys/select.h>
|
||||
#include <termios.h>
|
||||
#endif
|
||||
|
||||
#define MAX_8BIT_ADDR 0xFFFF
|
||||
#define CHARIO_ADDR 0xE000
|
||||
#define CHARIO_BUF_SIZE 256
|
||||
#define ROM_BEGIN 0xD000
|
||||
#define ROM_END 0xDFFF
|
||||
#define MIN_ROM_BEGIN 0x0200
|
||||
|
||||
namespace MKBasic {
|
||||
|
||||
class Memory
|
||||
{
|
||||
public:
|
||||
|
||||
Memory();
|
||||
~Memory();
|
||||
|
||||
void Initialize();
|
||||
unsigned char Peek8bit(unsigned short addr);
|
||||
unsigned short Peek16bit(unsigned short addr);
|
||||
void Poke8bit(unsigned short addr, unsigned char val);
|
||||
void SetCharIO(unsigned short addr, bool echo);
|
||||
void DisableCharIO();
|
||||
unsigned short GetCharIOAddr();
|
||||
char GetCharIn();
|
||||
char GetCharOut();
|
||||
void EnableROM();
|
||||
void DisableROM();
|
||||
void SetROM(unsigned short start, unsigned short end);
|
||||
void EnableROM(unsigned short start, unsigned short end);
|
||||
unsigned short GetROMBegin();
|
||||
unsigned short GetROMEnd();
|
||||
bool IsROMEnabled();
|
||||
|
||||
protected:
|
||||
|
||||
private:
|
||||
|
||||
unsigned char m8bitMem[MAX_8BIT_ADDR+1];
|
||||
char mCharIOBufIn[CHARIO_BUF_SIZE];
|
||||
char mCharIOBufOut[CHARIO_BUF_SIZE];
|
||||
unsigned int mInBufDataBegin;
|
||||
unsigned int mInBufDataEnd;
|
||||
unsigned int mOutBufDataBegin;
|
||||
unsigned int mOutBufDataEnd;
|
||||
unsigned short mCharIOAddr;
|
||||
bool mCharIOActive;
|
||||
bool mIOEcho;
|
||||
unsigned short mROMBegin;
|
||||
unsigned short mROMEnd;
|
||||
bool mROMActive;
|
||||
|
||||
unsigned char ReadCharKb(bool nonblock);
|
||||
void PutCharIO(char c);
|
||||
|
||||
#if defined(LINUX)
|
||||
|
||||
void set_conio_terminal_mode();
|
||||
int kbhit();
|
||||
int getch();
|
||||
|
||||
#endif
|
||||
};
|
||||
|
||||
} // namespace MKBasic
|
||||
|
||||
#endif
|
||||
|
|
|
|||
48
Notes.txt
48
Notes.txt
|
|
@ -1,25 +1,25 @@
|
|||
|
||||
http://visual6502.org/wiki/index.php?title=6502DecimalMode
|
||||
|
||||
|
||||
NV-BDIZC
|
||||
|
||||
Tests for ADC
|
||||
00 + 00 and C=0 gives 00 and N=0 V=0 Z=1 C=0 (simulate)
|
||||
79 + 00 and C=1 gives 80 and N=1 V=1 Z=0 C=0 (simulate)
|
||||
24 + 56 and C=0 gives 80 and N=1 V=1 Z=0 C=0 (simulate)
|
||||
93 + 82 and C=0 gives 75 and N=0 V=1 Z=0 C=1 (simulate)
|
||||
89 + 76 and C=0 gives 65 and N=0 V=0 Z=0 C=1 (simulate)
|
||||
89 + 76 and C=1 gives 66 and N=0 V=0 Z=1 C=1 (simulate)
|
||||
80 + f0 and C=0 gives d0 and N=0 V=1 Z=0 C=1 (simulate)
|
||||
80 + fa and C=0 gives e0 and N=1 V=0 Z=0 C=1 (simulate)
|
||||
2f + 4f and C=0 gives 74 and N=0 V=0 Z=0 C=0 (simulate)
|
||||
6f + 00 and C=1 gives 76 and N=0 V=0 Z=0 C=0 (simulate)
|
||||
Tests for SBC
|
||||
00 - 00 and C=0 gives 99 and N=1 V=0 Z=0 C=0 (simulate)
|
||||
00 - 00 and C=1 gives 00 and N=0 V=0 Z=1 C=1 (simulate)
|
||||
00 - 01 and C=1 gives 99 and N=1 V=0 Z=0 C=0 (simulate)
|
||||
0a - 00 and C=1 gives 0a and N=0 V=0 Z=0 C=1 (simulate)
|
||||
0b - 00 and C=0 gives 0a and N=0 V=0 Z=0 C=1 (simulate)
|
||||
9a - 00 and C=1 gives 9a and N=1 V=0 Z=0 C=1 (simulate)
|
||||
|
||||
http://visual6502.org/wiki/index.php?title=6502DecimalMode
|
||||
|
||||
|
||||
NV-BDIZC
|
||||
|
||||
Tests for ADC
|
||||
00 + 00 and C=0 gives 00 and N=0 V=0 Z=1 C=0 (simulate)
|
||||
79 + 00 and C=1 gives 80 and N=1 V=1 Z=0 C=0 (simulate)
|
||||
24 + 56 and C=0 gives 80 and N=1 V=1 Z=0 C=0 (simulate)
|
||||
93 + 82 and C=0 gives 75 and N=0 V=1 Z=0 C=1 (simulate)
|
||||
89 + 76 and C=0 gives 65 and N=0 V=0 Z=0 C=1 (simulate)
|
||||
89 + 76 and C=1 gives 66 and N=0 V=0 Z=1 C=1 (simulate)
|
||||
80 + f0 and C=0 gives d0 and N=0 V=1 Z=0 C=1 (simulate)
|
||||
80 + fa and C=0 gives e0 and N=1 V=0 Z=0 C=1 (simulate)
|
||||
2f + 4f and C=0 gives 74 and N=0 V=0 Z=0 C=0 (simulate)
|
||||
6f + 00 and C=1 gives 76 and N=0 V=0 Z=0 C=0 (simulate)
|
||||
Tests for SBC
|
||||
00 - 00 and C=0 gives 99 and N=1 V=0 Z=0 C=0 (simulate)
|
||||
00 - 00 and C=1 gives 00 and N=0 V=0 Z=1 C=1 (simulate)
|
||||
00 - 01 and C=1 gives 99 and N=1 V=0 Z=0 C=0 (simulate)
|
||||
0a - 00 and C=1 gives 0a and N=0 V=0 Z=0 C=1 (simulate)
|
||||
0b - 00 and C=0 gives 0a and N=0 V=0 Z=0 C=1 (simulate)
|
||||
9a - 00 and C=1 gives 9a and N=1 V=0 Z=0 C=1 (simulate)
|
||||
9b - 00 and C=0 gives 9a and N=1 V=0 Z=0 C=1 (simulate)
|
||||
324
ReadMe.txt
324
ReadMe.txt
|
|
@ -1,62 +1,262 @@
|
|||
|
||||
Project: MKBasic
|
||||
Author: Copyright (C) Marek Karcz 2016. All rights reserved.
|
||||
Purpose:
|
||||
MOS 6502 emulator, Virtual CPU/Machine and potentially retro-style 8-bit computer emulator,
|
||||
MOS-6502-compatible virtual computer featuring BASIC interpreter, machine code monitor etc.
|
||||
|
||||
Memory images extensions: .RAM, .ROM
|
||||
|
||||
Format of the memory definition file:
|
||||
|
||||
; comment
|
||||
ADDR
|
||||
address
|
||||
data
|
||||
ORG
|
||||
address
|
||||
|
||||
Where:
|
||||
ADDR - label indicating that starting address will follow in next
|
||||
line
|
||||
ORG - label indicating that the address counter will change to the
|
||||
value provided in next line
|
||||
address - decimal or hexadecimal (prefix $) address in memory
|
||||
|
||||
E.g:
|
||||
ADDR
|
||||
$200
|
||||
|
||||
or
|
||||
|
||||
ADDR
|
||||
512
|
||||
|
||||
changes the default start address (256) to 512.
|
||||
|
||||
ORG
|
||||
49152
|
||||
|
||||
moves address counter to address 49152, following data will be
|
||||
loaded from that address forward
|
||||
|
||||
data - the multi-line stream of decimal of hexadecimal ($xx) values
|
||||
of size unsigned char (byte: 0-255) separated with spaces
|
||||
or commas.
|
||||
|
||||
E.g.:
|
||||
$00 $00 $00 $00
|
||||
$00 $00 $00 $00
|
||||
|
||||
or
|
||||
|
||||
$00,$00,$00,$00
|
||||
|
||||
or
|
||||
|
||||
0 0 0 0
|
||||
|
||||
or
|
||||
|
||||
0,0,0,0
|
||||
0 0 0 0
|
||||
|
||||
Project: MKBasic (VM6502).
|
||||
|
||||
Author: Copyright (C) Marek Karcz 2016. All rights reserved.
|
||||
Free for personal and non-commercial use.
|
||||
Code can be distributed and included in derivative work under
|
||||
condition that the original copyright notice is preserved.
|
||||
For use in commercial product, please contact me to obtain
|
||||
permission and discuss possible fees, at: makarcz@yahoo.com
|
||||
This software is provided with no warranty.
|
||||
|
||||
Purpose:
|
||||
|
||||
MOS 6502 emulator, Virtual CPU/Machine and potentially retro-style 8-bit
|
||||
computer emulator.
|
||||
MOS-6502-compatible virtual computer featuring BASIC interpreter, machine code
|
||||
monitor, input/output device emulation etc.
|
||||
Program works in DOS/shell console (text mode) only.
|
||||
Makefile are included to build under Windows 32/64 (mingw compiler required)
|
||||
and under Linux Ubuntu or Ubuntu based.
|
||||
|
||||
To build under Windows 32/64:
|
||||
|
||||
* Install MINGW64 under C:\mingw-w64\x86_64-5.3.0 folder.
|
||||
* Run mingw terminal.
|
||||
* Change current directory to that of this project.
|
||||
* Run: makeming.bat
|
||||
|
||||
To build under Linux:
|
||||
|
||||
* Make sure C++11 compliant version of GCC compiler is installed.
|
||||
* Change current directory to that of this project.
|
||||
* Run: make clean all
|
||||
|
||||
Program passed following tests:
|
||||
|
||||
* 6502 functional test by Klaus Dormann
|
||||
* AllSuiteA.asm from project hmc-6502
|
||||
|
||||
1. Credits/attributions:
|
||||
|
||||
Parts of this project is based on or contains 3-rd party work:
|
||||
|
||||
- Tiny Basic.
|
||||
- Enhanced Basic by Lee Davison.
|
||||
- Microchess by Peter Jennings (http://www.benlo.com/microchess/index.html).
|
||||
- 6502 functional test by Klaus Dormann.
|
||||
- All Suite test from project hmc-6502.
|
||||
|
||||
2. Format of the memory image definition file.
|
||||
|
||||
Program can load raw binary image of MOS 6502 opcodes.
|
||||
Binary image is always loaded from address $0000 and can be up to 64 kB long,
|
||||
so the code must be properly located inside that image.
|
||||
Depending on your favorite 6502 assembler, you may need to use proper command
|
||||
line arguments or configuration to achieve properly formatted binary file.
|
||||
E.g.: if using CL65 from CC65 package, create configuration file that defines
|
||||
memory segments that your 6502 code uses, then all of the segments (except the
|
||||
last one) must have attribute 'fill' set to 'yes' so the unsused areas are
|
||||
filled with 0-s.
|
||||
Two CFG files, one for microchess and one for All Suite from hmc-6502 project
|
||||
are supplied with this project and assembler source code adapted to be
|
||||
compiled with CL65.
|
||||
Other assemblers may need a different approach or may not be able to generate
|
||||
binary images that are required for this emulator.
|
||||
|
||||
Program can also load memory image definition file (plain text), which is
|
||||
a format developed especially for this project.
|
||||
|
||||
The format of the plain text memory image definition file is described below:
|
||||
|
||||
; comments
|
||||
ADDR
|
||||
address
|
||||
data
|
||||
ORG
|
||||
address
|
||||
data
|
||||
IOADDR
|
||||
address
|
||||
ROMBEGIN
|
||||
address
|
||||
ROMEND
|
||||
address
|
||||
ENROM
|
||||
ENIO
|
||||
EXEC
|
||||
address
|
||||
|
||||
Where:
|
||||
ADDR - label indicating that starting and run address will follow in
|
||||
the next line
|
||||
ORG - label indicating that the address counter will change to the
|
||||
value provided in next line
|
||||
IOADDR - label indicating that character I/O emulation trap address will
|
||||
follow in the next line
|
||||
ROMBEGIN - label indicating that the emulated read-only memory start address
|
||||
will follow in the next line
|
||||
ROMEND - label indicating that the emulated read-only memory end address
|
||||
will follow in the next line
|
||||
ENROM - enable read-only memory emulation
|
||||
ENIO - enable character I/O emulation
|
||||
EXEC - label indicating that the auto-execute address will follow
|
||||
in the next line
|
||||
|
||||
|
||||
address - decimal or hexadecimal (prefix $) address in memory
|
||||
|
||||
E.g:
|
||||
ADDR
|
||||
$0200
|
||||
|
||||
or
|
||||
|
||||
ADDR
|
||||
512
|
||||
|
||||
changes the default start address (256) to 512.
|
||||
|
||||
ORG
|
||||
49152
|
||||
|
||||
moves address counter to address 49152, following data will be
|
||||
loaded from that address forward
|
||||
|
||||
data - the multi-line stream of decimal of hexadecimal ($xx) values
|
||||
of size unsigned char (byte: 0-255) separated with spaces
|
||||
or commas.
|
||||
|
||||
E.g.:
|
||||
$00 $00 $00 $00
|
||||
$00 $00 $00 $00
|
||||
|
||||
or
|
||||
|
||||
$00,$00,$00,$00
|
||||
|
||||
or
|
||||
|
||||
0 0 0 0
|
||||
|
||||
or
|
||||
|
||||
0,0,0,0
|
||||
0 0 0 0
|
||||
|
||||
Each described above element of the memory image definition file is optional.
|
||||
|
||||
3. Character I/O emulation.
|
||||
|
||||
Emulator has ability to simulate a 80x25 text output display device and
|
||||
rudimentary character I/O functions. The emulation is implemented by the means
|
||||
of trapping memory locations defined to be designated I/O emulation addresses.
|
||||
The default memory location is $E000 and also by default, the character I/O
|
||||
is disabled. It can be enabled from the debug console with 'I' command:
|
||||
|
||||
I hexaddr
|
||||
|
||||
E.g.:
|
||||
|
||||
I E000
|
||||
|
||||
or
|
||||
|
||||
I FE00
|
||||
|
||||
or by putting optional statements in the memory image dedinition file:
|
||||
|
||||
ENIO
|
||||
|
||||
or
|
||||
|
||||
IOADDR
|
||||
address
|
||||
ENIO
|
||||
|
||||
Where:
|
||||
|
||||
address - decimal or hexadecimal (with prefix '$') address in memory
|
||||
$0000 - $FFFF.
|
||||
|
||||
The same address is used for both, input and output operations.
|
||||
|
||||
Reading from IOADDR inside the 6502 code invokes a blocking character
|
||||
input function from user's DOS/shell session.
|
||||
After user enters the character, the memory location contains the character
|
||||
code and also emulated CPU Acc register contains the same code.
|
||||
|
||||
Reading from IOADDR+1 inside 6502 code invokes a non-blocking character
|
||||
input function from user's DOS/shell session.
|
||||
This function is different than blocking one in one respect.
|
||||
This function will return value 0 in the memory location and Acc register
|
||||
if there was no key pressed by the user (no character waiting in buffer).
|
||||
If there was a key typed, the function will act as the blocking counterpart.
|
||||
|
||||
Writing to IOADDR inside the 6502 code will result in character code
|
||||
being put in the IOADDR memory location and also written to the character
|
||||
output buffer of the emulated display device. That character is not
|
||||
immediately transferred to the user's DOS/shell session. It is written to the
|
||||
emulated display's text memory instead. Depending on the mode in which
|
||||
emulator is currently working (continuous or step-by-step code execution),
|
||||
the emulated display device contents may or may not be updated on the user's
|
||||
screen in real time fashion. Remember that this is a DOS/shell console
|
||||
application. The user's console is shared among various functions of the
|
||||
program. In step-by-step mode, if the character I/O emulation is enabled, the
|
||||
current contents of the emulated display device can be displayed with
|
||||
corresponding debug console command: 'T'.
|
||||
|
||||
4. ROM (read-only memory) emulation.
|
||||
|
||||
This facility provides very basic means for memory mapping of the read-only
|
||||
area. This may be required by some 6502 programs that check for non-writable
|
||||
memory to establish the bounds of memory that can be used for data and code.
|
||||
One good example is Tiny Basic.
|
||||
By default the ROM emulation is disabled and the memory range of ROM is
|
||||
defined as $D000 - $DFFF.
|
||||
ROM emulation can be enabled (and the memory range defined) using debug
|
||||
console's command 'K':
|
||||
|
||||
K [rombegin] [romend] - to enable
|
||||
|
||||
or
|
||||
|
||||
K - to disable
|
||||
|
||||
The ROM emulation can also be defined and enabled in the memory image
|
||||
definition file with following statements:
|
||||
|
||||
ROMBEGIN
|
||||
address
|
||||
ROMEND
|
||||
address
|
||||
ENROM
|
||||
|
||||
5. Additional comments and remarks.
|
||||
|
||||
IOADDR is permitted to be located in the emulated ROM memory range.
|
||||
The writing to IOADDR is trapped first before checking ROM range and writing
|
||||
to it is permitted when character I/O emulation and ROM are enabled at the
|
||||
same time. It is a good idea in fact to put the IOADDR inside ROM range,
|
||||
otherwise memory scanning routines like the one in Tiny Basic may trigger
|
||||
unexpected character input because of the reading from IOADDR during the scan.
|
||||
If you experience unexpected character input prompt while emulating
|
||||
6502 code, this may be the case. Reconfigure your IOADDR to be inside ROM in
|
||||
such case and try again.
|
||||
|
||||
6. Warranty and License Agreement.
|
||||
|
||||
This software is provided with No Warranty.
|
||||
I (The Author) will not be held responsible for any damage to computer
|
||||
systems, data or user's health resulting from using this software.
|
||||
Please use responsibly.
|
||||
This software is provided in hope that it will be be useful and free of
|
||||
charge for non-commercial and educational use.
|
||||
Distribution of this software in non-commercial and educational derivative
|
||||
work is permitted under condition that original copyright notices and
|
||||
comments are preserved. Some 3-rd party work included with this project
|
||||
may require separate application for permission from their respective
|
||||
authors/copyright owners.
|
||||
|
||||
|
||||
|
||||
|
|
|
|||
582
TestBCD.65s
582
TestBCD.65s
|
|
@ -1,291 +1,291 @@
|
|||
; Verify decimal mode behavior
|
||||
; Written by Bruce Clark. This code is public domain.
|
||||
;
|
||||
; Returns:
|
||||
; ERROR = 0 if the test passed
|
||||
; ERROR = 1 if the test failed
|
||||
;
|
||||
; This routine requires 17 bytes of RAM -- 1 byte each for:
|
||||
; AR, CF, DA, DNVZC, ERROR, HA, HNVZC, N1, N1H, N1L, N2, N2L, NF, VF, and ZF
|
||||
; and 2 bytes for N2H
|
||||
;
|
||||
; Variables:
|
||||
; N1 and N2 are the two numbers to be added or subtracted
|
||||
; N1H, N1L, N2H, and N2L are the upper 4 bits and lower 4 bits of N1 and N2
|
||||
; DA and DNVZC are the actual accumulator and flag results in decimal mode
|
||||
; HA and HNVZC are the accumulator and flag results when N1 and N2 are
|
||||
; added or subtracted using binary arithmetic
|
||||
; AR, NF, VF, ZF, and CF are the predicted decimal mode accumulator and
|
||||
; flag results, calculated using binary arithmetic
|
||||
;
|
||||
; This program takes approximately 1 minute at 1 MHz (a few seconds more on
|
||||
; a 65C02 than a 6502 or 65816)
|
||||
;
|
||||
*=$0300
|
||||
|
||||
AR: .DB 0
|
||||
CF: .DB 0
|
||||
DA: .DB 0
|
||||
DNVZC: .DB 0
|
||||
ERROR: .DB 0
|
||||
HA: .DB 0
|
||||
HNVZC: .DB 0
|
||||
N1: .DB 0
|
||||
N1H: .DB 0
|
||||
N1L: .DB 0
|
||||
N2: .DB 0
|
||||
N2L: .DB 0
|
||||
NF: .DB 0
|
||||
VF: .DB 0
|
||||
ZF: .DB 0
|
||||
N2H: .DB 0,0
|
||||
|
||||
*=$0400
|
||||
|
||||
TEST: LDY #1 ; initialize Y (used to loop through carry flag values)
|
||||
STY ERROR ; store 1 in ERROR until the test passes
|
||||
LDA #0 ; initialize N1 and N2
|
||||
STA N1
|
||||
STA N2
|
||||
LOOP1: LDA N2 ; N2L = N2 & $0F
|
||||
AND #$0F ; [1] see text
|
||||
STA N2L
|
||||
LDA N2 ; N2H = N2 & $F0
|
||||
AND #$F0 ; [2] see text
|
||||
STA N2H
|
||||
ORA #$0F ; N2H+1 = (N2 & $F0) + $0F
|
||||
STA N2H+1
|
||||
LOOP2: LDA N1 ; N1L = N1 & $0F
|
||||
AND #$0F ; [3] see text
|
||||
STA N1L
|
||||
LDA N1 ; N1H = N1 & $F0
|
||||
AND #$F0 ; [4] see text
|
||||
STA N1H
|
||||
JSR ADD
|
||||
JSR A6502
|
||||
JSR COMPARE
|
||||
BNE DONE
|
||||
JSR SUB
|
||||
JSR S6502
|
||||
JSR COMPARE
|
||||
BNE DONE
|
||||
INC N1 ; [5] see text
|
||||
BNE LOOP2 ; loop through all 256 values of N1
|
||||
INC N2 ; [6] see text
|
||||
BNE LOOP1 ; loop through all 256 values of N2
|
||||
DEY
|
||||
BPL LOOP1 ; loop through both values of the carry flag
|
||||
LDA #0 ; test passed, so store 0 in ERROR
|
||||
STA ERROR
|
||||
DONE: RTS
|
||||
BRK
|
||||
|
||||
; Calculate the actual decimal mode accumulator and flags, the accumulator
|
||||
; and flag results when N1 is added to N2 using binary arithmetic, the
|
||||
; predicted accumulator result, the predicted carry flag, and the predicted
|
||||
; V flag
|
||||
;
|
||||
ADD: SED ; decimal mode
|
||||
CPY #1 ; set carry if Y = 1, clear carry if Y = 0
|
||||
LDA N1
|
||||
ADC N2
|
||||
STA DA ; actual accumulator result in decimal mode
|
||||
PHP
|
||||
PLA
|
||||
STA DNVZC ; actual flags result in decimal mode
|
||||
CLD ; binary mode
|
||||
CPY #1 ; set carry if Y = 1, clear carry if Y = 0
|
||||
LDA N1
|
||||
ADC N2
|
||||
STA HA ; accumulator result of N1+N2 using binary arithmetic
|
||||
|
||||
PHP
|
||||
PLA
|
||||
STA HNVZC ; flags result of N1+N2 using binary arithmetic
|
||||
CPY #1
|
||||
LDA N1L
|
||||
ADC N2L
|
||||
CMP #$0A
|
||||
LDX #0
|
||||
BCC A1
|
||||
INX
|
||||
ADC #5 ; add 6 (carry is set)
|
||||
AND #$0F
|
||||
SEC
|
||||
A1: ORA N1H
|
||||
;
|
||||
; if N1L + N2L < $0A, then add N2 & $F0
|
||||
; if N1L + N2L >= $0A, then add (N2 & $F0) + $0F + 1 (carry is set)
|
||||
;
|
||||
ADC N2H,X
|
||||
PHP
|
||||
BCS A2
|
||||
CMP #$A0
|
||||
BCC A3
|
||||
A2: ADC #$5F ; add $60 (carry is set)
|
||||
SEC
|
||||
A3: STA AR ; predicted accumulator result
|
||||
PHP
|
||||
PLA
|
||||
STA CF ; predicted carry result
|
||||
PLA
|
||||
;
|
||||
; note that all 8 bits of the P register are stored in VF
|
||||
;
|
||||
STA VF ; predicted V flags
|
||||
RTS
|
||||
|
||||
; Calculate the actual decimal mode accumulator and flags, and the
|
||||
; accumulator and flag results when N2 is subtracted from N1 using binary
|
||||
; arithmetic
|
||||
;
|
||||
SUB: SED ; decimal mode
|
||||
CPY #1 ; set carry if Y = 1, clear carry if Y = 0
|
||||
LDA N1
|
||||
SBC N2
|
||||
STA DA ; actual accumulator result in decimal mode
|
||||
PHP
|
||||
PLA
|
||||
STA DNVZC ; actual flags result in decimal mode
|
||||
CLD ; binary mode
|
||||
CPY #1 ; set carry if Y = 1, clear carry if Y = 0
|
||||
LDA N1
|
||||
SBC N2
|
||||
STA HA ; accumulator result of N1-N2 using binary arithmetic
|
||||
|
||||
PHP
|
||||
PLA
|
||||
STA HNVZC ; flags result of N1-N2 using binary arithmetic
|
||||
RTS
|
||||
|
||||
; Calculate the predicted SBC accumulator result for the 6502 and 65816
|
||||
|
||||
;
|
||||
SUB1: CPY #1 ; set carry if Y = 1, clear carry if Y = 0
|
||||
LDA N1L
|
||||
SBC N2L
|
||||
LDX #0
|
||||
BCS S11
|
||||
INX
|
||||
SBC #5 ; subtract 6 (carry is clear)
|
||||
AND #$0F
|
||||
CLC
|
||||
S11: ORA N1H
|
||||
;
|
||||
; if N1L - N2L >= 0, then subtract N2 & $F0
|
||||
; if N1L - N2L < 0, then subtract (N2 & $F0) + $0F + 1 (carry is clear)
|
||||
;
|
||||
SBC N2H,X
|
||||
BCS S12
|
||||
SBC #$5F ; subtract $60 (carry is clear)
|
||||
S12: STA AR
|
||||
RTS
|
||||
|
||||
; Calculate the predicted SBC accumulator result for the 6502 and 65C02
|
||||
|
||||
;
|
||||
SUB2: CPY #1 ; set carry if Y = 1, clear carry if Y = 0
|
||||
LDA N1L
|
||||
SBC N2L
|
||||
LDX #0
|
||||
BCS S21
|
||||
INX
|
||||
AND #$0F
|
||||
CLC
|
||||
S21: ORA N1H
|
||||
;
|
||||
; if N1L - N2L >= 0, then subtract N2 & $F0
|
||||
; if N1L - N2L < 0, then subtract (N2 & $F0) + $0F + 1 (carry is clear)
|
||||
;
|
||||
SBC N2H,X
|
||||
BCS S22
|
||||
SBC #$5F ; subtract $60 (carry is clear)
|
||||
S22: CPX #0
|
||||
BEQ S23
|
||||
SBC #6
|
||||
S23: STA AR ; predicted accumulator result
|
||||
RTS
|
||||
|
||||
; Compare accumulator actual results to predicted results
|
||||
;
|
||||
; Return:
|
||||
; Z flag = 1 (BEQ branch) if same
|
||||
; Z flag = 0 (BNE branch) if different
|
||||
;
|
||||
COMPARE:
|
||||
LDA DA
|
||||
CMP AR
|
||||
BNE C1
|
||||
LDA DNVZC ; [7] see text
|
||||
EOR NF
|
||||
AND #$80 ; mask off N flag
|
||||
BNE C1
|
||||
LDA DNVZC ; [8] see text
|
||||
EOR VF
|
||||
AND #$40 ; mask off V flag
|
||||
BNE C1 ; [9] see text
|
||||
LDA DNVZC
|
||||
EOR ZF ; mask off Z flag
|
||||
AND #2
|
||||
BNE C1 ; [10] see text
|
||||
LDA DNVZC
|
||||
EOR CF
|
||||
AND #1 ; mask off C flag
|
||||
C1: RTS
|
||||
|
||||
; These routines store the predicted values for ADC and SBC for the 6502,
|
||||
; 65C02, and 65816 in AR, CF, NF, VF, and ZF
|
||||
|
||||
A6502: LDA VF
|
||||
;
|
||||
; since all 8 bits of the P register were stored in VF, bit 7 of VF contains
|
||||
; the N flag for NF
|
||||
;
|
||||
STA NF
|
||||
LDA HNVZC
|
||||
STA ZF
|
||||
RTS
|
||||
|
||||
S6502: JSR SUB1
|
||||
LDA HNVZC
|
||||
STA NF
|
||||
STA VF
|
||||
STA ZF
|
||||
STA CF
|
||||
RTS
|
||||
|
||||
A65C02: LDA AR
|
||||
PHP
|
||||
PLA
|
||||
STA NF
|
||||
STA ZF
|
||||
RTS
|
||||
|
||||
S65C02: JSR SUB2
|
||||
LDA AR
|
||||
PHP
|
||||
PLA
|
||||
STA NF
|
||||
STA ZF
|
||||
LDA HNVZC
|
||||
STA VF
|
||||
STA CF
|
||||
RTS
|
||||
|
||||
A65816: LDA AR
|
||||
PHP
|
||||
PLA
|
||||
STA NF
|
||||
STA ZF
|
||||
RTS
|
||||
|
||||
S65816: JSR SUB1
|
||||
LDA AR
|
||||
PHP
|
||||
PLA
|
||||
STA NF
|
||||
STA ZF
|
||||
LDA HNVZC
|
||||
STA VF
|
||||
STA CF
|
||||
RTS
|
||||
; Verify decimal mode behavior
|
||||
; Written by Bruce Clark. This code is public domain.
|
||||
;
|
||||
; Returns:
|
||||
; ERROR = 0 if the test passed
|
||||
; ERROR = 1 if the test failed
|
||||
;
|
||||
; This routine requires 17 bytes of RAM -- 1 byte each for:
|
||||
; AR, CF, DA, DNVZC, ERROR, HA, HNVZC, N1, N1H, N1L, N2, N2L, NF, VF, and ZF
|
||||
; and 2 bytes for N2H
|
||||
;
|
||||
; Variables:
|
||||
; N1 and N2 are the two numbers to be added or subtracted
|
||||
; N1H, N1L, N2H, and N2L are the upper 4 bits and lower 4 bits of N1 and N2
|
||||
; DA and DNVZC are the actual accumulator and flag results in decimal mode
|
||||
; HA and HNVZC are the accumulator and flag results when N1 and N2 are
|
||||
; added or subtracted using binary arithmetic
|
||||
; AR, NF, VF, ZF, and CF are the predicted decimal mode accumulator and
|
||||
; flag results, calculated using binary arithmetic
|
||||
;
|
||||
; This program takes approximately 1 minute at 1 MHz (a few seconds more on
|
||||
; a 65C02 than a 6502 or 65816)
|
||||
;
|
||||
*=$0300
|
||||
|
||||
AR: .DB 0
|
||||
CF: .DB 0
|
||||
DA: .DB 0
|
||||
DNVZC: .DB 0
|
||||
ERROR: .DB 0
|
||||
HA: .DB 0
|
||||
HNVZC: .DB 0
|
||||
N1: .DB 0
|
||||
N1H: .DB 0
|
||||
N1L: .DB 0
|
||||
N2: .DB 0
|
||||
N2L: .DB 0
|
||||
NF: .DB 0
|
||||
VF: .DB 0
|
||||
ZF: .DB 0
|
||||
N2H: .DB 0,0
|
||||
|
||||
*=$0400
|
||||
|
||||
TEST: LDY #1 ; initialize Y (used to loop through carry flag values)
|
||||
STY ERROR ; store 1 in ERROR until the test passes
|
||||
LDA #0 ; initialize N1 and N2
|
||||
STA N1
|
||||
STA N2
|
||||
LOOP1: LDA N2 ; N2L = N2 & $0F
|
||||
AND #$0F ; [1] see text
|
||||
STA N2L
|
||||
LDA N2 ; N2H = N2 & $F0
|
||||
AND #$F0 ; [2] see text
|
||||
STA N2H
|
||||
ORA #$0F ; N2H+1 = (N2 & $F0) + $0F
|
||||
STA N2H+1
|
||||
LOOP2: LDA N1 ; N1L = N1 & $0F
|
||||
AND #$0F ; [3] see text
|
||||
STA N1L
|
||||
LDA N1 ; N1H = N1 & $F0
|
||||
AND #$F0 ; [4] see text
|
||||
STA N1H
|
||||
JSR ADD
|
||||
JSR A6502
|
||||
JSR COMPARE
|
||||
BNE DONE
|
||||
JSR SUB
|
||||
JSR S6502
|
||||
JSR COMPARE
|
||||
BNE DONE
|
||||
INC N1 ; [5] see text
|
||||
BNE LOOP2 ; loop through all 256 values of N1
|
||||
INC N2 ; [6] see text
|
||||
BNE LOOP1 ; loop through all 256 values of N2
|
||||
DEY
|
||||
BPL LOOP1 ; loop through both values of the carry flag
|
||||
LDA #0 ; test passed, so store 0 in ERROR
|
||||
STA ERROR
|
||||
DONE: RTS
|
||||
BRK
|
||||
|
||||
; Calculate the actual decimal mode accumulator and flags, the accumulator
|
||||
; and flag results when N1 is added to N2 using binary arithmetic, the
|
||||
; predicted accumulator result, the predicted carry flag, and the predicted
|
||||
; V flag
|
||||
;
|
||||
ADD: SED ; decimal mode
|
||||
CPY #1 ; set carry if Y = 1, clear carry if Y = 0
|
||||
LDA N1
|
||||
ADC N2
|
||||
STA DA ; actual accumulator result in decimal mode
|
||||
PHP
|
||||
PLA
|
||||
STA DNVZC ; actual flags result in decimal mode
|
||||
CLD ; binary mode
|
||||
CPY #1 ; set carry if Y = 1, clear carry if Y = 0
|
||||
LDA N1
|
||||
ADC N2
|
||||
STA HA ; accumulator result of N1+N2 using binary arithmetic
|
||||
|
||||
PHP
|
||||
PLA
|
||||
STA HNVZC ; flags result of N1+N2 using binary arithmetic
|
||||
CPY #1
|
||||
LDA N1L
|
||||
ADC N2L
|
||||
CMP #$0A
|
||||
LDX #0
|
||||
BCC A1
|
||||
INX
|
||||
ADC #5 ; add 6 (carry is set)
|
||||
AND #$0F
|
||||
SEC
|
||||
A1: ORA N1H
|
||||
;
|
||||
; if N1L + N2L < $0A, then add N2 & $F0
|
||||
; if N1L + N2L >= $0A, then add (N2 & $F0) + $0F + 1 (carry is set)
|
||||
;
|
||||
ADC N2H,X
|
||||
PHP
|
||||
BCS A2
|
||||
CMP #$A0
|
||||
BCC A3
|
||||
A2: ADC #$5F ; add $60 (carry is set)
|
||||
SEC
|
||||
A3: STA AR ; predicted accumulator result
|
||||
PHP
|
||||
PLA
|
||||
STA CF ; predicted carry result
|
||||
PLA
|
||||
;
|
||||
; note that all 8 bits of the P register are stored in VF
|
||||
;
|
||||
STA VF ; predicted V flags
|
||||
RTS
|
||||
|
||||
; Calculate the actual decimal mode accumulator and flags, and the
|
||||
; accumulator and flag results when N2 is subtracted from N1 using binary
|
||||
; arithmetic
|
||||
;
|
||||
SUB: SED ; decimal mode
|
||||
CPY #1 ; set carry if Y = 1, clear carry if Y = 0
|
||||
LDA N1
|
||||
SBC N2
|
||||
STA DA ; actual accumulator result in decimal mode
|
||||
PHP
|
||||
PLA
|
||||
STA DNVZC ; actual flags result in decimal mode
|
||||
CLD ; binary mode
|
||||
CPY #1 ; set carry if Y = 1, clear carry if Y = 0
|
||||
LDA N1
|
||||
SBC N2
|
||||
STA HA ; accumulator result of N1-N2 using binary arithmetic
|
||||
|
||||
PHP
|
||||
PLA
|
||||
STA HNVZC ; flags result of N1-N2 using binary arithmetic
|
||||
RTS
|
||||
|
||||
; Calculate the predicted SBC accumulator result for the 6502 and 65816
|
||||
|
||||
;
|
||||
SUB1: CPY #1 ; set carry if Y = 1, clear carry if Y = 0
|
||||
LDA N1L
|
||||
SBC N2L
|
||||
LDX #0
|
||||
BCS S11
|
||||
INX
|
||||
SBC #5 ; subtract 6 (carry is clear)
|
||||
AND #$0F
|
||||
CLC
|
||||
S11: ORA N1H
|
||||
;
|
||||
; if N1L - N2L >= 0, then subtract N2 & $F0
|
||||
; if N1L - N2L < 0, then subtract (N2 & $F0) + $0F + 1 (carry is clear)
|
||||
;
|
||||
SBC N2H,X
|
||||
BCS S12
|
||||
SBC #$5F ; subtract $60 (carry is clear)
|
||||
S12: STA AR
|
||||
RTS
|
||||
|
||||
; Calculate the predicted SBC accumulator result for the 6502 and 65C02
|
||||
|
||||
;
|
||||
SUB2: CPY #1 ; set carry if Y = 1, clear carry if Y = 0
|
||||
LDA N1L
|
||||
SBC N2L
|
||||
LDX #0
|
||||
BCS S21
|
||||
INX
|
||||
AND #$0F
|
||||
CLC
|
||||
S21: ORA N1H
|
||||
;
|
||||
; if N1L - N2L >= 0, then subtract N2 & $F0
|
||||
; if N1L - N2L < 0, then subtract (N2 & $F0) + $0F + 1 (carry is clear)
|
||||
;
|
||||
SBC N2H,X
|
||||
BCS S22
|
||||
SBC #$5F ; subtract $60 (carry is clear)
|
||||
S22: CPX #0
|
||||
BEQ S23
|
||||
SBC #6
|
||||
S23: STA AR ; predicted accumulator result
|
||||
RTS
|
||||
|
||||
; Compare accumulator actual results to predicted results
|
||||
;
|
||||
; Return:
|
||||
; Z flag = 1 (BEQ branch) if same
|
||||
; Z flag = 0 (BNE branch) if different
|
||||
;
|
||||
COMPARE:
|
||||
LDA DA
|
||||
CMP AR
|
||||
BNE C1
|
||||
LDA DNVZC ; [7] see text
|
||||
EOR NF
|
||||
AND #$80 ; mask off N flag
|
||||
BNE C1
|
||||
LDA DNVZC ; [8] see text
|
||||
EOR VF
|
||||
AND #$40 ; mask off V flag
|
||||
BNE C1 ; [9] see text
|
||||
LDA DNVZC
|
||||
EOR ZF ; mask off Z flag
|
||||
AND #2
|
||||
BNE C1 ; [10] see text
|
||||
LDA DNVZC
|
||||
EOR CF
|
||||
AND #1 ; mask off C flag
|
||||
C1: RTS
|
||||
|
||||
; These routines store the predicted values for ADC and SBC for the 6502,
|
||||
; 65C02, and 65816 in AR, CF, NF, VF, and ZF
|
||||
|
||||
A6502: LDA VF
|
||||
;
|
||||
; since all 8 bits of the P register were stored in VF, bit 7 of VF contains
|
||||
; the N flag for NF
|
||||
;
|
||||
STA NF
|
||||
LDA HNVZC
|
||||
STA ZF
|
||||
RTS
|
||||
|
||||
S6502: JSR SUB1
|
||||
LDA HNVZC
|
||||
STA NF
|
||||
STA VF
|
||||
STA ZF
|
||||
STA CF
|
||||
RTS
|
||||
|
||||
A65C02: LDA AR
|
||||
PHP
|
||||
PLA
|
||||
STA NF
|
||||
STA ZF
|
||||
RTS
|
||||
|
||||
S65C02: JSR SUB2
|
||||
LDA AR
|
||||
PHP
|
||||
PLA
|
||||
STA NF
|
||||
STA ZF
|
||||
LDA HNVZC
|
||||
STA VF
|
||||
STA CF
|
||||
RTS
|
||||
|
||||
A65816: LDA AR
|
||||
PHP
|
||||
PLA
|
||||
STA NF
|
||||
STA ZF
|
||||
RTS
|
||||
|
||||
S65816: JSR SUB1
|
||||
LDA AR
|
||||
PHP
|
||||
PLA
|
||||
STA NF
|
||||
STA ZF
|
||||
LDA HNVZC
|
||||
STA VF
|
||||
STA CF
|
||||
RTS
|
||||
|
|
|
|||
1522
VMachine.cpp
1522
VMachine.cpp
File diff suppressed because it is too large
Load Diff
149
VMachine.h
149
VMachine.h
|
|
@ -1,65 +1,84 @@
|
|||
#ifndef VMACHINE_H
|
||||
#define VMACHINE_H
|
||||
|
||||
#include <string>
|
||||
#include "MKCpu.h"
|
||||
#include "Memory.h"
|
||||
#include "Display.h"
|
||||
|
||||
#define WINDOWS 1
|
||||
#if defined (WINDOWS)
|
||||
#include <windows.h>
|
||||
#endif
|
||||
#define IOREFRESH 32
|
||||
|
||||
using namespace std;
|
||||
|
||||
namespace MKBasic {
|
||||
|
||||
class VMachine
|
||||
{
|
||||
public:
|
||||
VMachine();
|
||||
VMachine(string romfname, string ramfname);
|
||||
~VMachine();
|
||||
|
||||
void InitVM();
|
||||
Regs *Run();
|
||||
Regs *Run(unsigned short addr);
|
||||
Regs *Exec();
|
||||
Regs *Exec(unsigned short addr);
|
||||
Regs *Step();
|
||||
Regs *Step(unsigned short addr);
|
||||
void LoadROM(string romfname);
|
||||
void LoadRAM(string ramfname);
|
||||
unsigned short MemPeek8bit(unsigned short addr);
|
||||
void MemPoke8bit(unsigned short addr, unsigned char v);
|
||||
Regs *GetRegs();
|
||||
void SetCharIO(unsigned short addr, bool echo);
|
||||
void DisableCharIO();
|
||||
unsigned short GetCharIOAddr();
|
||||
bool GetCharIOActive();
|
||||
void ShowIO();
|
||||
void ClearScreen();
|
||||
void ScrHome();
|
||||
|
||||
protected:
|
||||
|
||||
private:
|
||||
|
||||
MKCpu *mpCPU;
|
||||
Memory *mpROM;
|
||||
Memory *mpRAM;
|
||||
Display *mpDisp;
|
||||
unsigned short mRunAddr;
|
||||
unsigned short mCharIOAddr;
|
||||
bool mCharIOActive;
|
||||
bool mCharIO;
|
||||
|
||||
void LoadMEM(string memfname, Memory *pmem);
|
||||
void ShowDisp();
|
||||
};
|
||||
|
||||
} // namespace MKBasic
|
||||
|
||||
#endif
|
||||
#ifndef VMACHINE_H
|
||||
#define VMACHINE_H
|
||||
|
||||
#include <string>
|
||||
#include <queue>
|
||||
#include "system.h"
|
||||
#include "MKCpu.h"
|
||||
#include "Memory.h"
|
||||
#include "Display.h"
|
||||
|
||||
//#define WINDOWS 1
|
||||
#if defined (WINDOWS)
|
||||
#include <windows.h>
|
||||
#endif
|
||||
|
||||
#define IOREFRESH 32
|
||||
#define OPINTERRUPT 25 // operator interrupt code (CTRL-Y)
|
||||
|
||||
using namespace std;
|
||||
|
||||
namespace MKBasic {
|
||||
|
||||
class VMachine
|
||||
{
|
||||
public:
|
||||
VMachine();
|
||||
VMachine(string romfname, string ramfname);
|
||||
~VMachine();
|
||||
|
||||
void InitVM();
|
||||
Regs *Run();
|
||||
Regs *Run(unsigned short addr);
|
||||
Regs *Exec();
|
||||
Regs *Exec(unsigned short addr);
|
||||
Regs *Step();
|
||||
Regs *Step(unsigned short addr);
|
||||
void LoadROM(string romfname);
|
||||
void LoadRAM(string ramfname);
|
||||
void LoadRAMBin(string ramfname);
|
||||
unsigned short MemPeek8bit(unsigned short addr);
|
||||
void MemPoke8bit(unsigned short addr, unsigned char v);
|
||||
Regs *GetRegs();
|
||||
void SetCharIO(unsigned short addr, bool echo);
|
||||
void DisableCharIO();
|
||||
unsigned short GetCharIOAddr();
|
||||
bool GetCharIOActive();
|
||||
void ShowIO();
|
||||
void ClearScreen();
|
||||
void ScrHome();
|
||||
bool IsAutoExec();
|
||||
void EnableROM();
|
||||
void DisableROM();
|
||||
void SetROM(unsigned short start, unsigned short end);
|
||||
void EnableROM(unsigned short start, unsigned short end);
|
||||
unsigned short GetROMBegin();
|
||||
unsigned short GetROMEnd();
|
||||
bool IsROMEnabled();
|
||||
unsigned short GetRunAddr();
|
||||
void SetOpInterrupt();
|
||||
queue<string> GetExecHistory();
|
||||
unsigned short Disassemble(unsigned short addr, char *buf);
|
||||
|
||||
protected:
|
||||
|
||||
private:
|
||||
|
||||
MKCpu *mpCPU;
|
||||
Memory *mpROM;
|
||||
Memory *mpRAM;
|
||||
Display *mpDisp;
|
||||
unsigned short mRunAddr;
|
||||
unsigned short mCharIOAddr;
|
||||
bool mCharIOActive;
|
||||
bool mCharIO;
|
||||
bool mOpInterrupt; // operator interrupt from console
|
||||
bool mAutoExec;
|
||||
|
||||
void LoadMEM(string memfname, Memory *pmem);
|
||||
void ShowDisp();
|
||||
};
|
||||
|
||||
} // namespace MKBasic
|
||||
|
||||
#endif
|
||||
|
|
|
|||
112
bcd.c
112
bcd.c
|
|
@ -1,56 +1,56 @@
|
|||
|
||||
#include <stdlib.h>
|
||||
#include <stdio.h>
|
||||
#include <string.h>
|
||||
|
||||
|
||||
unsigned char conv2bcd(unsigned short v)
|
||||
{
|
||||
unsigned char arg8 = 0;
|
||||
arg8 = (unsigned char)((v/10) << 4);
|
||||
arg8 |= ((unsigned char)(v - (v/10)*10)) & 0x0F;
|
||||
return arg8;
|
||||
}
|
||||
|
||||
char *conv24bitbin(unsigned char v)
|
||||
{
|
||||
static char retbuf[5];
|
||||
int i=3;
|
||||
|
||||
memset(retbuf, '0', 4);
|
||||
retbuf[4]=0;
|
||||
if (v == 0) return retbuf;
|
||||
while (v > 0 && i >= 0) {
|
||||
int r = v % 2;
|
||||
retbuf[i] = ((r==0) ? '0' : '1');
|
||||
v = v/2;
|
||||
i--;
|
||||
}
|
||||
|
||||
return retbuf;
|
||||
}
|
||||
|
||||
/* run this program using the console pauser or add your own getch, system("pause") or input loop */
|
||||
|
||||
int main(int argc, char *argv[])
|
||||
{
|
||||
unsigned short v = 0;
|
||||
|
||||
for (v = 0; v < 100; v++) {
|
||||
unsigned char cv = conv2bcd(v), hinyb, lonyb;
|
||||
hinyb = (cv & 0xF0) >> 4;
|
||||
lonyb = cv & 0x0F;
|
||||
char buf_hinyb[5], buf_lonyb[5];
|
||||
strcpy(buf_hinyb, conv24bitbin(hinyb));
|
||||
strcpy(buf_lonyb, conv24bitbin(lonyb));
|
||||
printf("%d (dec) \t= %4s(%d) %4s(%d) (BCD, dec:%d)\n", v,
|
||||
buf_hinyb,
|
||||
hinyb,
|
||||
buf_lonyb,
|
||||
lonyb,
|
||||
cv);
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
#include <stdlib.h>
|
||||
#include <stdio.h>
|
||||
#include <string.h>
|
||||
|
||||
|
||||
unsigned char conv2bcd(unsigned short v)
|
||||
{
|
||||
unsigned char arg8 = 0;
|
||||
arg8 = (unsigned char)((v/10) << 4);
|
||||
arg8 |= ((unsigned char)(v - (v/10)*10)) & 0x0F;
|
||||
return arg8;
|
||||
}
|
||||
|
||||
char *conv24bitbin(unsigned char v)
|
||||
{
|
||||
static char retbuf[5];
|
||||
int i=3;
|
||||
|
||||
memset(retbuf, '0', 4);
|
||||
retbuf[4]=0;
|
||||
if (v == 0) return retbuf;
|
||||
while (v > 0 && i >= 0) {
|
||||
int r = v % 2;
|
||||
retbuf[i] = ((r==0) ? '0' : '1');
|
||||
v = v/2;
|
||||
i--;
|
||||
}
|
||||
|
||||
return retbuf;
|
||||
}
|
||||
|
||||
/* run this program using the console pauser or add your own getch, system("pause") or input loop */
|
||||
|
||||
int main(int argc, char *argv[])
|
||||
{
|
||||
unsigned short v = 0;
|
||||
|
||||
for (v = 0; v < 100; v++) {
|
||||
unsigned char cv = conv2bcd(v), hinyb, lonyb;
|
||||
hinyb = (cv & 0xF0) >> 4;
|
||||
lonyb = cv & 0x0F;
|
||||
char buf_hinyb[5], buf_lonyb[5];
|
||||
strcpy(buf_hinyb, conv24bitbin(hinyb));
|
||||
strcpy(buf_lonyb, conv24bitbin(lonyb));
|
||||
printf("%d (dec) \t= %4s(%d) %4s(%d) (BCD, dec:%d)\n", v,
|
||||
buf_hinyb,
|
||||
hinyb,
|
||||
buf_lonyb,
|
||||
lonyb,
|
||||
cv);
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -0,0 +1,187 @@
|
|||
/*
|
||||
*----------------------------------------------------------------------------
|
||||
* File: bin2hex.c
|
||||
*
|
||||
* Author: Marek Karcz
|
||||
*
|
||||
* Date created: 3/8/2016
|
||||
*
|
||||
* Purpose: Convert binary file to memory image definition (plain text) file.
|
||||
*----------------------------------------------------------------------------
|
||||
*/
|
||||
|
||||
#include <stdio.h>
|
||||
#include <stdlib.h>
|
||||
#include <string.h>
|
||||
#include <time.h>
|
||||
|
||||
const int DEBUG = 0;
|
||||
const char *hdr1 = "; Created with BIN2HEX (C) Marek Karcz 2016. All rights reserved.\n";
|
||||
|
||||
char g_szInputFileName[256] = {0};
|
||||
char g_szHexFileName[256] = {0};
|
||||
int g_nStartAddr = 2048; /* $0800 */
|
||||
int g_nExecAddr = 2048; /* $0800 */
|
||||
int g_nSuppressAutoExec = 1;
|
||||
int g_nSuppressAllZeroRows = 0;
|
||||
|
||||
void ScanArgs(int argc, char *argv[]);
|
||||
void ConvertFile(void);
|
||||
|
||||
void Usage(char *prgn)
|
||||
{
|
||||
printf("\nProgram: %s\n Convert binary file to memory image definition for MKBASIC (VM65) emulator.\n\n", prgn);
|
||||
printf("Copyright: Marek Karcz 2016. All rights reserved.\n");
|
||||
printf("Free for personal and educational use.\n\n");
|
||||
printf("Usage:\n\n");
|
||||
printf(" %s -f input_fname -o output_fname [-w load_addr] [-x exec_addr] [-s] [-z]\n\n", prgn);
|
||||
printf("Where:\n\n");
|
||||
printf(" input_fname - binary file name\n");
|
||||
printf(" output_fname - output file name\n");
|
||||
printf(" load_addr - starting address to load data (default: %d)\n", g_nStartAddr);
|
||||
printf(" exec_addr - address to auto-execute code from (default: %d)\n", g_nExecAddr);
|
||||
printf(" -s - suppress auto-execute statement in output\n");
|
||||
printf(" -z - suppress data blocks with 0-s only\n");
|
||||
printf("\n");
|
||||
}
|
||||
|
||||
/*
|
||||
* bin2hex -f InputFile -o OutputFile -w StartAddr
|
||||
*/
|
||||
void ScanArgs(int argc, char *argv[])
|
||||
{
|
||||
int n = 1;
|
||||
|
||||
while (n < argc)
|
||||
{
|
||||
if (strcmp(argv[n], "-f") == 0)
|
||||
{
|
||||
n++;
|
||||
strcpy(g_szInputFileName,argv[n]);
|
||||
}
|
||||
else if (strcmp(argv[n],"-o") == 0)
|
||||
{
|
||||
n++;
|
||||
strcpy(g_szHexFileName,argv[n]);
|
||||
}
|
||||
else if (strcmp(argv[n],"-w") == 0)
|
||||
{
|
||||
n++;
|
||||
g_nStartAddr = atoi(argv[n]);
|
||||
g_nExecAddr = g_nStartAddr;
|
||||
g_nSuppressAutoExec = 0;
|
||||
}
|
||||
else if (strcmp(argv[n],"-x") == 0)
|
||||
{
|
||||
n++;
|
||||
g_nExecAddr = atoi(argv[n]);
|
||||
g_nSuppressAutoExec = 0;
|
||||
}
|
||||
else if (strcmp(argv[n],"-s") == 0)
|
||||
{
|
||||
g_nSuppressAutoExec = 1;
|
||||
}
|
||||
else if (strcmp(argv[n],"-z") == 0)
|
||||
{
|
||||
g_nSuppressAllZeroRows = 1;
|
||||
}
|
||||
|
||||
n++;
|
||||
}
|
||||
}
|
||||
|
||||
void ConvertFile(void)
|
||||
{
|
||||
FILE *fpi = NULL;
|
||||
FILE *fpo = NULL;
|
||||
unsigned char bt[17];
|
||||
char hex[80];
|
||||
int i, addr, allzero, prev_allzero;
|
||||
|
||||
addr = g_nStartAddr;
|
||||
printf("Processing...\n");
|
||||
printf("Start address: $%04x\n", addr);
|
||||
if (NULL != (fpi = fopen(g_szInputFileName,"rb")))
|
||||
{
|
||||
if (NULL != (fpo = fopen(g_szHexFileName,"w")))
|
||||
{
|
||||
time_t t = time(NULL);
|
||||
struct tm *tm = localtime(&t);
|
||||
char s[64] = {0};
|
||||
strftime(s, sizeof(s), "; %c\n", tm);
|
||||
|
||||
fputs(hdr1, fpo);
|
||||
fputs(s, fpo);
|
||||
sprintf(hex, "ADDR\n$%04x\nORG\n$%04x\n", g_nExecAddr, addr);
|
||||
if (DEBUG) printf("Adding line:\n%s\n", hex);
|
||||
fputs(hex,fpo);
|
||||
prev_allzero = 1;
|
||||
while(0 == feof(fpi) && addr <= 0xFFFF)
|
||||
{
|
||||
memset(bt, 0, 17);
|
||||
memset(hex, 0, 80);
|
||||
if (DEBUG) printf("Reading input file...");
|
||||
fread(bt, sizeof(char), 16, fpi);
|
||||
if (DEBUG) printf("done.\n");
|
||||
if (DEBUG) printf("Preparing hex string...\n");
|
||||
allzero = 1;
|
||||
for(i=0; i<16; i++)
|
||||
{
|
||||
if (DEBUG) printf("Code: %d\n", bt[i]);
|
||||
if (*hex == 0) sprintf(hex, "$%02x", bt[i]);
|
||||
else sprintf(hex, "%s $%02x", hex, bt[i]);
|
||||
if (allzero && bt[i] > 0)
|
||||
allzero = 0;
|
||||
}
|
||||
if (g_nSuppressAllZeroRows && prev_allzero && 0 == allzero) {
|
||||
char buff[20];
|
||||
sprintf (buff, "ORG\n$%04x\n", addr);
|
||||
fputs(buff, fpo);
|
||||
}
|
||||
if (0 == g_nSuppressAllZeroRows
|
||||
||
|
||||
(g_nSuppressAllZeroRows && 0 == allzero)
|
||||
)
|
||||
{
|
||||
sprintf(hex, "%s\n", hex);
|
||||
if (DEBUG) printf("Adding line: %s", hex);
|
||||
fputs(hex, fpo);
|
||||
}
|
||||
addr += 16;
|
||||
prev_allzero = allzero;
|
||||
}
|
||||
if (0 == g_nSuppressAutoExec)
|
||||
{
|
||||
memset(hex, 80, sizeof(char));
|
||||
sprintf(hex, "EXEC\n$%04x\n", g_nExecAddr);
|
||||
if (DEBUG) printf("Adding line: %s", hex);
|
||||
fputs(hex, fpo);
|
||||
}
|
||||
fclose(fpi);
|
||||
fclose(fpo);
|
||||
printf("Done.\n");
|
||||
printf("End address: $%04x\n", (addr <= 0xFFFF) ? addr : 0xFFFF);
|
||||
printf("Run address: $%04x\n", g_nExecAddr);
|
||||
}
|
||||
else
|
||||
printf("ERROR: Unable to create output file.\n");
|
||||
}
|
||||
else
|
||||
printf("ERROR: Unable to open input file.\n");
|
||||
}
|
||||
|
||||
int main(int argc, char *argv[])
|
||||
{
|
||||
if (argc == 1)
|
||||
Usage(argv[0]);
|
||||
else {
|
||||
ScanArgs(argc, argv);
|
||||
if (*g_szInputFileName == 0 || *g_szHexFileName == 0)
|
||||
Usage(argv[0]);
|
||||
else
|
||||
ConvertFile();
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
628
dummy.ram
628
dummy.ram
|
|
@ -1,315 +1,315 @@
|
|||
;
|
||||
; test program #1
|
||||
; address: $0200
|
||||
; load Acc with value 12
|
||||
; write Acc to address $c000 (49152)
|
||||
;
|
||||
; nop
|
||||
; nop
|
||||
; lda #$0c
|
||||
; sta $c000
|
||||
; brk
|
||||
;
|
||||
$EA $EA $A9 $0c $8D $00 $c0 $00 $00
|
||||
;
|
||||
; test program #2
|
||||
; address: $0400
|
||||
; copy 0-terminated string from
|
||||
; address $d000 to $0200
|
||||
; "Hello World!"
|
||||
;
|
||||
; ORG=$0400
|
||||
; hello:
|
||||
; ldx #0
|
||||
; loop:
|
||||
; lda $d000,x
|
||||
; beq $06 ;branch to end (+6) if A=0
|
||||
; sta $0200,x
|
||||
; inx
|
||||
; bne $f5 ; branch to loop (-11) if X<>0
|
||||
; end:
|
||||
; brk
|
||||
ORG
|
||||
$0400
|
||||
$A2 $00
|
||||
$BD $00 $d0
|
||||
$F0 $06
|
||||
$9D $00 $02
|
||||
$E8
|
||||
$D0 $F5
|
||||
$00 $00
|
||||
; data
|
||||
; address: $d000
|
||||
ORG
|
||||
$D000
|
||||
;DEC: 53248
|
||||
; "Hello World!"
|
||||
72 101 108 108 111 32 87 111 114 108 100 33 0
|
||||
;
|
||||
; test program #3 - copy Hello World! string to $0300
|
||||
; using different assembly instructions
|
||||
; address: $0500
|
||||
;
|
||||
; ORG=$0500 ;dec: 1280
|
||||
; hello:
|
||||
; lda #0
|
||||
; sta $05
|
||||
; ldx $05
|
||||
; loop:
|
||||
; lda $d000,x
|
||||
; sta $0300,x
|
||||
; beq end ;(+6)
|
||||
; inx
|
||||
; beq end ;(+3)
|
||||
; jmp loop
|
||||
; end:
|
||||
; brk
|
||||
ORG
|
||||
$0500
|
||||
;DEC: 1280
|
||||
$A9 $00
|
||||
$85 $05
|
||||
$A6 $05
|
||||
$BD $00 $d0
|
||||
$9D $00 $03
|
||||
$F0 $06
|
||||
$E8
|
||||
$F0 $03
|
||||
$4C $06 $05
|
||||
$00 $00
|
||||
;
|
||||
; test program #4
|
||||
; left-shift memory location $05 at zero page,
|
||||
; then location $06 using zero page indexed addressing,
|
||||
; then memory location $c001 (outside zero page) using absolute addressing
|
||||
; then location $c002 using indexed absolute addressing
|
||||
; and finally left-shift Acc.
|
||||
; stop after each step for debugging
|
||||
; exit loop when Acc=0
|
||||
;
|
||||
; start:
|
||||
; lda #$ff
|
||||
; ldx #$01
|
||||
; sta $05
|
||||
; sta $05,x
|
||||
; sta $c000,x
|
||||
; inx
|
||||
; sta $c000,x
|
||||
; ldx #$01
|
||||
; loop2:
|
||||
; brk
|
||||
; asl $05
|
||||
; asl $05,x
|
||||
; asl $c001
|
||||
; asl $c001,x
|
||||
; asl
|
||||
; bne loop2 ;(-15 or $f1)
|
||||
; brk
|
||||
ORG
|
||||
$0600
|
||||
$A9 $FF
|
||||
$A2 $01
|
||||
$85 $05
|
||||
$95 $05
|
||||
$9D $00 $C0
|
||||
$E8
|
||||
$9D $00 $C0
|
||||
$A2 $01
|
||||
$00 $00
|
||||
$06 $05
|
||||
$16 $05
|
||||
$0E $01 $C0
|
||||
$1E $01 $C0
|
||||
$0A
|
||||
$D0 $F1
|
||||
$00 $00
|
||||
;
|
||||
; test program #5
|
||||
; Test ORA opcode with various arguments and addressing modes.
|
||||
; At each break, the contents of Acc should equal $AA.
|
||||
;
|
||||
; start:
|
||||
; lda #$aa ;%10101010
|
||||
; sta $05
|
||||
; sta $aa
|
||||
; lda #$00
|
||||
; tax
|
||||
; ora ($05,x)
|
||||
; brk
|
||||
; lda #$00
|
||||
; ora $05
|
||||
; brk
|
||||
; lda #$00
|
||||
; ora #$aa
|
||||
; brk
|
||||
; lda #$00
|
||||
; ora $0005
|
||||
; brk
|
||||
; lda #$05
|
||||
; sta $06
|
||||
; lda #$00
|
||||
; sta $07
|
||||
; tay
|
||||
; ora ($06),y
|
||||
; brk
|
||||
; lda #$00
|
||||
; tax
|
||||
; ora $05,x
|
||||
; brk
|
||||
; lda #$00
|
||||
; tay
|
||||
; ora $0005,y
|
||||
; brk
|
||||
; lda #$00
|
||||
; tax
|
||||
; ora $0005,x
|
||||
; brk
|
||||
ORG
|
||||
$0700
|
||||
$A9 $AA
|
||||
$85 $05
|
||||
$85 $AA
|
||||
$A9 $00
|
||||
$AA
|
||||
$01 $05
|
||||
$00 $00
|
||||
$A9 $00
|
||||
$05 $05
|
||||
$00 $00
|
||||
$A9 $00
|
||||
$09 $AA
|
||||
$00 $00
|
||||
$A9 $00
|
||||
$0D $05 $00
|
||||
$00 $00
|
||||
$A9 $05
|
||||
$85 $06
|
||||
$A9 $00
|
||||
$85 $07
|
||||
$A8
|
||||
$11 $06
|
||||
$00 $00
|
||||
$A9 $00
|
||||
$AA
|
||||
$15 $05
|
||||
$00 $00
|
||||
$A9 $00
|
||||
$A8
|
||||
$19 $05 $00
|
||||
$00 $00
|
||||
$A9 $00
|
||||
$AA
|
||||
$1D $05 $00
|
||||
$00 $00
|
||||
;
|
||||
; test program #6
|
||||
; Test JSR opcode.
|
||||
; After each break examine memory at $c000 and $c001.
|
||||
; After 1-st break, $c000 should equal $dd.
|
||||
; Return address-1 ($0802) should be on stack.
|
||||
; After 2-nd break, PC counter should be at $0805.
|
||||
; After 3-rd break, $c000 should equal $ee.
|
||||
; Return address-1 ($0807) should be on stack.
|
||||
; After 4-th break, PC counter should be at $080a.
|
||||
;
|
||||
; start:
|
||||
; jsr sub1
|
||||
; brk
|
||||
; jsr sub2
|
||||
; brk
|
||||
; brk
|
||||
; brk
|
||||
; sub1:
|
||||
; lda #$dd
|
||||
; sta $c000
|
||||
; brk
|
||||
; rts
|
||||
; sub2:
|
||||
; lda #$ee
|
||||
; sta $c000
|
||||
; brk
|
||||
; rts
|
||||
;
|
||||
ORG
|
||||
$0800
|
||||
$20 $0B $08
|
||||
$00 $00
|
||||
$20 $13 $08
|
||||
$00
|
||||
$00
|
||||
$00
|
||||
$A9 $DD
|
||||
$8D $00 $C0
|
||||
$00 $00
|
||||
$60
|
||||
$A9 $EE
|
||||
$8D $00 $C0
|
||||
$00 $00
|
||||
$60
|
||||
;
|
||||
; test program #7
|
||||
; Test ADC opcode.
|
||||
; Expected results:
|
||||
; First break: Acc=$01, Carry=1
|
||||
; 2-nd break: Acc=$02, Carry=1
|
||||
; 3-rd break: Acc=$22, Carry=0
|
||||
; 4-th break: Acc=$23, Carry=0
|
||||
;
|
||||
; start:
|
||||
; clc
|
||||
; lda #$ff
|
||||
; adc #$02
|
||||
; brk
|
||||
; sec
|
||||
; lda #$ff
|
||||
; adc #$02
|
||||
; brk
|
||||
; clc
|
||||
; lda #$20
|
||||
; adc #$02
|
||||
; brk
|
||||
; sec
|
||||
; lda #$20
|
||||
; adc #$02
|
||||
; brk
|
||||
;
|
||||
ORG
|
||||
$0900
|
||||
$18
|
||||
$A9 $FF
|
||||
$69 $02
|
||||
$00 $00
|
||||
$38
|
||||
$A9 $FF
|
||||
$69 $02
|
||||
$00 $00
|
||||
$18
|
||||
$A9 $20
|
||||
$69 $02
|
||||
$00 $00
|
||||
$38
|
||||
$A9 $20
|
||||
$69 $02
|
||||
$00 $00
|
||||
;
|
||||
; test program #8
|
||||
; Test ROR opcode.
|
||||
;
|
||||
; start:
|
||||
; sec
|
||||
; lda #$00
|
||||
; loop:
|
||||
; ror
|
||||
; brk
|
||||
; bcc loop ;(-5 -> $FB)
|
||||
; brk
|
||||
;
|
||||
ORG
|
||||
$0920
|
||||
$38
|
||||
$A9 $00
|
||||
$6A
|
||||
$00 $00
|
||||
$90 $FB
|
||||
$00 $00
|
||||
;
|
||||
; test program #1
|
||||
; address: $0200
|
||||
; load Acc with value 12
|
||||
; write Acc to address $c000 (49152)
|
||||
;
|
||||
; nop
|
||||
; nop
|
||||
; lda #$0c
|
||||
; sta $c000
|
||||
; brk
|
||||
;
|
||||
$EA $EA $A9 $0c $8D $00 $c0 $00 $00
|
||||
;
|
||||
; test program #2
|
||||
; address: $0400
|
||||
; copy 0-terminated string from
|
||||
; address $d000 to $0200
|
||||
; "Hello World!"
|
||||
;
|
||||
; ORG=$0400
|
||||
; hello:
|
||||
; ldx #0
|
||||
; loop:
|
||||
; lda $d000,x
|
||||
; beq $06 ;branch to end (+6) if A=0
|
||||
; sta $0200,x
|
||||
; inx
|
||||
; bne $f5 ; branch to loop (-11) if X<>0
|
||||
; end:
|
||||
; brk
|
||||
ORG
|
||||
$0400
|
||||
$A2 $00
|
||||
$BD $00 $d0
|
||||
$F0 $06
|
||||
$9D $00 $02
|
||||
$E8
|
||||
$D0 $F5
|
||||
$00 $00
|
||||
; data
|
||||
; address: $d000
|
||||
ORG
|
||||
$D000
|
||||
;DEC: 53248
|
||||
; "Hello World!"
|
||||
72 101 108 108 111 32 87 111 114 108 100 33 0
|
||||
;
|
||||
; test program #3 - copy Hello World! string to $0300
|
||||
; using different assembly instructions
|
||||
; address: $0500
|
||||
;
|
||||
; ORG=$0500 ;dec: 1280
|
||||
; hello:
|
||||
; lda #0
|
||||
; sta $05
|
||||
; ldx $05
|
||||
; loop:
|
||||
; lda $d000,x
|
||||
; sta $0300,x
|
||||
; beq end ;(+6)
|
||||
; inx
|
||||
; beq end ;(+3)
|
||||
; jmp loop
|
||||
; end:
|
||||
; brk
|
||||
ORG
|
||||
$0500
|
||||
;DEC: 1280
|
||||
$A9 $00
|
||||
$85 $05
|
||||
$A6 $05
|
||||
$BD $00 $d0
|
||||
$9D $00 $03
|
||||
$F0 $06
|
||||
$E8
|
||||
$F0 $03
|
||||
$4C $06 $05
|
||||
$00 $00
|
||||
;
|
||||
; test program #4
|
||||
; left-shift memory location $05 at zero page,
|
||||
; then location $06 using zero page indexed addressing,
|
||||
; then memory location $c001 (outside zero page) using absolute addressing
|
||||
; then location $c002 using indexed absolute addressing
|
||||
; and finally left-shift Acc.
|
||||
; stop after each step for debugging
|
||||
; exit loop when Acc=0
|
||||
;
|
||||
; start:
|
||||
; lda #$ff
|
||||
; ldx #$01
|
||||
; sta $05
|
||||
; sta $05,x
|
||||
; sta $c000,x
|
||||
; inx
|
||||
; sta $c000,x
|
||||
; ldx #$01
|
||||
; loop2:
|
||||
; brk
|
||||
; asl $05
|
||||
; asl $05,x
|
||||
; asl $c001
|
||||
; asl $c001,x
|
||||
; asl
|
||||
; bne loop2 ;(-15 or $f1)
|
||||
; brk
|
||||
ORG
|
||||
$0600
|
||||
$A9 $FF
|
||||
$A2 $01
|
||||
$85 $05
|
||||
$95 $05
|
||||
$9D $00 $C0
|
||||
$E8
|
||||
$9D $00 $C0
|
||||
$A2 $01
|
||||
$00 $00
|
||||
$06 $05
|
||||
$16 $05
|
||||
$0E $01 $C0
|
||||
$1E $01 $C0
|
||||
$0A
|
||||
$D0 $F1
|
||||
$00 $00
|
||||
;
|
||||
; test program #5
|
||||
; Test ORA opcode with various arguments and addressing modes.
|
||||
; At each break, the contents of Acc should equal $AA.
|
||||
;
|
||||
; start:
|
||||
; lda #$aa ;%10101010
|
||||
; sta $05
|
||||
; sta $aa
|
||||
; lda #$00
|
||||
; tax
|
||||
; ora ($05,x)
|
||||
; brk
|
||||
; lda #$00
|
||||
; ora $05
|
||||
; brk
|
||||
; lda #$00
|
||||
; ora #$aa
|
||||
; brk
|
||||
; lda #$00
|
||||
; ora $0005
|
||||
; brk
|
||||
; lda #$05
|
||||
; sta $06
|
||||
; lda #$00
|
||||
; sta $07
|
||||
; tay
|
||||
; ora ($06),y
|
||||
; brk
|
||||
; lda #$00
|
||||
; tax
|
||||
; ora $05,x
|
||||
; brk
|
||||
; lda #$00
|
||||
; tay
|
||||
; ora $0005,y
|
||||
; brk
|
||||
; lda #$00
|
||||
; tax
|
||||
; ora $0005,x
|
||||
; brk
|
||||
ORG
|
||||
$0700
|
||||
$A9 $AA
|
||||
$85 $05
|
||||
$85 $AA
|
||||
$A9 $00
|
||||
$AA
|
||||
$01 $05
|
||||
$00 $00
|
||||
$A9 $00
|
||||
$05 $05
|
||||
$00 $00
|
||||
$A9 $00
|
||||
$09 $AA
|
||||
$00 $00
|
||||
$A9 $00
|
||||
$0D $05 $00
|
||||
$00 $00
|
||||
$A9 $05
|
||||
$85 $06
|
||||
$A9 $00
|
||||
$85 $07
|
||||
$A8
|
||||
$11 $06
|
||||
$00 $00
|
||||
$A9 $00
|
||||
$AA
|
||||
$15 $05
|
||||
$00 $00
|
||||
$A9 $00
|
||||
$A8
|
||||
$19 $05 $00
|
||||
$00 $00
|
||||
$A9 $00
|
||||
$AA
|
||||
$1D $05 $00
|
||||
$00 $00
|
||||
;
|
||||
; test program #6
|
||||
; Test JSR opcode.
|
||||
; After each break examine memory at $c000 and $c001.
|
||||
; After 1-st break, $c000 should equal $dd.
|
||||
; Return address-1 ($0802) should be on stack.
|
||||
; After 2-nd break, PC counter should be at $0805.
|
||||
; After 3-rd break, $c000 should equal $ee.
|
||||
; Return address-1 ($0807) should be on stack.
|
||||
; After 4-th break, PC counter should be at $080a.
|
||||
;
|
||||
; start:
|
||||
; jsr sub1
|
||||
; brk
|
||||
; jsr sub2
|
||||
; brk
|
||||
; brk
|
||||
; brk
|
||||
; sub1:
|
||||
; lda #$dd
|
||||
; sta $c000
|
||||
; brk
|
||||
; rts
|
||||
; sub2:
|
||||
; lda #$ee
|
||||
; sta $c000
|
||||
; brk
|
||||
; rts
|
||||
;
|
||||
ORG
|
||||
$0800
|
||||
$20 $0B $08
|
||||
$00 $00
|
||||
$20 $13 $08
|
||||
$00
|
||||
$00
|
||||
$00
|
||||
$A9 $DD
|
||||
$8D $00 $C0
|
||||
$00 $00
|
||||
$60
|
||||
$A9 $EE
|
||||
$8D $00 $C0
|
||||
$00 $00
|
||||
$60
|
||||
;
|
||||
; test program #7
|
||||
; Test ADC opcode.
|
||||
; Expected results:
|
||||
; First break: Acc=$01, Carry=1
|
||||
; 2-nd break: Acc=$02, Carry=1
|
||||
; 3-rd break: Acc=$22, Carry=0
|
||||
; 4-th break: Acc=$23, Carry=0
|
||||
;
|
||||
; start:
|
||||
; clc
|
||||
; lda #$ff
|
||||
; adc #$02
|
||||
; brk
|
||||
; sec
|
||||
; lda #$ff
|
||||
; adc #$02
|
||||
; brk
|
||||
; clc
|
||||
; lda #$20
|
||||
; adc #$02
|
||||
; brk
|
||||
; sec
|
||||
; lda #$20
|
||||
; adc #$02
|
||||
; brk
|
||||
;
|
||||
ORG
|
||||
$0900
|
||||
$18
|
||||
$A9 $FF
|
||||
$69 $02
|
||||
$00 $00
|
||||
$38
|
||||
$A9 $FF
|
||||
$69 $02
|
||||
$00 $00
|
||||
$18
|
||||
$A9 $20
|
||||
$69 $02
|
||||
$00 $00
|
||||
$38
|
||||
$A9 $20
|
||||
$69 $02
|
||||
$00 $00
|
||||
;
|
||||
; test program #8
|
||||
; Test ROR opcode.
|
||||
;
|
||||
; start:
|
||||
; sec
|
||||
; lda #$00
|
||||
; loop:
|
||||
; ror
|
||||
; brk
|
||||
; bcc loop ;(-5 -> $FB)
|
||||
; brk
|
||||
;
|
||||
ORG
|
||||
$0920
|
||||
$38
|
||||
$A9 $00
|
||||
$6A
|
||||
$00 $00
|
||||
$90 $FB
|
||||
$00 $00
|
||||
;
|
||||
628
dummy.rom
628
dummy.rom
|
|
@ -1,315 +1,315 @@
|
|||
;
|
||||
; test program #1
|
||||
; address: $0200
|
||||
; load Acc with value 12
|
||||
; write Acc to address $c000 (49152)
|
||||
;
|
||||
; nop
|
||||
; nop
|
||||
; lda #$0c
|
||||
; sta $c000
|
||||
; brk
|
||||
;
|
||||
$EA $EA $A9 $0c $8D $00 $c0 $00 $00
|
||||
;
|
||||
; test program #2
|
||||
; address: $0400
|
||||
; copy 0-terminated string from
|
||||
; address $d000 to $0200
|
||||
; "Hello World!"
|
||||
;
|
||||
; ORG=$0400
|
||||
; hello:
|
||||
; ldx #0
|
||||
; loop:
|
||||
; lda $d000,x
|
||||
; beq $06 ;branch to end (+6) if A=0
|
||||
; sta $0200,x
|
||||
; inx
|
||||
; bne $f5 ; branch to loop (-11) if X<>0
|
||||
; end:
|
||||
; brk
|
||||
ORG
|
||||
$0400
|
||||
$A2 $00
|
||||
$BD $00 $d0
|
||||
$F0 $06
|
||||
$9D $00 $02
|
||||
$E8
|
||||
$D0 $F5
|
||||
$00 $00
|
||||
; data
|
||||
; address: $d000
|
||||
ORG
|
||||
$D000
|
||||
;DEC: 53248
|
||||
; "Hello World!"
|
||||
72 101 108 108 111 32 87 111 114 108 100 33 0
|
||||
;
|
||||
; test program #3 - copy Hello World! string to $0300
|
||||
; using different assembly instructions
|
||||
; address: $0500
|
||||
;
|
||||
; ORG=$0500 ;dec: 1280
|
||||
; hello:
|
||||
; lda #0
|
||||
; sta $05
|
||||
; ldx $05
|
||||
; loop:
|
||||
; lda $d000,x
|
||||
; sta $0300,x
|
||||
; beq end ;(+6)
|
||||
; inx
|
||||
; beq end ;(+3)
|
||||
; jmp loop
|
||||
; end:
|
||||
; brk
|
||||
ORG
|
||||
$0500
|
||||
;DEC: 1280
|
||||
$A9 $00
|
||||
$85 $05
|
||||
$A6 $05
|
||||
$BD $00 $d0
|
||||
$9D $00 $03
|
||||
$F0 $06
|
||||
$E8
|
||||
$F0 $03
|
||||
$4C $06 $05
|
||||
$00 $00
|
||||
;
|
||||
; test program #4
|
||||
; left-shift memory location $05 at zero page,
|
||||
; then location $06 using zero page indexed addressing,
|
||||
; then memory location $c001 (outside zero page) using absolute addressing
|
||||
; then location $c002 using indexed absolute addressing
|
||||
; and finally left-shift Acc.
|
||||
; stop after each step for debugging
|
||||
; exit loop when Acc=0
|
||||
;
|
||||
; start:
|
||||
; lda #$ff
|
||||
; ldx #$01
|
||||
; sta $05
|
||||
; sta $05,x
|
||||
; sta $c000,x
|
||||
; inx
|
||||
; sta $c000,x
|
||||
; ldx #$01
|
||||
; loop2:
|
||||
; brk
|
||||
; asl $05
|
||||
; asl $05,x
|
||||
; asl $c001
|
||||
; asl $c001,x
|
||||
; asl
|
||||
; bne loop2 ;(-15 or $f1)
|
||||
; brk
|
||||
ORG
|
||||
$0600
|
||||
$A9 $FF
|
||||
$A2 $01
|
||||
$85 $05
|
||||
$95 $05
|
||||
$9D $00 $C0
|
||||
$E8
|
||||
$9D $00 $C0
|
||||
$A2 $01
|
||||
$00 $00
|
||||
$06 $05
|
||||
$16 $05
|
||||
$0E $01 $C0
|
||||
$1E $01 $C0
|
||||
$0A
|
||||
$D0 $F1
|
||||
$00 $00
|
||||
;
|
||||
; test program #5
|
||||
; Test ORA opcode with various arguments and addressing modes.
|
||||
; At each break, the contents of Acc should equal $AA.
|
||||
;
|
||||
; start:
|
||||
; lda #$aa ;%10101010
|
||||
; sta $05
|
||||
; sta $aa
|
||||
; lda #$00
|
||||
; tax
|
||||
; ora ($05,x)
|
||||
; brk
|
||||
; lda #$00
|
||||
; ora $05
|
||||
; brk
|
||||
; lda #$00
|
||||
; ora #$aa
|
||||
; brk
|
||||
; lda #$00
|
||||
; ora $0005
|
||||
; brk
|
||||
; lda #$05
|
||||
; sta $06
|
||||
; lda #$00
|
||||
; sta $07
|
||||
; tay
|
||||
; ora ($06),y
|
||||
; brk
|
||||
; lda #$00
|
||||
; tax
|
||||
; ora $05,x
|
||||
; brk
|
||||
; lda #$00
|
||||
; tay
|
||||
; ora $0005,y
|
||||
; brk
|
||||
; lda #$00
|
||||
; tax
|
||||
; ora $0005,x
|
||||
; brk
|
||||
ORG
|
||||
$0700
|
||||
$A9 $AA
|
||||
$85 $05
|
||||
$85 $AA
|
||||
$A9 $00
|
||||
$AA
|
||||
$01 $05
|
||||
$00 $00
|
||||
$A9 $00
|
||||
$05 $05
|
||||
$00 $00
|
||||
$A9 $00
|
||||
$09 $AA
|
||||
$00 $00
|
||||
$A9 $00
|
||||
$0D $05 $00
|
||||
$00 $00
|
||||
$A9 $05
|
||||
$85 $06
|
||||
$A9 $00
|
||||
$85 $07
|
||||
$A8
|
||||
$11 $06
|
||||
$00 $00
|
||||
$A9 $00
|
||||
$AA
|
||||
$15 $05
|
||||
$00 $00
|
||||
$A9 $00
|
||||
$A8
|
||||
$19 $05 $00
|
||||
$00 $00
|
||||
$A9 $00
|
||||
$AA
|
||||
$1D $05 $00
|
||||
$00 $00
|
||||
;
|
||||
; test program #6
|
||||
; Test JSR opcode.
|
||||
; After each break examine memory at $c000 and $c001.
|
||||
; After 1-st break, $c000 should equal $dd.
|
||||
; Return address-1 ($0802) should be on stack.
|
||||
; After 2-nd break, PC counter should be at $0805.
|
||||
; After 3-rd break, $c000 should equal $ee.
|
||||
; Return address-1 ($0807) should be on stack.
|
||||
; After 4-th break, PC counter should be at $080a.
|
||||
;
|
||||
; start:
|
||||
; jsr sub1
|
||||
; brk
|
||||
; jsr sub2
|
||||
; brk
|
||||
; brk
|
||||
; brk
|
||||
; sub1:
|
||||
; lda #$dd
|
||||
; sta $c000
|
||||
; brk
|
||||
; rts
|
||||
; sub2:
|
||||
; lda #$ee
|
||||
; sta $c000
|
||||
; brk
|
||||
; rts
|
||||
;
|
||||
ORG
|
||||
$0800
|
||||
$20 $0B $08
|
||||
$00 $00
|
||||
$20 $13 $08
|
||||
$00
|
||||
$00
|
||||
$00
|
||||
$A9 $DD
|
||||
$8D $00 $C0
|
||||
$00 $00
|
||||
$60
|
||||
$A9 $EE
|
||||
$8D $00 $C0
|
||||
$00 $00
|
||||
$60
|
||||
;
|
||||
; test program #7
|
||||
; Test ADC opcode.
|
||||
; Expected results:
|
||||
; First break: Acc=$01, Carry=1
|
||||
; 2-nd break: Acc=$02, Carry=1
|
||||
; 3-rd break: Acc=$22, Carry=0
|
||||
; 4-th break: Acc=$23, Carry=0
|
||||
;
|
||||
; start:
|
||||
; clc
|
||||
; lda #$ff
|
||||
; adc #$02
|
||||
; brk
|
||||
; sec
|
||||
; lda #$ff
|
||||
; adc #$02
|
||||
; brk
|
||||
; clc
|
||||
; lda #$20
|
||||
; adc #$02
|
||||
; brk
|
||||
; sec
|
||||
; lda #$20
|
||||
; adc #$02
|
||||
; brk
|
||||
;
|
||||
ORG
|
||||
$0900
|
||||
$18
|
||||
$A9 $FF
|
||||
$69 $02
|
||||
$00 $00
|
||||
$38
|
||||
$A9 $FF
|
||||
$69 $02
|
||||
$00 $00
|
||||
$18
|
||||
$A9 $20
|
||||
$69 $02
|
||||
$00 $00
|
||||
$38
|
||||
$A9 $20
|
||||
$69 $02
|
||||
$00 $00
|
||||
;
|
||||
; test program #8
|
||||
; Test ROR opcode.
|
||||
;
|
||||
; start:
|
||||
; sec
|
||||
; lda #$00
|
||||
; loop:
|
||||
; ror
|
||||
; brk
|
||||
; bcc loop ;(-5 -> $FB)
|
||||
; brk
|
||||
;
|
||||
ORG
|
||||
$0920
|
||||
$38
|
||||
$A9 $00
|
||||
$6A
|
||||
$00 $00
|
||||
$90 $FB
|
||||
$00 $00
|
||||
;
|
||||
; test program #1
|
||||
; address: $0200
|
||||
; load Acc with value 12
|
||||
; write Acc to address $c000 (49152)
|
||||
;
|
||||
; nop
|
||||
; nop
|
||||
; lda #$0c
|
||||
; sta $c000
|
||||
; brk
|
||||
;
|
||||
$EA $EA $A9 $0c $8D $00 $c0 $00 $00
|
||||
;
|
||||
; test program #2
|
||||
; address: $0400
|
||||
; copy 0-terminated string from
|
||||
; address $d000 to $0200
|
||||
; "Hello World!"
|
||||
;
|
||||
; ORG=$0400
|
||||
; hello:
|
||||
; ldx #0
|
||||
; loop:
|
||||
; lda $d000,x
|
||||
; beq $06 ;branch to end (+6) if A=0
|
||||
; sta $0200,x
|
||||
; inx
|
||||
; bne $f5 ; branch to loop (-11) if X<>0
|
||||
; end:
|
||||
; brk
|
||||
ORG
|
||||
$0400
|
||||
$A2 $00
|
||||
$BD $00 $d0
|
||||
$F0 $06
|
||||
$9D $00 $02
|
||||
$E8
|
||||
$D0 $F5
|
||||
$00 $00
|
||||
; data
|
||||
; address: $d000
|
||||
ORG
|
||||
$D000
|
||||
;DEC: 53248
|
||||
; "Hello World!"
|
||||
72 101 108 108 111 32 87 111 114 108 100 33 0
|
||||
;
|
||||
; test program #3 - copy Hello World! string to $0300
|
||||
; using different assembly instructions
|
||||
; address: $0500
|
||||
;
|
||||
; ORG=$0500 ;dec: 1280
|
||||
; hello:
|
||||
; lda #0
|
||||
; sta $05
|
||||
; ldx $05
|
||||
; loop:
|
||||
; lda $d000,x
|
||||
; sta $0300,x
|
||||
; beq end ;(+6)
|
||||
; inx
|
||||
; beq end ;(+3)
|
||||
; jmp loop
|
||||
; end:
|
||||
; brk
|
||||
ORG
|
||||
$0500
|
||||
;DEC: 1280
|
||||
$A9 $00
|
||||
$85 $05
|
||||
$A6 $05
|
||||
$BD $00 $d0
|
||||
$9D $00 $03
|
||||
$F0 $06
|
||||
$E8
|
||||
$F0 $03
|
||||
$4C $06 $05
|
||||
$00 $00
|
||||
;
|
||||
; test program #4
|
||||
; left-shift memory location $05 at zero page,
|
||||
; then location $06 using zero page indexed addressing,
|
||||
; then memory location $c001 (outside zero page) using absolute addressing
|
||||
; then location $c002 using indexed absolute addressing
|
||||
; and finally left-shift Acc.
|
||||
; stop after each step for debugging
|
||||
; exit loop when Acc=0
|
||||
;
|
||||
; start:
|
||||
; lda #$ff
|
||||
; ldx #$01
|
||||
; sta $05
|
||||
; sta $05,x
|
||||
; sta $c000,x
|
||||
; inx
|
||||
; sta $c000,x
|
||||
; ldx #$01
|
||||
; loop2:
|
||||
; brk
|
||||
; asl $05
|
||||
; asl $05,x
|
||||
; asl $c001
|
||||
; asl $c001,x
|
||||
; asl
|
||||
; bne loop2 ;(-15 or $f1)
|
||||
; brk
|
||||
ORG
|
||||
$0600
|
||||
$A9 $FF
|
||||
$A2 $01
|
||||
$85 $05
|
||||
$95 $05
|
||||
$9D $00 $C0
|
||||
$E8
|
||||
$9D $00 $C0
|
||||
$A2 $01
|
||||
$00 $00
|
||||
$06 $05
|
||||
$16 $05
|
||||
$0E $01 $C0
|
||||
$1E $01 $C0
|
||||
$0A
|
||||
$D0 $F1
|
||||
$00 $00
|
||||
;
|
||||
; test program #5
|
||||
; Test ORA opcode with various arguments and addressing modes.
|
||||
; At each break, the contents of Acc should equal $AA.
|
||||
;
|
||||
; start:
|
||||
; lda #$aa ;%10101010
|
||||
; sta $05
|
||||
; sta $aa
|
||||
; lda #$00
|
||||
; tax
|
||||
; ora ($05,x)
|
||||
; brk
|
||||
; lda #$00
|
||||
; ora $05
|
||||
; brk
|
||||
; lda #$00
|
||||
; ora #$aa
|
||||
; brk
|
||||
; lda #$00
|
||||
; ora $0005
|
||||
; brk
|
||||
; lda #$05
|
||||
; sta $06
|
||||
; lda #$00
|
||||
; sta $07
|
||||
; tay
|
||||
; ora ($06),y
|
||||
; brk
|
||||
; lda #$00
|
||||
; tax
|
||||
; ora $05,x
|
||||
; brk
|
||||
; lda #$00
|
||||
; tay
|
||||
; ora $0005,y
|
||||
; brk
|
||||
; lda #$00
|
||||
; tax
|
||||
; ora $0005,x
|
||||
; brk
|
||||
ORG
|
||||
$0700
|
||||
$A9 $AA
|
||||
$85 $05
|
||||
$85 $AA
|
||||
$A9 $00
|
||||
$AA
|
||||
$01 $05
|
||||
$00 $00
|
||||
$A9 $00
|
||||
$05 $05
|
||||
$00 $00
|
||||
$A9 $00
|
||||
$09 $AA
|
||||
$00 $00
|
||||
$A9 $00
|
||||
$0D $05 $00
|
||||
$00 $00
|
||||
$A9 $05
|
||||
$85 $06
|
||||
$A9 $00
|
||||
$85 $07
|
||||
$A8
|
||||
$11 $06
|
||||
$00 $00
|
||||
$A9 $00
|
||||
$AA
|
||||
$15 $05
|
||||
$00 $00
|
||||
$A9 $00
|
||||
$A8
|
||||
$19 $05 $00
|
||||
$00 $00
|
||||
$A9 $00
|
||||
$AA
|
||||
$1D $05 $00
|
||||
$00 $00
|
||||
;
|
||||
; test program #6
|
||||
; Test JSR opcode.
|
||||
; After each break examine memory at $c000 and $c001.
|
||||
; After 1-st break, $c000 should equal $dd.
|
||||
; Return address-1 ($0802) should be on stack.
|
||||
; After 2-nd break, PC counter should be at $0805.
|
||||
; After 3-rd break, $c000 should equal $ee.
|
||||
; Return address-1 ($0807) should be on stack.
|
||||
; After 4-th break, PC counter should be at $080a.
|
||||
;
|
||||
; start:
|
||||
; jsr sub1
|
||||
; brk
|
||||
; jsr sub2
|
||||
; brk
|
||||
; brk
|
||||
; brk
|
||||
; sub1:
|
||||
; lda #$dd
|
||||
; sta $c000
|
||||
; brk
|
||||
; rts
|
||||
; sub2:
|
||||
; lda #$ee
|
||||
; sta $c000
|
||||
; brk
|
||||
; rts
|
||||
;
|
||||
ORG
|
||||
$0800
|
||||
$20 $0B $08
|
||||
$00 $00
|
||||
$20 $13 $08
|
||||
$00
|
||||
$00
|
||||
$00
|
||||
$A9 $DD
|
||||
$8D $00 $C0
|
||||
$00 $00
|
||||
$60
|
||||
$A9 $EE
|
||||
$8D $00 $C0
|
||||
$00 $00
|
||||
$60
|
||||
;
|
||||
; test program #7
|
||||
; Test ADC opcode.
|
||||
; Expected results:
|
||||
; First break: Acc=$01, Carry=1
|
||||
; 2-nd break: Acc=$02, Carry=1
|
||||
; 3-rd break: Acc=$22, Carry=0
|
||||
; 4-th break: Acc=$23, Carry=0
|
||||
;
|
||||
; start:
|
||||
; clc
|
||||
; lda #$ff
|
||||
; adc #$02
|
||||
; brk
|
||||
; sec
|
||||
; lda #$ff
|
||||
; adc #$02
|
||||
; brk
|
||||
; clc
|
||||
; lda #$20
|
||||
; adc #$02
|
||||
; brk
|
||||
; sec
|
||||
; lda #$20
|
||||
; adc #$02
|
||||
; brk
|
||||
;
|
||||
ORG
|
||||
$0900
|
||||
$18
|
||||
$A9 $FF
|
||||
$69 $02
|
||||
$00 $00
|
||||
$38
|
||||
$A9 $FF
|
||||
$69 $02
|
||||
$00 $00
|
||||
$18
|
||||
$A9 $20
|
||||
$69 $02
|
||||
$00 $00
|
||||
$38
|
||||
$A9 $20
|
||||
$69 $02
|
||||
$00 $00
|
||||
;
|
||||
; test program #8
|
||||
; Test ROR opcode.
|
||||
;
|
||||
; start:
|
||||
; sec
|
||||
; lda #$00
|
||||
; loop:
|
||||
; ror
|
||||
; brk
|
||||
; bcc loop ;(-5 -> $FB)
|
||||
; brk
|
||||
;
|
||||
ORG
|
||||
$0920
|
||||
$38
|
||||
$A9 $00
|
||||
$6A
|
||||
$00 $00
|
||||
$90 $FB
|
||||
$00 $00
|
||||
;
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
|
|
@ -1,5 +1,5 @@
|
|||
10 LET A=1
|
||||
20 PR A;") HELLO WORLD FROM MKHBC!"
|
||||
30 LET A=A+1
|
||||
40 IF A=0 THEN END
|
||||
50 GOTO 20
|
||||
10 LET A=0
|
||||
20 PR A;") HELLO WORLD FROM MKHBC!"
|
||||
30 LET A=A+1
|
||||
40 IF A>100 THEN END
|
||||
50 GOTO 20
|
||||
|
|
|
|||
|
|
@ -0,0 +1,49 @@
|
|||
# Project: MKBasic
|
||||
|
||||
CPP = g++ -D__DEBUG__ -DLINUX
|
||||
CC = gcc -D__DEBUG__
|
||||
OBJ = main.o VMachine.o MKBasic.o MKCpu.o Memory.o Display.o MKGenException.o
|
||||
LINKOBJ = main.o VMachine.o MKBasic.o MKCpu.o Memory.o Display.o MKGenException.o
|
||||
BIN = mkbasic
|
||||
LIBS = -static-libgcc -m32 -g3 -ltermcap
|
||||
CLIBS = -static-libgcc -m32 -g3
|
||||
INCS =
|
||||
CXXINCS =
|
||||
CXXFLAGS = $(CXXINCS) -m32 -std=c++0x -Wall -pedantic -g3
|
||||
#CFLAGS = $(INCS) -m32 -std=c++0x -Wall -pedantic -g3
|
||||
CFLAGS = $(INCS) -m32 -Wall -pedantic -g3
|
||||
RM = rm -f
|
||||
|
||||
.PHONY: all all-before all-after clean clean-custom
|
||||
|
||||
all: all-before $(BIN) bin2hex all-after
|
||||
|
||||
clean: clean-custom
|
||||
${RM} $(OBJ) $(BIN) bin2hex
|
||||
|
||||
$(BIN): $(OBJ)
|
||||
$(CPP) $(LINKOBJ) -o $(BIN) $(LIBS)
|
||||
|
||||
main.o: main.cpp
|
||||
$(CPP) -c main.cpp -o main.o $(CXXFLAGS)
|
||||
|
||||
VMachine.o: VMachine.cpp
|
||||
$(CPP) -c VMachine.cpp -o VMachine.o $(CXXFLAGS)
|
||||
|
||||
MKBasic.o: MKBasic.cpp
|
||||
$(CPP) -c MKBasic.cpp -o MKBasic.o $(CXXFLAGS)
|
||||
|
||||
MKCpu.o: MKCpu.cpp
|
||||
$(CPP) -c MKCpu.cpp -o MKCpu.o $(CXXFLAGS)
|
||||
|
||||
Memory.o: Memory.cpp
|
||||
$(CPP) -c Memory.cpp -o Memory.o $(CXXFLAGS)
|
||||
|
||||
Display.o: Display.cpp
|
||||
$(CPP) -c Display.cpp -o Display.o $(CXXFLAGS)
|
||||
|
||||
bin2hex: bin2hex.c
|
||||
$(CC) bin2hex.c -o bin2hex $(CFLAGS) $(CLIBS)
|
||||
|
||||
MKGenException.o: MKGenException.cpp
|
||||
$(CPP) -c MKGenException.cpp -o MKGenException.o $(CXXFLAGS)
|
||||
|
|
@ -0,0 +1,58 @@
|
|||
# Project: MKBasic
|
||||
# Makefile created by Dev-C++ 5.11
|
||||
# and modified for standalone MINGW compiler installation.
|
||||
|
||||
CPP = g++.exe -D__DEBUG__
|
||||
CC = gcc.exe -D__DEBUG__
|
||||
WINDRES = windres.exe
|
||||
OBJ = main.o VMachine.o MKBasic.o MKCpu.o Memory.o Display.o MKGenException.o
|
||||
OBJ2 = bin2hex.o
|
||||
LINKOBJ = main.o VMachine.o MKBasic.o MKCpu.o Memory.o Display.o MKGenException.o
|
||||
LINKOBJ2 = bin2hex.o
|
||||
LIBS = -L"C:\mingw-w64\x86_64-5.3.0\mingw64\x86_64-w64-mingw32/lib" -L"C:\mingw-w64\x86_64-5.3.0\mingw64\x86_64-w64-mingw32/lib" -static-libgcc -static-libstdc++ -Wl,-Bstatic -lstdc++ -lpthread -Wl,-Bdynamic
|
||||
INCS = -I"C:\mingw-w64\x86_64-5.3.0\mingw64/include" -I"C:\mingw-w64\x86_64-5.3.0\mingw64\x86_64-w64-mingw32/include" -I"C:\mingw-w64\x86_64-5.3.0\mingw64\lib\gcc\x86_64-w64-mingw32\5.3.0/include"
|
||||
CXXINCS = -I"C:\mingw-w64\x86_64-5.3.0\mingw64/include" -I"C:\mingw-w64\x86_64-5.3.0\mingw64\x86_64-w64-mingw32/include" -I"C:\mingw-w64\x86_64-5.3.0\mingw64\lib\gcc\x86_64-w64-mingw32\5.3.0/include"
|
||||
BIN = mkbasic.exe
|
||||
BIN2 = bin2hex.exe
|
||||
CXXFLAGS = $(CXXINCS) -std=c++11 -Wall -Wextra -pedantic -g3
|
||||
CFLAGS = $(INCS) -std=c++11 -Wall -Wextra -pedantic -g3
|
||||
CXXFLAGS2 = $(CXXINCS)
|
||||
CFLAGS2 = $(INCS)
|
||||
RM = del /f
|
||||
|
||||
.PHONY: all all-before all-after clean clean-custom
|
||||
|
||||
all: all-before $(BIN) $(BIN2) all-after
|
||||
|
||||
clean: clean-custom
|
||||
${RM} $(OBJ) $(OBJ2) $(BIN) $(BIN2)
|
||||
|
||||
$(BIN): $(OBJ)
|
||||
$(CPP) $(LINKOBJ) -o $(BIN) $(LIBS)
|
||||
|
||||
main.o: main.cpp
|
||||
$(CPP) -c main.cpp -o main.o $(CXXFLAGS)
|
||||
|
||||
VMachine.o: VMachine.cpp
|
||||
$(CPP) -c VMachine.cpp -o VMachine.o $(CXXFLAGS)
|
||||
|
||||
MKBasic.o: MKBasic.cpp
|
||||
$(CPP) -c MKBasic.cpp -o MKBasic.o $(CXXFLAGS)
|
||||
|
||||
MKCpu.o: MKCpu.cpp
|
||||
$(CPP) -c MKCpu.cpp -o MKCpu.o $(CXXFLAGS)
|
||||
|
||||
Memory.o: Memory.cpp
|
||||
$(CPP) -c Memory.cpp -o Memory.o $(CXXFLAGS)
|
||||
|
||||
Display.o: Display.cpp
|
||||
$(CPP) -c Display.cpp -o Display.o $(CXXFLAGS)
|
||||
|
||||
MKGenException.o: MKGenException.cpp
|
||||
$(CPP) -c MKGenException.cpp -o MKGenException.o $(CXXFLAGS)
|
||||
|
||||
$(BIN2): $(OBJ2)
|
||||
$(CC) $(LINKOBJ2) -o $(BIN2) $(LIBS)
|
||||
|
||||
bin2hex.o: bin2hex.c
|
||||
$(CC) -c bin2hex.c -o bin2hex.o $(CFLAGS2)
|
||||
|
|
@ -0,0 +1,4 @@
|
|||
rem to make project on win64 with mingw
|
||||
rem run in mingw console
|
||||
|
||||
mingw32-make -f makefile.mingw clean all
|
||||
File diff suppressed because it is too large
Load Diff
Binary file not shown.
|
|
@ -0,0 +1,16 @@
|
|||
MEMORY {
|
||||
RAM0: start = $0000, size = $0400, fill = yes;
|
||||
RAM1: start = $0400, size = $0620, fill = yes;
|
||||
RAM2: start = $0A20, size = $F3E0, fill = yes;
|
||||
ROM1: start = $FE00, size = $1ED, fill = yes;
|
||||
ROM2: start = $FFED, size = $12;
|
||||
}
|
||||
|
||||
SEGMENTS {
|
||||
BEGN: load = RAM0, type = rw;
|
||||
CODE: load = RAM1, type = rw;
|
||||
DATA: load = RAM2, type = rw;
|
||||
KERN: load = ROM1, type = ro;
|
||||
VECT: load = ROM2, type = ro;
|
||||
}
|
||||
|
||||
|
|
@ -0,0 +1,114 @@
|
|||
; Created with BIN2HEX (C) Marek Karcz 2016. All rights reserved.
|
||||
; 03/13/16 00:08:59
|
||||
ADDR
|
||||
$0400
|
||||
ORG
|
||||
$0000
|
||||
ORG
|
||||
$0400
|
||||
$a9 $00 $85 $b7 $4c $09 $04 $ff $ff $d8 $a2 $ff $9a $a2 $c8 $86
|
||||
$b2 $20 $92 $07 $20 $7d $08 $c9 $43 $d0 $17 $a9 $ff $8d $07 $04
|
||||
$a2 $1f $bd $20 $0a $95 $50 $ca $10 $f8 $a2 $1b $86 $2c $a9 $cc
|
||||
$d0 $23 $c9 $45 $d0 $13 $a9 $ff $8d $07 $04 $20 $db $05 $38 $a9
|
||||
$01 $e5 $b7 $85 $b7 $a9 $ee $d0 $0c $c9 $40 $d0 $10 $a9 $ff $8d
|
||||
$07 $04 $20 $cf $06 $85 $4b $85 $4a $85 $49 $d0 $ac $c9 $0d $d0
|
||||
$0d $48 $a9 $ff $8d $07 $04 $68 $20 $75 $06 $4c $17 $05 $c9 $41
|
||||
$f0 $0a $48 $a9 $00 $8d $07 $04 $68 $4c $10 $05 $60 $a6 $b5 $30
|
||||
$59 $a5 $b0 $f0 $08 $e0 $08 $d0 $04 $c5 $26 $f0 $2e $f6 $23 $c9
|
||||
$01 $d0 $02 $f6 $23 $50 $1e $a0 $0f $a5 $b1 $d9 $60 $00 $f0 $03
|
||||
$88 $10 $f8 $b9 $51 $0a $d5 $24 $90 $04 $94 $26 $95 $24 $18 $08
|
||||
$75 $25 $95 $25 $28 $e0 $04 $f0 $03 $30 $2e $60 $a5 $28 $85 $2d
|
||||
$a9 $00 $85 $b5 $20 $75 $06 $20 $db $05 $20 $29 $05 $20 $db $05
|
||||
$a9 $08 $85 $b5 $20 $5b $06 $4c $2c $07 $e0 $f9 $d0 $0b $a5 $60
|
||||
$c5 $b1 $d0 $04 $a9 $00 $85 $b4 $60 $50 $fd $a0 $07 $a5 $b1 $d9
|
||||
$60 $00 $f0 $05 $88 $f0 $f1 $10 $f6 $b9 $51 $0a $d5 $22 $90 $02
|
||||
$95 $22 $c6 $b5 $a9 $fb $c5 $b5 $f0 $03 $20 $4f $06 $e6 $b5 $60
|
||||
$c9 $08 $b0 $12 $20 $1c $07 $a2 $1f $b5 $50 $c5 $4a $f0 $03 $ca
|
||||
$10 $f7 $86 $4b $86 $b0 $4c $09 $04 $a2 $10 $a9 $00 $95 $2e $ca
|
||||
$10 $fb $a9 $10 $85 $b0 $c6 $b0 $10 $01 $60 $20 $48 $06 $a4 $b0
|
||||
$a2 $08 $86 $b6 $c0 $08 $10 $41 $c0 $06 $10 $2e $c0 $04 $10 $1f
|
||||
$c0 $01 $f0 $09 $10 $0e $20 $b7 $05 $d0 $fb $f0 $d9 $20 $c5 $05
|
||||
$d0 $fb $f0 $d2 $a2 $04 $86 $b6 $20 $c5 $05 $d0 $fb $f0 $c7 $20
|
||||
$c5 $05 $a5 $b6 $c9 $04 $d0 $f7 $f0 $bc $a2 $10 $86 $b6 $20 $b7
|
||||
$05 $a5 $b6 $c9 $08 $d0 $f7 $f0 $ad $a2 $06 $86 $b6 $20 $f3 $05
|
||||
$50 $05 $30 $03 $20 $7d $04 $20 $48 $06 $c6 $b6 $a5 $b6 $c9 $05
|
||||
$f0 $eb $20 $f3 $05 $70 $8f $30 $8d $20 $7d $04 $a5 $b1 $29 $f0
|
||||
$c9 $20 $f0 $ee $4c $36 $05 $20 $f3 $05 $30 $03 $20 $7d $04 $20
|
||||
$48 $06 $c6 $b6 $60 $20 $f3 $05 $90 $02 $50 $f9 $30 $07 $08 $20
|
||||
$7d $04 $28 $50 $f0 $20 $48 $06 $c6 $b6 $60 $a2 $0f $38 $b4 $60
|
||||
$a9 $77 $f5 $50 $95 $60 $94 $50 $38 $a9 $77 $f5 $50 $95 $50 $ca
|
||||
$10 $eb $60 $a5 $b1 $a6 $b6 $18 $7d $40 $0a $85 $b1 $29 $88 $d0
|
||||
$42 $a5 $b1 $a2 $20 $ca $30 $0e $d5 $50 $d0 $f9 $e0 $10 $30 $33
|
||||
$a9 $7f $69 $01 $70 $01 $b8 $a5 $b5 $30 $24 $c9 $08 $10 $20 $48
|
||||
$08 $a9 $f9 $85 $b5 $85 $b4 $20 $75 $06 $20 $db $05 $20 $32 $05
|
||||
$20 $58 $06 $28 $68 $85 $b5 $a5 $b4 $30 $04 $38 $a9 $ff $60 $18
|
||||
$a9 $00 $60 $a9 $ff $18 $b8 $60 $a6 $b0 $b5 $50 $85 $b1 $60 $20
|
||||
$75 $06 $20 $db $05 $20 $32 $05 $20 $db $05 $ba $86 $b3 $a6 $b2
|
||||
$9a $68 $85 $b6 $68 $85 $b0 $aa $68 $95 $50 $68 $aa $68 $85 $b1
|
||||
$95 $50 $4c $9a $06 $ba $86 $b3 $a6 $b2 $9a $a5 $b1 $48 $a8 $a2
|
||||
$1f $d5 $50 $f0 $03 $ca $10 $f9 $a9 $cc $95 $50 $8a $48 $a6 $b0
|
||||
$b5 $50 $94 $50 $48 $8a $48 $a5 $b6 $48 $ba $86 $b2 $a6 $b3 $9a
|
||||
$60 $a4 $24 $ec $51 $0a $d0 $04 $a9 $00 $f0 $0a $a6 $23 $d0 $06
|
||||
$a6 $3e $d0 $02 $a9 $ff $a2 $04 $86 $b5 $c5 $4a $90 $0c $f0 $0a
|
||||
$85 $4a $a5 $b0 $85 $4b $a5 $b1 $85 $49 $a9 $2e $4c $8f $08 $a6
|
||||
$2c $30 $1c $a5 $49 $dd $61 $0a $d0 $11 $ca $bd $61 $0a $85 $4b
|
||||
$ca $bd $61 $0a $85 $49 $ca $86 $2c $d0 $1c $a9 $ff $85 $2c $a2
|
||||
$0c $86 $b5 $86 $4a $a2 $14 $20 $2b $05 $a2 $04 $86 $b5 $20 $29
|
||||
$05 $a6 $4a $e0 $0f $90 $12 $a6 $4b $b5 $50 $85 $4a $86 $b0 $a5
|
||||
$49 $85 $b1 $20 $75 $06 $4c $09 $04 $a9 $ff $60 $a2 $04 $06 $49
|
||||
$26 $4a $ca $d0 $f9 $05 $49 $85 $49 $85 $b1 $60 $18 $a9 $80 $65
|
||||
$2b $65 $3c $65 $3d $65 $21 $65 $2f $38 $e5 $40 $e5 $41 $e5 $22
|
||||
$e5 $20 $e5 $2e $e5 $3f $e5 $23 $b0 $02 $a9 $00 $4a $18 $69 $40
|
||||
$65 $3c $65 $3d $38 $e5 $24 $4a $18 $69 $90 $65 $2d $65 $2d $65
|
||||
$2d $65 $2d $65 $21 $38 $e5 $24 $e5 $24 $e5 $25 $e5 $25 $e5 $20
|
||||
$a6 $b1 $e0 $33 $f0 $16 $e0 $34 $f0 $12 $e0 $22 $f0 $0e $e0 $25
|
||||
$f0 $0a $a6 $b0 $f0 $09 $b4 $50 $c0 $10 $10 $03 $18 $69 $02 $4c
|
||||
$a1 $06 $ad $07 $04 $d0 $01 $60 $20 $37 $08 $20 $5b $08 $20 $42
|
||||
$08 $a0 $00 $20 $09 $08 $a9 $7c $20 $8f $08 $a2 $1f $98 $d5 $50
|
||||
$f0 $40 $ca $10 $f8 $98 $29 $01 $85 $4c $98 $4a $4a $4a $4a $29
|
||||
$01 $18 $65 $4c $29 $01 $d0 $03 $a9 $2a $2c $a9 $20 $20 $8f $08
|
||||
$20 $8f $08 $c8 $98 $29 $08 $f0 $cd $a9 $7c $20 $8f $08 $20 $54
|
||||
$08 $20 $37 $08 $20 $09 $08 $18 $98 $69 $08 $a8 $c0 $80 $f0 $2b
|
||||
$d0 $b4 $a5 $b7 $f0 $05 $bd $0d $09 $d0 $03 $bd $fd $08 $20 $8f
|
||||
$08 $bd $2d $09 $20 $8f $08 $d0 $ca $8a $48 $a2 $19 $a9 $2d $20
|
||||
$8f $08 $ca $d0 $fa $68 $aa $20 $37 $08 $60 $20 $42 $08 $a5 $4b
|
||||
$20 $9b $08 $a9 $20 $20 $8f $08 $a5 $4a $20 $9b $08 $a9 $20 $20
|
||||
$8f $08 $a5 $49 $20 $9b $08 $a9 $0d $20 $8f $08 $a9 $0a $20 $8f
|
||||
$08 $60 $a2 $00 $a9 $20 $20 $8f $08 $8a $20 $9b $08 $e8 $e0 $08
|
||||
$d0 $f2 $f0 $e3 $98 $29 $70 $20 $9b $08 $60 $86 $f6 $85 $f7 $84
|
||||
$f8 $ad $08 $04 $f0 $0b $a9 $c1 $85 $e0 $a9 $08 $85 $e1 $20 $f3
|
||||
$ff $a9 $00 $8d $08 $04 $a6 $f6 $a5 $f7 $a4 $f8 $60 $a9 $3f $20
|
||||
$8f $08 $20 $8b $08 $20 $8f $08 $29 $4f $60 $20 $ed $ff $60 $86
|
||||
$f6 $85 $f7 $20 $f0 $ff $a6 $f6 $a5 $f7 $60 $48 $4a $4a $4a $4a
|
||||
$20 $a4 $08 $68 $84 $f8 $29 $0f $a8 $b9 $b1 $08 $a4 $f8 $4c $8f
|
||||
$08 $30 $31 $32 $33 $34 $35 $36 $37 $38 $39 $41 $42 $43 $44 $45
|
||||
$46 $4d $69 $63 $72 $6f $43 $68 $65 $73 $73 $20 $28 $63 $29 $20
|
||||
$31 $39 $39 $36 $2d $32 $30 $30 $32 $20 $50 $65 $74 $65 $72 $20
|
||||
$4a $65 $6e $6e $69 $6e $67 $73 $2c $20 $70 $65 $74 $65 $72 $6a
|
||||
$40 $62 $65 $6e $6c $6f $2e $63 $6f $6d $0d $0a $00 $57 $57 $57
|
||||
$57 $57 $57 $57 $57 $57 $57 $57 $57 $57 $57 $57 $57 $42 $42 $42
|
||||
$42 $42 $42 $42 $42 $42 $42 $42 $42 $42 $42 $42 $42 $57 $57 $57
|
||||
$57 $57 $57 $57 $57 $57 $57 $57 $57 $57 $57 $57 $57 $4b $51 $43
|
||||
$43 $42 $42 $52 $52 $50 $50 $50 $50 $50 $50 $50 $50 $4b $51 $43
|
||||
$43 $42 $42 $52 $52 $50 $50 $50 $50 $50 $50 $50 $50 $00 $00 $00
|
||||
ORG
|
||||
$0a20
|
||||
$03 $04 $00 $07 $02 $05 $01 $06 $10 $17 $11 $16 $12 $15 $14 $13
|
||||
$73 $74 $70 $77 $72 $75 $71 $76 $60 $67 $61 $66 $62 $65 $64 $63
|
||||
$00 $f0 $ff $01 $10 $11 $0f $ef $f1 $df $e1 $ee $f2 $12 $0e $1f
|
||||
$21 $0b $0a $06 $06 $04 $04 $04 $04 $02 $02 $02 $02 $02 $02 $02
|
||||
$02 $99 $25 $0b $25 $01 $00 $33 $25 $07 $36 $34 $0d $34 $34 $0e
|
||||
$52 $25 $0d $45 $35 $04 $55 $22 $06 $43 $33 $0f $cc $00 $00 $00
|
||||
ORG
|
||||
$fe00
|
||||
$ad $00 $e0 $60 $8d $00 $e0 $60 $a0 $00 $a5 $e1 $48 $b1 $e0 $f0
|
||||
$0b $20 $04 $fe $c8 $d0 $f6 $e6 $e1 $4c $0d $fe $68 $85 $e1 $60
|
||||
ORG
|
||||
$ffe0
|
||||
$00 $00 $00 $00 $00 $00 $00 $00 $00 $00 $00 $00 $00 $4c $00 $fe
|
||||
$4c $04 $fe $4c $08 $fe $00 $00 $00 $00 $00 $00 $00 $00 $00 $00
|
||||
IOADDR
|
||||
$E000
|
||||
ENIO
|
||||
EXEC
|
||||
$0400
|
||||
File diff suppressed because it is too large
Load Diff
Binary file not shown.
|
|
@ -0,0 +1,10 @@
|
|||
10 LET A=0
|
||||
15 LET B=0
|
||||
20 PRINT A;" ";
|
||||
30 LET A=A+1
|
||||
32 LET B=B+1
|
||||
35 IF B>9 THEN GOTO 60
|
||||
40 IF A>1000 THEN END
|
||||
50 GOTO 20
|
||||
60 PRINT
|
||||
70 GOTO 15
|
||||
196
t_adc_bcd_01.65s
196
t_adc_bcd_01.65s
|
|
@ -1,99 +1,99 @@
|
|||
; ADC, test decimal mode.
|
||||
;
|
||||
; NV-BDIZC
|
||||
; ??1110??
|
||||
;
|
||||
; The results I got on Rockwell 6502 AP
|
||||
;
|
||||
; 00 + 00 and C=0 gives 00 and N=0 V=0 Z=1 C=0 (3A)
|
||||
; 79 + 00 and C=1 gives 80 and N=1 V=1 Z=0 C=0 (F8)
|
||||
; 24 + 56 and C=0 gives 80 and N=1 V=1 Z=0 C=0 (F8)
|
||||
; 93 + 82 and C=0 gives 75 and N=0 V=1 Z=0 C=1 (79)
|
||||
; 89 + 76 and C=0 gives 65 and N=0 V=0 Z=0 C=1 (39)
|
||||
; 89 + 76 and C=1 gives 66 and N=0 V=0 Z=0 C=1 (39)
|
||||
; 80 + f0 and C=0 gives d0 and N=1 V=1 Z=0 C=1 (F9)
|
||||
; 80 + fa and C=0 gives e0 and N=1 V=0 Z=0 C=1 (B9)
|
||||
; 2f + 4f and C=0 gives 74 and N=0 V=0 Z=0 C=0 (38)
|
||||
; 6f + 00 and C=1 gives 76 and N=0 V=0 Z=0 C=0 (38)
|
||||
|
||||
RES=$0300
|
||||
|
||||
*=$0200
|
||||
|
||||
SED
|
||||
CLC
|
||||
LDA #$00
|
||||
ADC #$00
|
||||
STA RES
|
||||
PHP
|
||||
PLA
|
||||
STA RES+1
|
||||
SEC
|
||||
LDA #$79
|
||||
ADC #$00
|
||||
STA RES+2
|
||||
PHP
|
||||
PLA
|
||||
STA RES+3
|
||||
CLC
|
||||
LDA #$24
|
||||
ADC #$56
|
||||
STA RES+4
|
||||
PHP
|
||||
PLA
|
||||
STA RES+5
|
||||
CLC
|
||||
LDA #$93
|
||||
ADC #$82
|
||||
STA RES+6
|
||||
PHP
|
||||
PLA
|
||||
STA RES+7
|
||||
CLC
|
||||
LDA #$89
|
||||
ADC #$76
|
||||
STA RES+8
|
||||
PHP
|
||||
PLA
|
||||
STA RES+9
|
||||
SEC
|
||||
LDA #$89
|
||||
ADC #$76
|
||||
STA RES+10
|
||||
PHP
|
||||
PLA
|
||||
STA RES+11
|
||||
CLC
|
||||
LDA #$80
|
||||
ADC #$F0
|
||||
STA RES+12
|
||||
PHP
|
||||
PLA
|
||||
STA RES+13
|
||||
CLC
|
||||
LDA #$80
|
||||
ADC #$FA
|
||||
STA RES+14
|
||||
PHP
|
||||
PLA
|
||||
STA RES+15
|
||||
CLC
|
||||
LDA #$2F
|
||||
ADC #$4F
|
||||
STA RES+16
|
||||
PHP
|
||||
PLA
|
||||
STA RES+17
|
||||
SEC
|
||||
LDA #$6F
|
||||
ADC #$00
|
||||
STA RES+18
|
||||
PHP
|
||||
PLA
|
||||
STA RES+19
|
||||
BRK
|
||||
|
||||
*=$0300
|
||||
|
||||
.DS 20
|
||||
; ADC, test decimal mode.
|
||||
;
|
||||
; NV-BDIZC
|
||||
; ??1110??
|
||||
;
|
||||
; The results I got on Rockwell 6502 AP
|
||||
;
|
||||
; 00 + 00 and C=0 gives 00 and N=0 V=0 Z=1 C=0 (3A)
|
||||
; 79 + 00 and C=1 gives 80 and N=1 V=1 Z=0 C=0 (F8)
|
||||
; 24 + 56 and C=0 gives 80 and N=1 V=1 Z=0 C=0 (F8)
|
||||
; 93 + 82 and C=0 gives 75 and N=0 V=1 Z=0 C=1 (79)
|
||||
; 89 + 76 and C=0 gives 65 and N=0 V=0 Z=0 C=1 (39)
|
||||
; 89 + 76 and C=1 gives 66 and N=0 V=0 Z=0 C=1 (39)
|
||||
; 80 + f0 and C=0 gives d0 and N=1 V=1 Z=0 C=1 (F9)
|
||||
; 80 + fa and C=0 gives e0 and N=1 V=0 Z=0 C=1 (B9)
|
||||
; 2f + 4f and C=0 gives 74 and N=0 V=0 Z=0 C=0 (38)
|
||||
; 6f + 00 and C=1 gives 76 and N=0 V=0 Z=0 C=0 (38)
|
||||
|
||||
RES=$0300
|
||||
|
||||
*=$0200
|
||||
|
||||
SED
|
||||
CLC
|
||||
LDA #$00
|
||||
ADC #$00
|
||||
STA RES
|
||||
PHP
|
||||
PLA
|
||||
STA RES+1
|
||||
SEC
|
||||
LDA #$79
|
||||
ADC #$00
|
||||
STA RES+2
|
||||
PHP
|
||||
PLA
|
||||
STA RES+3
|
||||
CLC
|
||||
LDA #$24
|
||||
ADC #$56
|
||||
STA RES+4
|
||||
PHP
|
||||
PLA
|
||||
STA RES+5
|
||||
CLC
|
||||
LDA #$93
|
||||
ADC #$82
|
||||
STA RES+6
|
||||
PHP
|
||||
PLA
|
||||
STA RES+7
|
||||
CLC
|
||||
LDA #$89
|
||||
ADC #$76
|
||||
STA RES+8
|
||||
PHP
|
||||
PLA
|
||||
STA RES+9
|
||||
SEC
|
||||
LDA #$89
|
||||
ADC #$76
|
||||
STA RES+10
|
||||
PHP
|
||||
PLA
|
||||
STA RES+11
|
||||
CLC
|
||||
LDA #$80
|
||||
ADC #$F0
|
||||
STA RES+12
|
||||
PHP
|
||||
PLA
|
||||
STA RES+13
|
||||
CLC
|
||||
LDA #$80
|
||||
ADC #$FA
|
||||
STA RES+14
|
||||
PHP
|
||||
PLA
|
||||
STA RES+15
|
||||
CLC
|
||||
LDA #$2F
|
||||
ADC #$4F
|
||||
STA RES+16
|
||||
PHP
|
||||
PLA
|
||||
STA RES+17
|
||||
SEC
|
||||
LDA #$6F
|
||||
ADC #$00
|
||||
STA RES+18
|
||||
PHP
|
||||
PLA
|
||||
STA RES+19
|
||||
BRK
|
||||
|
||||
*=$0300
|
||||
|
||||
.DS 20
|
||||
|
||||
|
|
@ -1,36 +1,36 @@
|
|||
; Test ADC BCD mode.
|
||||
ORG
|
||||
$0200
|
||||
$F8 $18 $A9 $00 $69 $00 $8D $00
|
||||
$03 $08 $68 $8D $01 $03 $38 $A9
|
||||
$79 $69 $00 $8D $02 $03 $08 $68
|
||||
$8D $03 $03 $18 $A9 $24 $69 $56
|
||||
$8D $04 $03 $08 $68 $8D $05 $03
|
||||
$18 $A9 $93 $69 $82 $8D $06 $03
|
||||
$08 $68 $8D $07 $03 $18 $A9 $89
|
||||
$69 $76 $8D $08 $03 $08 $68 $8D
|
||||
$09 $03 $38 $A9 $89 $69 $76 $8D
|
||||
$0A $03 $08 $68 $8D $0B $03 $18
|
||||
$A9 $80 $69 $F0 $8D $0C $03 $08
|
||||
$68 $8D $0D $03 $18 $A9 $80 $69
|
||||
$FA $8D $0E $03 $08 $68 $8D $0F
|
||||
$03 $18 $A9 $2F $69 $4F $8D $10
|
||||
$03 $08 $68 $8D $11 $03 $38 $A9
|
||||
$6F $69 $00 $8D $12 $03 $08 $68
|
||||
$8D $13 $03 $00 $00 $00 $00 $00
|
||||
$00 $00 $00 $00 $00 $00 $00 $00
|
||||
$00 $00 $00 $00 $00 $00 $00 $00
|
||||
$00 $00 $00 $00 $00 $00 $00 $00
|
||||
$00 $00 $00 $00 $00 $00 $00 $00
|
||||
$00 $00 $00 $00 $00 $00 $00 $00
|
||||
$00 $00 $00 $00 $00 $00 $00 $00
|
||||
$00 $00 $00 $00 $00 $00 $00 $00
|
||||
$00 $00 $00 $00 $00 $00 $00 $00
|
||||
$00 $00 $00 $00 $00 $00 $00 $00
|
||||
$00 $00 $00 $00 $00 $00 $00 $00
|
||||
$00 $00 $00 $00 $00 $00 $00 $00
|
||||
$00 $00 $00 $00 $00 $00 $00 $00
|
||||
$00 $00 $00 $00 $00 $00 $00 $00
|
||||
$00 $00 $00 $00 $00 $00 $00 $00
|
||||
$00 $00 $00 $00 $00 $00 $00 $00
|
||||
|
||||
; Test ADC BCD mode.
|
||||
ORG
|
||||
$0200
|
||||
$F8 $18 $A9 $00 $69 $00 $8D $00
|
||||
$03 $08 $68 $8D $01 $03 $38 $A9
|
||||
$79 $69 $00 $8D $02 $03 $08 $68
|
||||
$8D $03 $03 $18 $A9 $24 $69 $56
|
||||
$8D $04 $03 $08 $68 $8D $05 $03
|
||||
$18 $A9 $93 $69 $82 $8D $06 $03
|
||||
$08 $68 $8D $07 $03 $18 $A9 $89
|
||||
$69 $76 $8D $08 $03 $08 $68 $8D
|
||||
$09 $03 $38 $A9 $89 $69 $76 $8D
|
||||
$0A $03 $08 $68 $8D $0B $03 $18
|
||||
$A9 $80 $69 $F0 $8D $0C $03 $08
|
||||
$68 $8D $0D $03 $18 $A9 $80 $69
|
||||
$FA $8D $0E $03 $08 $68 $8D $0F
|
||||
$03 $18 $A9 $2F $69 $4F $8D $10
|
||||
$03 $08 $68 $8D $11 $03 $38 $A9
|
||||
$6F $69 $00 $8D $12 $03 $08 $68
|
||||
$8D $13 $03 $00 $00 $00 $00 $00
|
||||
$00 $00 $00 $00 $00 $00 $00 $00
|
||||
$00 $00 $00 $00 $00 $00 $00 $00
|
||||
$00 $00 $00 $00 $00 $00 $00 $00
|
||||
$00 $00 $00 $00 $00 $00 $00 $00
|
||||
$00 $00 $00 $00 $00 $00 $00 $00
|
||||
$00 $00 $00 $00 $00 $00 $00 $00
|
||||
$00 $00 $00 $00 $00 $00 $00 $00
|
||||
$00 $00 $00 $00 $00 $00 $00 $00
|
||||
$00 $00 $00 $00 $00 $00 $00 $00
|
||||
$00 $00 $00 $00 $00 $00 $00 $00
|
||||
$00 $00 $00 $00 $00 $00 $00 $00
|
||||
$00 $00 $00 $00 $00 $00 $00 $00
|
||||
$00 $00 $00 $00 $00 $00 $00 $00
|
||||
$00 $00 $00 $00 $00 $00 $00 $00
|
||||
$00 $00 $00 $00 $00 $00 $00 $00
|
||||
|
||||
|
|
|
|||
168
t_sbc_bcd_01.65s
168
t_sbc_bcd_01.65s
|
|
@ -1,85 +1,85 @@
|
|||
; SBC, test decimal mode.
|
||||
;
|
||||
; NV-BDIZC
|
||||
; ??1110??
|
||||
;
|
||||
; Expected results (I got on Rockwell 6502 AP):
|
||||
; 00 - 00 and C=0 gives 99 and N=1 V=0 Z=0 C=0 (B8)
|
||||
; 00 - 00 and C=1 gives 00 and N=0 V=0 Z=1 C=1 (3B)
|
||||
; 00 - 01 and C=1 gives 99 and N=1 V=0 Z=0 C=0 (B8)
|
||||
; 0a - 00 and C=1 gives 0a and N=0 V=0 Z=0 C=1 (39)
|
||||
; 0b - 00 and C=0 gives 0a and N=0 V=0 Z=0 C=1 (39)
|
||||
; 9a - 00 and C=1 gives 9a and N=1 V=0 Z=0 C=1 (B9)
|
||||
; 9b - 00 and C=0 gives 9a and N=1 V=0 Z=0 C=1 (B9)
|
||||
;
|
||||
|
||||
*=$0200
|
||||
|
||||
SED
|
||||
CLC
|
||||
LDA #$00
|
||||
SBC #$00
|
||||
STA SBT1A
|
||||
PHP
|
||||
PLA
|
||||
STA SBT1F
|
||||
SEC
|
||||
LDA #$00
|
||||
SBC #$00
|
||||
STA SBT2A
|
||||
PHP
|
||||
PLA
|
||||
STA SBT2F
|
||||
SEC
|
||||
LDA #$00
|
||||
SBC #$01
|
||||
STA SBT3A
|
||||
PHP
|
||||
PLA
|
||||
STA SBT3F
|
||||
SEC
|
||||
LDA #$0A
|
||||
SBC #$00
|
||||
STA SBT4A
|
||||
PHP
|
||||
PLA
|
||||
STA SBT4F
|
||||
CLC
|
||||
LDA #$0B
|
||||
SBC #$00
|
||||
STA SBT5A
|
||||
PHP
|
||||
PLA
|
||||
STA SBT5F
|
||||
SEC
|
||||
LDA #$9A
|
||||
SBC #$00
|
||||
STA SBT6A
|
||||
PHP
|
||||
PLA
|
||||
STA SBT6F
|
||||
CLC
|
||||
LDA #$9B
|
||||
SBC #$00
|
||||
STA SBT7A
|
||||
PHP
|
||||
PLA
|
||||
STA SBT7F
|
||||
BRK
|
||||
|
||||
*=$0300
|
||||
|
||||
SBT1A: .DB 0
|
||||
SBT1F: .DB 0
|
||||
SBT2A: .DB 0
|
||||
SBT2F: .DB 0
|
||||
SBT3A: .DB 0
|
||||
SBT3F: .DB 0
|
||||
SBT4A: .DB 0
|
||||
SBT4F: .DB 0
|
||||
SBT5A: .DB 0
|
||||
SBT5F: .DB 0
|
||||
SBT6A: .DB 0
|
||||
SBT6F: .DB 0
|
||||
SBT7A: .DB 0
|
||||
; SBC, test decimal mode.
|
||||
;
|
||||
; NV-BDIZC
|
||||
; ??1110??
|
||||
;
|
||||
; Expected results (I got on Rockwell 6502 AP):
|
||||
; 00 - 00 and C=0 gives 99 and N=1 V=0 Z=0 C=0 (B8)
|
||||
; 00 - 00 and C=1 gives 00 and N=0 V=0 Z=1 C=1 (3B)
|
||||
; 00 - 01 and C=1 gives 99 and N=1 V=0 Z=0 C=0 (B8)
|
||||
; 0a - 00 and C=1 gives 0a and N=0 V=0 Z=0 C=1 (39)
|
||||
; 0b - 00 and C=0 gives 0a and N=0 V=0 Z=0 C=1 (39)
|
||||
; 9a - 00 and C=1 gives 9a and N=1 V=0 Z=0 C=1 (B9)
|
||||
; 9b - 00 and C=0 gives 9a and N=1 V=0 Z=0 C=1 (B9)
|
||||
;
|
||||
|
||||
*=$0200
|
||||
|
||||
SED
|
||||
CLC
|
||||
LDA #$00
|
||||
SBC #$00
|
||||
STA SBT1A
|
||||
PHP
|
||||
PLA
|
||||
STA SBT1F
|
||||
SEC
|
||||
LDA #$00
|
||||
SBC #$00
|
||||
STA SBT2A
|
||||
PHP
|
||||
PLA
|
||||
STA SBT2F
|
||||
SEC
|
||||
LDA #$00
|
||||
SBC #$01
|
||||
STA SBT3A
|
||||
PHP
|
||||
PLA
|
||||
STA SBT3F
|
||||
SEC
|
||||
LDA #$0A
|
||||
SBC #$00
|
||||
STA SBT4A
|
||||
PHP
|
||||
PLA
|
||||
STA SBT4F
|
||||
CLC
|
||||
LDA #$0B
|
||||
SBC #$00
|
||||
STA SBT5A
|
||||
PHP
|
||||
PLA
|
||||
STA SBT5F
|
||||
SEC
|
||||
LDA #$9A
|
||||
SBC #$00
|
||||
STA SBT6A
|
||||
PHP
|
||||
PLA
|
||||
STA SBT6F
|
||||
CLC
|
||||
LDA #$9B
|
||||
SBC #$00
|
||||
STA SBT7A
|
||||
PHP
|
||||
PLA
|
||||
STA SBT7F
|
||||
BRK
|
||||
|
||||
*=$0300
|
||||
|
||||
SBT1A: .DB 0
|
||||
SBT1F: .DB 0
|
||||
SBT2A: .DB 0
|
||||
SBT2F: .DB 0
|
||||
SBT3A: .DB 0
|
||||
SBT3F: .DB 0
|
||||
SBT4A: .DB 0
|
||||
SBT4F: .DB 0
|
||||
SBT5A: .DB 0
|
||||
SBT5F: .DB 0
|
||||
SBT6A: .DB 0
|
||||
SBT6F: .DB 0
|
||||
SBT7A: .DB 0
|
||||
SBT7F: .DB 0
|
||||
|
|
@ -1,36 +1,36 @@
|
|||
; Test BCD mode.
|
||||
ORG
|
||||
$0200
|
||||
$F8 $18 $A9 $00 $E9 $00 $8D $00
|
||||
$03 $08 $68 $8D $01 $03 $38 $A9
|
||||
$00 $E9 $00 $8D $02 $03 $08 $68
|
||||
$8D $03 $03 $38 $A9 $00 $E9 $01
|
||||
$8D $04 $03 $08 $68 $8D $05 $03
|
||||
$38 $A9 $0A $E9 $00 $8D $06 $03
|
||||
$08 $68 $8D $07 $03 $18 $A9 $0B
|
||||
$E9 $00 $8D $08 $03 $08 $68 $8D
|
||||
$09 $03 $38 $A9 $9A $E9 $00 $8D
|
||||
$0A $03 $08 $68 $8D $0B $03 $18
|
||||
$A9 $9B $E9 $00 $8D $0C $03 $08
|
||||
$68 $8D $0D $03 $00 $00 $00 $00
|
||||
$00 $00 $00 $00 $00 $00 $00 $00
|
||||
$00 $00 $00 $00 $00 $00 $00 $00
|
||||
$00 $00 $00 $00 $00 $00 $00 $00
|
||||
$00 $00 $00 $00 $00 $00 $00 $00
|
||||
$00 $00 $00 $00 $00 $00 $00 $00
|
||||
$00 $00 $00 $00 $00 $00 $00 $00
|
||||
$00 $00 $00 $00 $00 $00 $00 $00
|
||||
$00 $00 $00 $00 $00 $00 $00 $00
|
||||
$00 $00 $00 $00 $00 $00 $00 $00
|
||||
$00 $00 $00 $00 $00 $00 $00 $00
|
||||
$00 $00 $00 $00 $00 $00 $00 $00
|
||||
$00 $00 $00 $00 $00 $00 $00 $00
|
||||
$00 $00 $00 $00 $00 $00 $00 $00
|
||||
$00 $00 $00 $00 $00 $00 $00 $00
|
||||
$00 $00 $00 $00 $00 $00 $00 $00
|
||||
$00 $00 $00 $00 $00 $00 $00 $00
|
||||
$00 $00 $00 $00 $00 $00 $00 $00
|
||||
$00 $00 $00 $00 $00 $00 $00 $00
|
||||
$00 $00 $00 $00 $00 $00 $00 $00
|
||||
$00 $00 $00 $00 $00 $00 $00 $00
|
||||
|
||||
; Test BCD mode.
|
||||
ORG
|
||||
$0200
|
||||
$F8 $18 $A9 $00 $E9 $00 $8D $00
|
||||
$03 $08 $68 $8D $01 $03 $38 $A9
|
||||
$00 $E9 $00 $8D $02 $03 $08 $68
|
||||
$8D $03 $03 $38 $A9 $00 $E9 $01
|
||||
$8D $04 $03 $08 $68 $8D $05 $03
|
||||
$38 $A9 $0A $E9 $00 $8D $06 $03
|
||||
$08 $68 $8D $07 $03 $18 $A9 $0B
|
||||
$E9 $00 $8D $08 $03 $08 $68 $8D
|
||||
$09 $03 $38 $A9 $9A $E9 $00 $8D
|
||||
$0A $03 $08 $68 $8D $0B $03 $18
|
||||
$A9 $9B $E9 $00 $8D $0C $03 $08
|
||||
$68 $8D $0D $03 $00 $00 $00 $00
|
||||
$00 $00 $00 $00 $00 $00 $00 $00
|
||||
$00 $00 $00 $00 $00 $00 $00 $00
|
||||
$00 $00 $00 $00 $00 $00 $00 $00
|
||||
$00 $00 $00 $00 $00 $00 $00 $00
|
||||
$00 $00 $00 $00 $00 $00 $00 $00
|
||||
$00 $00 $00 $00 $00 $00 $00 $00
|
||||
$00 $00 $00 $00 $00 $00 $00 $00
|
||||
$00 $00 $00 $00 $00 $00 $00 $00
|
||||
$00 $00 $00 $00 $00 $00 $00 $00
|
||||
$00 $00 $00 $00 $00 $00 $00 $00
|
||||
$00 $00 $00 $00 $00 $00 $00 $00
|
||||
$00 $00 $00 $00 $00 $00 $00 $00
|
||||
$00 $00 $00 $00 $00 $00 $00 $00
|
||||
$00 $00 $00 $00 $00 $00 $00 $00
|
||||
$00 $00 $00 $00 $00 $00 $00 $00
|
||||
$00 $00 $00 $00 $00 $00 $00 $00
|
||||
$00 $00 $00 $00 $00 $00 $00 $00
|
||||
$00 $00 $00 $00 $00 $00 $00 $00
|
||||
$00 $00 $00 $00 $00 $00 $00 $00
|
||||
$00 $00 $00 $00 $00 $00 $00 $00
|
||||
|
||||
|
|
|
|||
|
|
@ -0,0 +1,109 @@
|
|||
; Created with BIN2HEX (C) Marek Karcz 2016. All rights reserved.
|
||||
; 03/09/16 20:30:42
|
||||
ADDR
|
||||
$4000
|
||||
ORG
|
||||
$0000
|
||||
ORG
|
||||
$4000
|
||||
$a9 $00 $8d $10 $02 $a9 $55 $8d $00 $02 $a9 $aa $8d $01 $02 $a9
|
||||
$ff $8d $02 $02 $a9 $6e $8d $03 $02 $a9 $42 $8d $04 $02 $a9 $33
|
||||
$8d $05 $02 $a9 $9d $8d $06 $02 $a9 $7f $8d $07 $02 $a9 $a5 $8d
|
||||
$08 $02 $a9 $1f $8d $09 $02 $a9 $ce $8d $0a $02 $a9 $29 $8d $0b
|
||||
$02 $a9 $42 $8d $0c $02 $a9 $6c $8d $0d $02 $a9 $42 $8d $0e $02
|
||||
$a9 $55 $a2 $2a $a0 $73 $85 $81 $a9 $01 $85 $61 $a9 $7e $a5 $81
|
||||
$8d $10 $09 $a9 $7e $ad $10 $09 $95 $56 $a9 $7e $b5 $56 $84 $60
|
||||
$91 $60 $a9 $7e $b1 $60 $9d $ff $07 $a9 $7e $bd $ff $07 $99 $ff
|
||||
$07 $a9 $7e $b9 $ff $07 $81 $36 $a9 $7e $a1 $36 $86 $50 $a6 $60
|
||||
$a4 $50 $8e $13 $09 $a2 $22 $ae $13 $09 $8c $14 $09 $a0 $99 $ac
|
||||
$14 $09 $94 $2d $96 $77 $a0 $99 $b4 $2d $a2 $22 $b6 $77 $a0 $99
|
||||
$bc $a0 $08 $a2 $22 $be $a1 $08 $9d $00 $02 $ad $2a $02 $cd $00
|
||||
$02 $f0 $03 $4c $c0 $45 $a9 $fe $8d $10 $02 $a9 $55 $29 $53 $09
|
||||
$38 $49 $11 $85 $99 $a9 $b9 $85 $10 $a9 $e7 $85 $11 $a9 $39 $85
|
||||
$12 $a5 $99 $25 $10 $05 $11 $45 $12 $a2 $10 $85 $99 $a9 $bc $85
|
||||
$20 $a9 $31 $85 $21 $a9 $17 $85 $22 $a5 $99 $35 $10 $15 $11 $55
|
||||
$12 $85 $99 $a9 $6f $8d $10 $01 $a9 $3c $8d $11 $01 $a9 $27 $8d
|
||||
$12 $01 $a5 $99 $2d $10 $01 $0d $11 $01 $4d $12 $01 $85 $99 $a9
|
||||
$8a $8d $20 $01 $a9 $47 $8d $21 $01 $a9 $8f $8d $22 $01 $a5 $99
|
||||
$3d $10 $01 $1d $11 $01 $5d $12 $01 $a0 $20 $85 $99 $a9 $73 $8d
|
||||
$30 $01 $a9 $2a $8d $31 $01 $a9 $f1 $8d $32 $01 $a5 $99 $39 $10
|
||||
$01 $19 $11 $01 $59 $12 $01 $85 $99 $a9 $70 $85 $30 $a9 $01 $85
|
||||
$31 $a9 $71 $85 $32 $a9 $01 $85 $33 $a9 $72 $85 $34 $a9 $01 $85
|
||||
$35 $a9 $c5 $8d $70 $01 $a9 $7c $8d $71 $01 $a9 $a1 $8d $72 $01
|
||||
$a5 $99 $21 $20 $01 $22 $41 $24 $85 $99 $a9 $60 $85 $40 $a9 $01
|
||||
$85 $41 $a9 $61 $85 $42 $a9 $01 $85 $43 $a9 $62 $85 $44 $a9 $01
|
||||
$85 $45 $a9 $37 $8d $50 $02 $a9 $23 $8d $51 $02 $a9 $9d $8d $52
|
||||
$02 $a5 $99 $a0 $f0 $31 $40 $11 $42 $51 $44 $85 $a9 $a5 $a9 $cd
|
||||
$01 $02 $f0 $08 $a9 $01 $8d $10 $02 $4c $c0 $45 $a9 $ff $a2 $00
|
||||
$85 $90 $e6 $90 $e6 $90 $a5 $90 $a6 $90 $95 $90 $f6 $90 $b5 $90
|
||||
$a6 $91 $9d $90 $01 $ee $92 $01 $bd $90 $01 $ae $92 $01 $9d $90
|
||||
$01 $fe $90 $01 $bd $90 $01 $ae $93 $01 $9d $70 $01 $de $70 $01
|
||||
$bd $70 $01 $ae $74 $01 $9d $70 $01 $ce $73 $01 $bd $70 $01 $ae
|
||||
$73 $01 $95 $70 $d6 $70 $b5 $70 $a6 $72 $95 $70 $c6 $71 $c6 $71
|
||||
$a5 $71 $cd $02 $02 $f0 $08 $a9 $02 $8d $10 $02 $4c $c0 $45 $a9
|
||||
$4b $4a $0a $85 $50 $06 $50 $06 $50 $46 $50 $a5 $50 $a6 $50 $09
|
||||
$c9 $85 $60 $16 $4c $56 $4c $56 $4c $b5 $4c $a6 $60 $09 $41 $8d
|
||||
$2e $01 $5e $00 $01 $5e $00 $01 $1e $00 $01 $bd $00 $01 $ae $2e
|
||||
$01 $09 $81 $9d $00 $01 $4e $36 $01 $4e $36 $01 $0e $36 $01 $bd
|
||||
$00 $01 $2a $2a $6a $85 $70 $a6 $70 $09 $03 $95 $0c $26 $c0 $66
|
||||
$c0 $66 $c0 $b5 $0c $a6 $c0 $85 $d0 $36 $75 $36 $75 $76 $75 $a5
|
||||
$d0 $a6 $d0 $9d $00 $01 $2e $b7 $01 $2e $b7 $01 $2e $b7 $01 $6e
|
||||
$b7 $01 $bd $00 $01 $ae $b7 $01 $8d $dd $01 $3e $00 $01 $7e $00
|
||||
$01 $7e $00 $01 $ad $dd $01 $cd $03 $02 $f0 $08 $a9 $03 $8d $10
|
||||
$02 $4c $c0 $45 $a9 $e8 $85 $20 $a9 $42 $85 $21 $a9 $00 $09 $03
|
||||
$4c $d5 $42 $09 $ff $09 $30 $20 $e1 $42 $09 $42 $6c $20 $00 $09
|
||||
$ff $85 $30 $a6 $30 $a9 $00 $60 $95 $0d $a5 $40 $cd $04 $02 $f0
|
||||
$08 $a9 $04 $8d $10 $02 $4c $c0 $45 $a9 $35 $aa $ca $ca $e8 $8a
|
||||
$a8 $88 $88 $c8 $98 $aa $a9 $20 $9a $a2 $10 $ba $8a $85 $40 $a5
|
||||
$40 $cd $05 $02 $f0 $08 $a9 $05 $8d $10 $02 $4c $c0 $45 $2a $a9
|
||||
$6a $85 $50 $a9 $6b $85 $51 $a9 $a1 $85 $60 $a9 $a2 $85 $61 $a9
|
||||
$ff $69 $ff $69 $ff $e9 $ae $85 $40 $a6 $40 $75 $00 $f5 $01 $65
|
||||
$60 $e5 $61 $8d $20 $01 $a9 $4d $8d $21 $01 $a9 $23 $6d $20 $01
|
||||
$ed $21 $01 $85 $f0 $a6 $f0 $a9 $64 $8d $24 $01 $a9 $62 $8d $25
|
||||
$01 $a9 $26 $7d $00 $01 $fd $01 $01 $85 $f1 $a4 $f1 $a9 $e5 $8d
|
||||
$28 $01 $a9 $e9 $8d $29 $01 $a9 $34 $79 $00 $01 $f9 $01 $01 $85
|
||||
$f2 $a6 $f2 $a9 $20 $85 $70 $a9 $01 $85 $71 $a9 $24 $85 $72 $a9
|
||||
$01 $85 $73 $61 $41 $e1 $3f $85 $f3 $a4 $f3 $a9 $da $85 $80 $a9
|
||||
$00 $85 $81 $a9 $dc $85 $82 $a9 $00 $85 $83 $a9 $aa $71 $80 $f1
|
||||
$82 $85 $30 $a5 $30 $cd $06 $02 $f0 $08 $a9 $06 $8d $10 $02 $4c
|
||||
$c0 $45 $a9 $00 $85 $34 $a9 $ff $8d $30 $01 $a9 $99 $8d $9d $01
|
||||
$a9 $db $8d $99 $01 $a9 $2f $85 $32 $a9 $32 $85 $4f $a9 $30 $85
|
||||
$33 $a9 $70 $85 $af $a9 $18 $85 $30 $c9 $18 $f0 $02 $29 $00 $09
|
||||
$01 $c5 $30 $d0 $02 $29 $00 $a2 $00 $cd $30 $01 $f0 $04 $85 $40
|
||||
$a6 $40 $d5 $27 $d0 $06 $09 $84 $85 $41 $a6 $41 $29 $db $dd $00
|
||||
$01 $f0 $02 $29 $00 $85 $42 $a4 $42 $29 $00 $d9 $00 $01 $d0 $02
|
||||
$09 $0f $85 $43 $a6 $43 $09 $24 $c1 $40 $f0 $02 $09 $7f $85 $44
|
||||
$a4 $44 $49 $0f $d1 $33 $d0 $04 $a5 $44 $85 $15 $a5 $15 $cd $07
|
||||
$02 $f0 $08 $a9 $07 $8d $10 $02 $4c $c0 $45 $a9 $a5 $85 $20 $8d
|
||||
$20 $01 $a9 $5a $85 $21 $a2 $a5 $e0 $a5 $f0 $02 $a2 $01 $e4 $20
|
||||
$f0 $02 $a2 $02 $ec $20 $01 $f0 $02 $a2 $03 $86 $30 $a4 $30 $c0
|
||||
$a5 $f0 $02 $a0 $04 $c4 $20 $f0 $02 $a0 $05 $cc $20 $01 $f0 $02
|
||||
$a0 $06 $84 $31 $a5 $31 $24 $20 $d0 $02 $a9 $07 $2c $20 $01 $d0
|
||||
$02 $a9 $08 $24 $21 $d0 $02 $85 $42 $a5 $42 $cd $08 $02 $f0 $08
|
||||
$a9 $08 $8d $10 $02 $4c $c0 $45 $a9 $54 $85 $32 $a9 $b3 $85 $a1
|
||||
$a9 $87 $85 $43 $a2 $a1 $10 $02 $a2 $32 $b4 $00 $10 $04 $a9 $05
|
||||
$a6 $a1 $30 $02 $e9 $03 $30 $02 $a9 $41 $49 $30 $85 $32 $75 $00
|
||||
$50 $02 $a9 $03 $85 $54 $b6 $00 $75 $51 $50 $02 $a9 $e5 $75 $40
|
||||
$70 $05 $99 $01 $00 $65 $55 $70 $02 $a9 $00 $69 $f0 $90 $04 $85
|
||||
$60 $65 $43 $90 $02 $a9 $ff $65 $54 $b0 $04 $69 $87 $a6 $60 $b0
|
||||
$02 $a9 $00 $95 $73 $a5 $80 $cd $09 $02 $f0 $08 $a9 $09 $8d $10
|
||||
$02 $4c $c0 $45 $69 $00 $a9 $99 $69 $87 $18 $ea $90 $04 $69 $60
|
||||
$69 $93 $38 $ea $90 $01 $b8 $50 $02 $a9 $00 $69 $ad $ea $85 $30
|
||||
$a5 $30 $cd $0a $02 $f0 $08 $a9 $0a $8d $10 $02 $4c $c0 $45 $69
|
||||
$01 $a9 $27 $69 $01 $38 $08 $18 $28 $69 $00 $48 $a9 $00 $68 $85
|
||||
$30 $a5 $30 $cd $0b $02 $f0 $08 $a9 $0b $8d $10 $02 $4c $c0 $45
|
||||
$18 $a9 $42 $90 $04 $85 $33 $b0 $0a $a9 $45 $48 $a9 $61 $48 $38
|
||||
$08 $18 $40 $a5 $33 $cd $0c $02 $f0 $08 $a9 $0c $8d $10 $02 $4c
|
||||
$c0 $45 $69 $01 $78 $f8 $08 $68 $85 $20 $58 $d8 $08 $68 $65 $20
|
||||
$85 $21 $a5 $21 $cd $0d $02 $f0 $08 $a9 $0d $8d $10 $02 $4c $c0
|
||||
$45 $a9 $41 $85 $60 $e6 $60 $a5 $60 $cd $0e $02 $f0 $08 $a9 $0e
|
||||
$8d $10 $02 $4c $c0 $45 $a9 $fe $cd $10 $02 $d0 $03 $ee $10 $02
|
||||
$00 $00 $a2 $ff $9a $60 $00 $00 $00 $00 $00 $00 $00 $00 $00 $00
|
||||
ORG
|
||||
$ff00
|
||||
$40 $00 $00 $00 $00 $00 $00 $00 $00 $00 $00 $00 $00 $00 $00 $00
|
||||
ORG
|
||||
$fff0
|
||||
$00 $00 $00 $00 $00 $00 $00 $00 $00 $00 $00 $ff $00 $ff $00 $ff
|
||||
EXEC
|
||||
$4000
|
||||
|
|
@ -0,0 +1,398 @@
|
|||
ADDR
|
||||
$0CF0
|
||||
; Program disassembly from $0400 to $1000 2/20/2016
|
||||
; Tiny Basic port for VM6502 emulator.
|
||||
; Exec address: $0CF0
|
||||
ORG
|
||||
$0400
|
||||
; Enable ROM and IO emulation.
|
||||
ENROM
|
||||
ENIO
|
||||
; Set char IO address
|
||||
IOADDR
|
||||
$E000
|
||||
; Code/Data
|
||||
$4C, $85, $04, $4C, $BD, $04, $4C, $2C
|
||||
$0F, $4C, $31, $0F, $EA, $18, $60, $5F
|
||||
$18, $80, $00, $20, $86, $C3, $90, $05
|
||||
$86, $C3, $91, $C2, $60, $B1, $C2, $A0
|
||||
$00, $60, $62, $05, $64, $05, $D8, $05
|
||||
$05, $06, $33, $06, $FD, $05, $9F, $07
|
||||
$42, $0B, $3F, $0B, $7A, $07, $FC, $08
|
||||
$95, $07, $9F, $07, $9F, $07, $BD, $0A
|
||||
$C1, $0A, $8A, $0A, $9B, $0A, $E9, $0A
|
||||
$61, $07, $51, $07, $41, $0A, $52, $0A
|
||||
$4F, $0A, $62, $0A, $E7, $09, $CD, $06
|
||||
$06, $07, $9F, $07, $15, $08, $A7, $07
|
||||
$B7, $06, $BF, $06, $83, $08, $A1, $06
|
||||
$9F, $07, $9F, $07, $A8, $08, $4F, $0B
|
||||
$4D, $0B, $07, $09, $AA, $04, $37, $07
|
||||
$BD, $04, $1B, $0B, $B1, $0A, $20, $41
|
||||
$54, $20, $80, $70, $0B, $A9, $00, $85
|
||||
$20, $85, $22, $A9, $1C, $85, $21, $85
|
||||
$23, $A0, $01, $B1, $22, $AA, $49, $FF
|
||||
$91, $22, $D1, $22, $08, $8A, $91, $22
|
||||
$E6, $22, $D0, $02, $E6, $23, $28, $F0
|
||||
$EA, $88, $D8, $A5, $20, $6D, $13, $04
|
||||
$85, $24, $98, $65, $21, $85, $25, $98
|
||||
$91, $20, $C8, $91, $20, $A5, $22, $85
|
||||
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$4E, $C4, $E0, $2D, $98, $4C, $49, $53
|
||||
$D4, $EC, $24, $00, $00, $00, $00, $0A
|
||||
$80, $1F, $24, $93, $23, $1D, $30, $BC
|
||||
$E1, $50, $80, $AC, $59, $85, $52, $55
|
||||
$CE, $38, $0A, $86, $43, $4C, $45, $41
|
||||
$D2, $2B, $84, $52, $45, $CD, $1D, $A0
|
||||
$80, $BD, $38, $14, $85, $AD, $30, $D3
|
||||
$17, $64, $81, $AB, $30, $D3, $85, $AB
|
||||
$30, $D3, $18, $5A, $85, $AD, $30, $D3
|
||||
$19, $54, $2F, $30, $E2, $85, $AA, $30
|
||||
$E2, $1A, $5A, $85, $AF, $30, $E2, $1B
|
||||
$54, $2F, $98, $52, $4E, $C4, $0A, $80
|
||||
$80, $12, $0A, $09, $29, $1A, $0A, $1A
|
||||
$85, $18, $13, $09, $80, $12, $01, $0B
|
||||
$31, $30, $61, $72, $0B, $04, $02, $03
|
||||
$05, $03, $1B, $1A, $19, $0B, $09, $06
|
||||
$0A, $00, $00, $1C, $17, $2F, $8F, $55
|
||||
$53, $D2, $80, $A8, $30, $BC, $31, $2A
|
||||
$31, $2A, $80, $A9, $2E, $2F, $A2, $12
|
||||
$2F, $C1, $2F, $80, $A8, $30, $BC, $80
|
||||
$A9, $2F, $83, $AC, $38, $BC, $0B, $2F
|
||||
$80, $A8, $52, $2F, $84, $BD, $09, $02
|
||||
$2F, $8E, $BC, $84, $BD, $09, $93, $2F
|
||||
$84, $BE, $09, $05, $2F, $09, $91, $2F
|
||||
$80, $BE, $84, $BD, $09, $06, $2F, $84
|
||||
$BC, $09, $95, $2F, $09, $04, $2F, $00
|
||||
$00, $00, $00, $00, $00, $00, $00, $00
|
||||
$00, $00, $00, $00, $00, $00, $00, $00
|
||||
$00, $00, $00, $00, $00, $00, $00, $00
|
||||
$00, $00, $00, $00, $00, $00, $00, $00
|
||||
$00, $00, $00, $00, $00, $00, $00, $00
|
||||
$20, $0D, $0F, $A0, $00, $20, $1D, $0F
|
||||
$20, $2C, $0F, $C9, $43, $D0, $03, $4C
|
||||
$85, $04, $C9, $57, $D0, $03, $4C, $BD
|
||||
$04, $A2, $2F, $20, $1D, $0F, $4C, $F8
|
||||
$0C, $00, $00, $00, $00, $00, $00, $00
|
||||
$00, $00, $00, $00, $00, $00, $00, $00
|
||||
$00, $00, $00, $00, $00, $00, $00, $00
|
||||
$00, $00, $00, $00, $00, $00, $00, $00
|
||||
$00, $00, $00, $00, $00, $00, $00, $00
|
||||
$00, $00, $00, $00, $00, $00, $00, $00
|
||||
$00, $00, $00, $00, $00, $00, $00, $00
|
||||
$00, $00, $00, $00, $00, $00, $00, $00
|
||||
$00, $00, $00, $00, $00, $00, $00, $00
|
||||
$00, $00, $00, $00, $00, $00, $00, $00
|
||||
$00, $00, $00, $00, $00, $00, $00, $00
|
||||
$00, $00, $00, $00, $00, $00, $00, $00
|
||||
$00, $00, $00, $00, $00, $00, $00, $00
|
||||
$00, $00, $00, $00, $00, $00, $00, $00
|
||||
$00, $00, $00, $00, $00, $00, $00, $00
|
||||
$00, $00, $00, $00, $00, $00, $00, $00
|
||||
$00, $00, $00, $00, $00, $00, $00, $00
|
||||
$00, $00, $00, $00, $00, $00, $00, $00
|
||||
$00, $00, $00, $00, $00, $00, $00, $00
|
||||
$00, $00, $00, $00, $00, $00, $00, $00
|
||||
$00, $00, $00, $00, $00, $00, $00, $00
|
||||
$00, $00, $00, $00, $00, $00, $00, $00
|
||||
$00, $00, $00, $00, $00, $00, $00, $00
|
||||
$00, $00, $00, $00, $00, $00, $00, $00
|
||||
$00, $00, $00, $00, $00, $00, $00, $00
|
||||
$00, $00, $00, $00, $00, $00, $00, $00
|
||||
$00, $00, $00, $00, $00, $00, $00, $00
|
||||
$00, $00, $00, $00, $00, $00, $00, $00
|
||||
$00, $00, $00, $00, $00, $00, $00, $00
|
||||
$00, $00, $00, $00, $00, $00, $00, $00
|
||||
$4D, $4B, $48, $42, $43, $2D, $38, $2D
|
||||
$52, $32, $20, $54, $49, $4E, $59, $20
|
||||
$42, $41, $53, $49, $43, $20, $36, $35
|
||||
$30, $32, $20, $50, $4F, $52, $54, $0D
|
||||
$0A, $56, $65, $72, $73, $69, $6F, $6E
|
||||
$3A, $20, $31, $2E, $30, $2E, $33, $2C
|
||||
$20, $32, $2F, $32, $30, $2F, $32, $30
|
||||
$31, $36, $0D, $0A, $28, $4E, $4F, $54
|
||||
$45, $3A, $20, $55, $73, $65, $20, $55
|
||||
$50, $50, $45, $52, $20, $43, $41, $53
|
||||
$45, $2E, $29, $0D, $0A, $42, $6F, $6F
|
||||
$74, $20, $28, $5B, $43, $5D, $6F, $6C
|
||||
$64, $2F, $5B, $57, $5D, $61, $72, $6D
|
||||
$29, $3F, $20, $07, $FF, $00, $00, $00
|
||||
$00, $00, $00, $00, $00, $00, $00, $00
|
||||
$00, $00, $00, $00, $00, $00, $00, $00
|
||||
$00, $00, $00, $00, $00, $00, $00, $00
|
||||
$00, $00, $00, $00, $00, $00, $00, $00
|
||||
$00, $00, $00, $00, $00, $00, $00, $00
|
||||
$00, $00, $00, $00, $00, $00, $00, $00
|
||||
$00, $00, $00, $00, $00, $00, $00, $00
|
||||
$00, $00, $00, $00, $00, $00, $00, $00
|
||||
$00, $00, $00, $00, $00, $00, $00, $00
|
||||
$00, $00, $00, $00, $00, $00, $00, $00
|
||||
$00, $00, $00, $00, $00, $00, $00, $00
|
||||
$00, $00, $00, $00, $00, $00, $00, $00
|
||||
$00, $00, $00, $00, $00, $00, $00, $00
|
||||
$00, $00, $00, $00, $00, $00, $00, $00
|
||||
$00, $00, $00, $00, $00, $00, $00, $00
|
||||
$00, $00, $00, $00, $00, $00, $00, $00
|
||||
$00, $00, $00, $00, $00, $00, $00, $00
|
||||
$00, $00, $00, $00, $00, $00, $00, $00
|
||||
$86, $C3, $B1, $C2, $48, $C8, $B1, $C2
|
||||
$AA, $68, $A8, $8A, $60, $A2, $19, $A9
|
||||
$0D, $20, $31, $0F, $A9, $0A, $20, $31
|
||||
$0F, $CA, $D0, $FA, $60, $B9, $00, $0E
|
||||
$C9, $FF, $F0, $07, $20, $31, $0F, $C8
|
||||
$4C, $1D, $0F, $60, $AD, $00, $E0, $F0
|
||||
$FB, $85, $FE, $C9, $FF, $F0, $1E, $C9
|
||||
$00, $F0, $1A, $C9, $91, $F0, $16, $C9
|
||||
$93, $F0, $12, $C9, $80, $F0, $0E, $4C
|
||||
$50, $0F, $20, $F0, $FF, $A5, $FE, $60
|
||||
$A5, $FE, $8D, $00, $E0, $60, $00, $00
|
||||
$00, $00, $00, $00, $00, $00, $00, $00
|
||||
$00, $00, $00, $00, $00, $00, $00, $00
|
||||
$00, $00, $00, $00, $00, $00, $00, $00
|
||||
$00, $00, $00, $00, $00, $00, $00, $00
|
||||
$00, $00, $00, $00, $00, $00, $00, $00
|
||||
$00, $00, $00, $00, $00, $00, $00, $00
|
||||
$00, $00, $00, $00, $00, $00, $00, $00
|
||||
$00, $00, $00, $00, $00, $00, $00, $00
|
||||
$00, $00, $00, $00, $00, $00, $00, $00
|
||||
$00, $00, $00, $00, $00, $00, $00, $00
|
||||
$00, $00, $00, $00, $00, $00, $00, $00
|
||||
$00, $00, $00, $00, $00, $00, $00, $00
|
||||
$00, $00, $00, $00, $00, $00, $00, $00
|
||||
$00, $00, $00, $00, $00, $00, $00, $00
|
||||
$00, $00, $00, $00, $00, $00, $00, $00
|
||||
$00, $00, $00, $00, $00, $00, $00, $00
|
||||
$00, $00, $00, $00, $00, $00, $00, $00
|
||||
$00, $00, $00, $00, $00, $00, $00, $00
|
||||
$00, $00, $00, $00, $00, $00, $00, $00
|
||||
$00, $00, $00, $00, $00, $00, $00, $00
|
||||
$00, $00, $00, $00, $00, $00, $00, $00
|
||||
|
|
@ -0,0 +1,423 @@
|
|||
ADDR
|
||||
$0CF0
|
||||
; Program disassembly from $0400 to $1000 2/20/2016
|
||||
; Tiny Basic port for VM6502 emulator.
|
||||
; Exec address: $0CF0
|
||||
;------------------------------------------------------
|
||||
ORG
|
||||
$0400
|
||||
;------------------------------------------------------
|
||||
; Character I/O emulation address.
|
||||
;------------------------------------------------------
|
||||
IOADDR
|
||||
$E000
|
||||
;------------------------------------------------------
|
||||
; Enable character I/O emulation.
|
||||
;------------------------------------------------------
|
||||
ENIO
|
||||
;------------------------------------------------------
|
||||
; Begin of ROM.
|
||||
;------------------------------------------------------
|
||||
ROMBEGIN
|
||||
$DF00
|
||||
;------------------------------------------------------
|
||||
; End of ROM.
|
||||
;------------------------------------------------------
|
||||
ROMEND
|
||||
$FFFF
|
||||
;------------------------------------------------------
|
||||
; Enable ROM (protected read-only memory) emulation.
|
||||
;------------------------------------------------------
|
||||
ENROM
|
||||
;------------------------------------------------------
|
||||
; Auto-execute code from address.
|
||||
;------------------------------------------------------
|
||||
EXEC
|
||||
$0CF0
|
||||
;------------------------------------------------------
|
||||
; Code/Data
|
||||
;------------------------------------------------------
|
||||
$4C, $85, $04, $4C, $BD, $04, $4C, $2C
|
||||
$0F, $4C, $31, $0F, $EA, $18, $60, $5F
|
||||
$18, $80, $00, $20, $86, $C3, $90, $05
|
||||
$86, $C3, $91, $C2, $60, $B1, $C2, $A0
|
||||
$00, $60, $62, $05, $64, $05, $D8, $05
|
||||
$05, $06, $33, $06, $FD, $05, $9F, $07
|
||||
$42, $0B, $3F, $0B, $7A, $07, $FC, $08
|
||||
$95, $07, $9F, $07, $9F, $07, $BD, $0A
|
||||
$C1, $0A, $8A, $0A, $9B, $0A, $E9, $0A
|
||||
$61, $07, $51, $07, $41, $0A, $52, $0A
|
||||
$4F, $0A, $62, $0A, $E7, $09, $CD, $06
|
||||
$06, $07, $9F, $07, $15, $08, $A7, $07
|
||||
$B7, $06, $BF, $06, $83, $08, $A1, $06
|
||||
$9F, $07, $9F, $07, $A8, $08, $4F, $0B
|
||||
$4D, $0B, $07, $09, $AA, $04, $37, $07
|
||||
$BD, $04, $1B, $0B, $B1, $0A, $20, $41
|
||||
$54, $20, $80, $70, $0B, $A9, $00, $85
|
||||
$20, $85, $22, $A9, $1C, $85, $21, $85
|
||||
$23, $A0, $01, $B1, $22, $AA, $49, $FF
|
||||
$91, $22, $D1, $22, $08, $8A, $91, $22
|
||||
$E6, $22, $D0, $02, $E6, $23, $28, $F0
|
||||
$EA, $88, $D8, $A5, $20, $6D, $13, $04
|
||||
$85, $24, $98, $65, $21, $85, $25, $98
|
||||
$91, $20, $C8, $91, $20, $A5, $22, $85
|
||||
$C6, $85, $26, $A5, $23, $85, $C7, $85
|
||||
$27, $20, $87, $08, $AD, $83, $04, $85
|
||||
$2A, $AD, $84, $04, $85, $2B, $A9, $80
|
||||
$85, $C1, $A9, $30, $85, $C0, $A2, $00
|
||||
$86, $BE, $86, $C2, $CA, $9A, $D8, $20
|
||||
$F9, $06, $20, $F2, $04, $4C, $E6, $04
|
||||
$83, $65, $C9, $30, $B0, $7B, $C9, $08
|
||||
$90, $0C, $0A, $AA, $BD, $1F, $04, $48
|
||||
$BD, $1E, $04, $48, $08, $40, $65, $C1
|
||||
$AA, $B1, $C1, $48, $B5, $00, $91, $C1
|
||||
$68, $95, $00, $60, $20, $87, $08, $A9
|
||||
$21, $20, $09, $04, $A5, $2A, $38, $ED
|
||||
$83, $04, $AA, $A5, $2B, $ED, $84, $04
|
||||
$20, $A0, $07, $A5, $BE, $F0, $12, $A9
|
||||
$7E, $85, $2A, $A9, $20, $85, $2B, $20
|
||||
$A1, $06, $A6, $28, $A5, $29, $20, $A0
|
||||
$07, $A9, $07, $20, $09, $04, $20, $87
|
||||
$08, $A5, $26, $85, $C6, $A5, $27, $85
|
||||
$C7, $4C, $CC, $04, $A2, $7C, $E4, $C1
|
||||
$90, $BA, $A6, $C1, $E6, $C1, $E6, $C1
|
||||
$18, $60, $C6, $BD, $A5, $BD, $F0, $AC
|
||||
$A5, $BC, $85, $2A, $A5, $BD, $85, $2B
|
||||
$60, $C9, $40, $B0, $43, $48, $20, $F9
|
||||
$06, $6D, $83, $04, $85, $BC, $68, $48
|
||||
$29, $07, $6D, $84, $04, $85, $BD, $68
|
||||
$29, $08, $D0, $DC, $A5, $BC, $A6, $2A
|
||||
$85, $2A, $86, $BC, $A5, $BD, $A6, $2B
|
||||
$85, $2B, $86, $BD, $A5, $C6, $E9, $01
|
||||
$85, $C6, $B0, $02, $C6, $C7, $C5, $24
|
||||
$A5, $C7, $E5, $25, $90, $AA, $A5, $BC
|
||||
$91, $C6, $C8, $A5, $BD, $91, $C6, $60
|
||||
$48, $4A, $4A, $4A, $4A, $29, $0E, $AA
|
||||
$68, $C9, $60, $29, $1F, $B0, $02, $09
|
||||
$E0, $18, $F0, $07, $65, $2A, $85, $BC
|
||||
$98, $65, $2B, $85, $BD, $4C, $FC, $04
|
||||
$A5, $2C, $85, $B8, $A5, $2D, $85, $B9
|
||||
$20, $25, $06, $20, $14, $06, $51, $2A
|
||||
$AA, $20, $F9, $06, $8A, $F0, $F1, $0A
|
||||
$F0, $12, $A5, $B8, $85, $2C, $A5, $B9
|
||||
$85, $2D, $4C, $64, $05, $20, $25, $06
|
||||
$C9, $0D, $D0, $F6, $60, $20, $25, $06
|
||||
$C9, $5B, $B0, $EE, $C9, $41, $90, $EA
|
||||
$0A, $20, $87, $07, $A0, $00, $B1, $2C
|
||||
$E6, $2C, $D0, $02, $E6, $2D, $C9, $0D
|
||||
$18, $60, $20, $14, $06, $B1, $2C, $C9
|
||||
$20, $F0, $F7, $C9, $3A, $18, $10, $02
|
||||
$C9, $30, $60, $20, $25, $06, $90, $C2
|
||||
$84, $BC, $84, $BD, $A5, $BC, $A6, $BD
|
||||
$06, $BC, $26, $BD, $06, $BC, $26, $BD
|
||||
$18, $65, $BC, $85, $BC, $8A, $65, $BD
|
||||
$06, $BC, $2A, $85, $BD, $20, $14, $06
|
||||
$29, $0F, $65, $BC, $85, $BC, $98, $65
|
||||
$BD, $85, $BD, $20, $25, $06, $B0, $D4
|
||||
$4C, $80, $07, $20, $FC, $08, $A5, $BC
|
||||
$05, $BD, $F0, $48, $A5, $20, $85, $2C
|
||||
$A5, $21, $85, $2D, $20, $6D, $07, $F0
|
||||
$12, $A5, $28, $C5, $BC, $A5, $29, $E5
|
||||
$BD, $B0, $08, $20, $14, $06, $D0, $FB
|
||||
$4C, $7C, $06, $A5, $28, $45, $BC, $D0
|
||||
$04, $A5, $29, $45, $BD, $60, $20, $A6
|
||||
$06, $20, $F9, $06, $10, $F8, $E6, $BF
|
||||
$30, $03, $4C, $09, $04, $C6, $BF, $60
|
||||
$C9, $22, $F0, $FB, $20, $A6, $06, $20
|
||||
$14, $06, $D0, $F4, $4C, $14, $05, $A9
|
||||
$20, $20, $A6, $06, $A5, $BF, $29, $87
|
||||
$30, $E5, $D0, $F3, $60, $A2, $7B, $20
|
||||
$56, $05, $E6, $C1, $E6, $C1, $E6, $C1
|
||||
$38, $B5, $03, $F5, $00, $95, $00, $B5
|
||||
$04, $F5, $01, $50, $04, $49, $80, $09
|
||||
$01, $30, $0A, $D0, $04, $15, $00, $F0
|
||||
$02, $56, $02, $56, $02, $56, $02, $90
|
||||
$0C, $A0, $00, $B1, $2A, $E6, $2A, $D0
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|
||||
$45, $2E, $29, $0D, $0A, $42, $6F, $6F
|
||||
$74, $20, $28, $5B, $43, $5D, $6F, $6C
|
||||
$64, $2F, $5B, $57, $5D, $61, $72, $6D
|
||||
$29, $3F, $20, $07, $FF, $00, $00, $00
|
||||
$00, $00, $00, $00, $00, $00, $00, $00
|
||||
$00, $00, $00, $00, $00, $00, $00, $00
|
||||
$00, $00, $00, $00, $00, $00, $00, $00
|
||||
$00, $00, $00, $00, $00, $00, $00, $00
|
||||
$00, $00, $00, $00, $00, $00, $00, $00
|
||||
$00, $00, $00, $00, $00, $00, $00, $00
|
||||
$00, $00, $00, $00, $00, $00, $00, $00
|
||||
$00, $00, $00, $00, $00, $00, $00, $00
|
||||
$00, $00, $00, $00, $00, $00, $00, $00
|
||||
$00, $00, $00, $00, $00, $00, $00, $00
|
||||
$00, $00, $00, $00, $00, $00, $00, $00
|
||||
$00, $00, $00, $00, $00, $00, $00, $00
|
||||
$00, $00, $00, $00, $00, $00, $00, $00
|
||||
$00, $00, $00, $00, $00, $00, $00, $00
|
||||
$00, $00, $00, $00, $00, $00, $00, $00
|
||||
$00, $00, $00, $00, $00, $00, $00, $00
|
||||
$00, $00, $00, $00, $00, $00, $00, $00
|
||||
$00, $00, $00, $00, $00, $00, $00, $00
|
||||
$86, $C3, $B1, $C2, $48, $C8, $B1, $C2
|
||||
$AA, $68, $A8, $8A, $60, $A2, $19, $A9
|
||||
$0D, $20, $31, $0F, $A9, $0A, $20, $31
|
||||
$0F, $CA, $D0, $FA, $60, $B9, $00, $0E
|
||||
$C9, $FF, $F0, $07, $20, $31, $0F, $C8
|
||||
$4C, $1D, $0F, $60, $AD, $00, $E0, $F0
|
||||
$FB, $85, $FE, $C9, $FF, $F0, $1E, $C9
|
||||
$00, $F0, $1A, $C9, $91, $F0, $16, $C9
|
||||
$93, $F0, $12, $C9, $80, $F0, $0E, $4C
|
||||
$50, $0F, $20, $F0, $FF, $A5, $FE, $60
|
||||
$A5, $FE, $8D, $00, $E0, $60, $00, $00
|
||||
$00, $00, $00, $00, $00, $00, $00, $00
|
||||
$00, $00, $00, $00, $00, $00, $00, $00
|
||||
$00, $00, $00, $00, $00, $00, $00, $00
|
||||
$00, $00, $00, $00, $00, $00, $00, $00
|
||||
$00, $00, $00, $00, $00, $00, $00, $00
|
||||
$00, $00, $00, $00, $00, $00, $00, $00
|
||||
$00, $00, $00, $00, $00, $00, $00, $00
|
||||
$00, $00, $00, $00, $00, $00, $00, $00
|
||||
$00, $00, $00, $00, $00, $00, $00, $00
|
||||
$00, $00, $00, $00, $00, $00, $00, $00
|
||||
$00, $00, $00, $00, $00, $00, $00, $00
|
||||
$00, $00, $00, $00, $00, $00, $00, $00
|
||||
$00, $00, $00, $00, $00, $00, $00, $00
|
||||
$00, $00, $00, $00, $00, $00, $00, $00
|
||||
$00, $00, $00, $00, $00, $00, $00, $00
|
||||
$00, $00, $00, $00, $00, $00, $00, $00
|
||||
$00, $00, $00, $00, $00, $00, $00, $00
|
||||
$00, $00, $00, $00, $00, $00, $00, $00
|
||||
$00, $00, $00, $00, $00, $00, $00, $00
|
||||
$00, $00, $00, $00, $00, $00, $00, $00
|
||||
$00, $00, $00, $00, $00, $00, $00, $00
|
||||
|
|
@ -1,50 +1,50 @@
|
|||
; Basic test of char I/O emulation
|
||||
|
||||
.ORG $0200
|
||||
|
||||
CHRGET = $E000
|
||||
PUTCH = $E000
|
||||
TXTBUF = $0400
|
||||
CR = $0D
|
||||
NL = $0A
|
||||
|
||||
START: LDX #$00
|
||||
PR1: LDA PROMPT,X ;print prompt
|
||||
BEQ L0
|
||||
STA PUTCH
|
||||
INX
|
||||
BNE PR1
|
||||
L0: LDX #$00
|
||||
GETTXT: LDA CHRGET ;get text from input
|
||||
BEQ GETTXT
|
||||
CMP #CR
|
||||
BEQ L1
|
||||
CMP #NL
|
||||
BEQ L1
|
||||
STA PUTCH ;echo char
|
||||
STA TXTBUF,X ;store char
|
||||
INX
|
||||
BNE GETTXT
|
||||
L1: LDA #NL ; add line break
|
||||
STA TXTBUF,X
|
||||
STA PUTCH
|
||||
INX
|
||||
LDA #CR
|
||||
STA TXTBUF,X
|
||||
STA PUTCH
|
||||
INX
|
||||
LDA #$00 ; add null
|
||||
STA TXTBUF,X
|
||||
TAX
|
||||
PRINT: LDA TXTBUF,X ; print to output
|
||||
BEQ L2
|
||||
STA PUTCH
|
||||
INX
|
||||
BNE PRINT
|
||||
L2: BRK
|
||||
NOP
|
||||
JMP START
|
||||
PROMPT: .DB "Enter text:",0
|
||||
|
||||
|
||||
; Basic test of char I/O emulation
|
||||
|
||||
.ORG $0200
|
||||
|
||||
CHRGET = $E000
|
||||
PUTCH = $E000
|
||||
TXTBUF = $0400
|
||||
CR = $0D
|
||||
NL = $0A
|
||||
|
||||
START: LDX #$00
|
||||
PR1: LDA PROMPT,X ;print prompt
|
||||
BEQ L0
|
||||
STA PUTCH
|
||||
INX
|
||||
BNE PR1
|
||||
L0: LDX #$00
|
||||
GETTXT: LDA CHRGET ;get text from input
|
||||
BEQ GETTXT
|
||||
CMP #CR
|
||||
BEQ L1
|
||||
CMP #NL
|
||||
BEQ L1
|
||||
STA PUTCH ;echo char
|
||||
STA TXTBUF,X ;store char
|
||||
INX
|
||||
BNE GETTXT
|
||||
L1: LDA #NL ; add line break
|
||||
STA TXTBUF,X
|
||||
STA PUTCH
|
||||
INX
|
||||
LDA #CR
|
||||
STA TXTBUF,X
|
||||
STA PUTCH
|
||||
INX
|
||||
LDA #$00 ; add null
|
||||
STA TXTBUF,X
|
||||
TAX
|
||||
PRINT: LDA TXTBUF,X ; print to output
|
||||
BEQ L2
|
||||
STA PUTCH
|
||||
INX
|
||||
BNE PRINT
|
||||
L2: BRK
|
||||
NOP
|
||||
JMP START
|
||||
PROMPT: .DB "Enter text:",0
|
||||
|
||||
|
||||
|
||||
|
|
@ -1,15 +1,15 @@
|
|||
; I/O test for MKBASIC VM.
|
||||
ORG
|
||||
$0200
|
||||
$A2 $00 $BD $4E $02 $F0 $06 $8D
|
||||
$00 $E0 $E8 $D0 $F5 $A2 $00 $AD
|
||||
$00 $E0 $F0 $FB $C9 $0D $F0 $0D
|
||||
$C9 $0A $F0 $09 $8D $00 $E0 $9D
|
||||
$00 $04 $E8 $D0 $EA $A9 $0A $9D
|
||||
$00 $04 $8D $00 $E0 $E8 $A9 $0D
|
||||
$9D $00 $04 $8D $00 $E0 $E8 $A9
|
||||
$00 $9D $00 $04 $AA $BD $00 $04
|
||||
$F0 $06 $8D $00 $E0 $E8 $D0 $F5
|
||||
$00 $00 $EA $4C $00 $02 $45 $6E
|
||||
$74 $65 $72 $20 $74 $65 $78 $74
|
||||
$3A $00 $00 $00 $00 $00 $00 $00
|
||||
; I/O test for MKBASIC VM.
|
||||
ORG
|
||||
$0200
|
||||
$A2 $00 $BD $4E $02 $F0 $06 $8D
|
||||
$00 $E0 $E8 $D0 $F5 $A2 $00 $AD
|
||||
$00 $E0 $F0 $FB $C9 $0D $F0 $0D
|
||||
$C9 $0A $F0 $09 $8D $00 $E0 $9D
|
||||
$00 $04 $E8 $D0 $EA $A9 $0A $9D
|
||||
$00 $04 $8D $00 $E0 $E8 $A9 $0D
|
||||
$9D $00 $04 $8D $00 $E0 $E8 $A9
|
||||
$00 $9D $00 $04 $AA $BD $00 $04
|
||||
$F0 $06 $8D $00 $E0 $E8 $D0 $F5
|
||||
$00 $00 $EA $4C $00 $02 $45 $6E
|
||||
$74 $65 $72 $20 $74 $65 $78 $74
|
||||
$3A $00 $00 $00 $00 $00 $00 $00
|
||||
|
|
|
|||
1879
testall.asm
1879
testall.asm
File diff suppressed because it is too large
Load Diff
390
testall.dat
390
testall.dat
|
|
@ -1,195 +1,195 @@
|
|||
; Test 6502 emulation.
|
||||
ORG
|
||||
$4000
|
||||
$A9 $00 $8D $10 $02 $A9 $55 $8D
|
||||
$00 $02 $A9 $AA $8D $01 $02 $A9
|
||||
$FF $8D $02 $02 $A9 $6E $8D $03
|
||||
$02 $A9 $42 $8D $04 $02 $A9 $33
|
||||
$8D $05 $02 $A9 $9D $8D $06 $02
|
||||
$A9 $7F $8D $07 $02 $A9 $A5 $8D
|
||||
$08 $02 $A9 $1F $8D $09 $02 $A9
|
||||
$CE $8D $0A $02 $A9 $29 $8D $0B
|
||||
$02 $A9 $42 $8D $0C $02 $A9 $6C
|
||||
$8D $0D $02 $A9 $42 $8D $0E $02
|
||||
$A9 $55 $A2 $2A $A0 $73 $85 $81
|
||||
$A9 $01 $85 $61 $A9 $7E $A5 $81
|
||||
$8D $10 $09 $A9 $7E $AD $10 $09
|
||||
$95 $56 $A9 $7E $B5 $56 $84 $60
|
||||
$91 $60 $A9 $7E $B1 $60 $9D $FF
|
||||
$07 $A9 $7E $BD $FF $07 $99 $FF
|
||||
$07 $A9 $7E $B9 $FF $07 $81 $36
|
||||
$A9 $7E $A1 $36 $86 $50 $A6 $60
|
||||
$A4 $50 $8E $13 $09 $A2 $22 $AE
|
||||
$13 $09 $8C $14 $09 $A0 $99 $AC
|
||||
$14 $09 $94 $2D $96 $77 $A0 $99
|
||||
$B4 $2D $A2 $22 $B6 $77 $A0 $99
|
||||
$BC $A0 $08 $A2 $22 $BE $A1 $08
|
||||
$9D $00 $02 $AD $2A $02 $CD $00
|
||||
$02 $F0 $03 $4C $C0 $45 $A9 $FE
|
||||
$8D $10 $02 $A9 $55 $29 $53 $09
|
||||
$38 $49 $11 $85 $99 $A9 $B9 $85
|
||||
$10 $A9 $E7 $85 $11 $A9 $39 $85
|
||||
$12 $A5 $99 $25 $10 $05 $11 $45
|
||||
$12 $A2 $10 $85 $99 $A9 $BC $85
|
||||
$20 $A9 $31 $85 $21 $A9 $17 $85
|
||||
$22 $A5 $99 $35 $10 $15 $11 $55
|
||||
$12 $85 $99 $A9 $6F $8D $10 $01
|
||||
$A9 $3C $8D $11 $01 $A9 $27 $8D
|
||||
$12 $01 $A5 $99 $2D $10 $01 $0D
|
||||
$11 $01 $4D $12 $01 $85 $99 $A9
|
||||
$8A $8D $20 $01 $A9 $47 $8D $21
|
||||
$01 $A9 $8F $8D $22 $01 $A5 $99
|
||||
$3D $10 $01 $1D $11 $01 $5D $12
|
||||
$01 $A0 $20 $85 $99 $A9 $73 $8D
|
||||
$30 $01 $A9 $2A $8D $31 $01 $A9
|
||||
$F1 $8D $32 $01 $A5 $99 $39 $10
|
||||
$01 $19 $11 $01 $59 $12 $01 $85
|
||||
$99 $A9 $70 $85 $30 $A9 $01 $85
|
||||
$31 $A9 $71 $85 $32 $A9 $01 $85
|
||||
$33 $A9 $72 $85 $34 $A9 $01 $85
|
||||
$35 $A9 $C5 $8D $70 $01 $A9 $7C
|
||||
$8D $71 $01 $A9 $A1 $8D $72 $01
|
||||
$A5 $99 $21 $20 $01 $22 $41 $24
|
||||
$85 $99 $A9 $60 $85 $40 $A9 $01
|
||||
$85 $41 $A9 $61 $85 $42 $A9 $01
|
||||
$85 $43 $A9 $62 $85 $44 $A9 $01
|
||||
$85 $45 $A9 $37 $8D $50 $02 $A9
|
||||
$23 $8D $51 $02 $A9 $9D $8D $52
|
||||
$02 $A5 $99 $A0 $F0 $31 $40 $11
|
||||
$42 $51 $44 $85 $A9 $A5 $A9 $CD
|
||||
$01 $02 $F0 $08 $A9 $01 $8D $10
|
||||
$02 $4C $C0 $45 $A9 $FF $A2 $00
|
||||
$85 $90 $E6 $90 $E6 $90 $A5 $90
|
||||
$A6 $90 $95 $90 $F6 $90 $B5 $90
|
||||
$A6 $91 $9D $90 $01 $EE $92 $01
|
||||
$BD $90 $01 $AE $92 $01 $9D $90
|
||||
$01 $FE $90 $01 $BD $90 $01 $AE
|
||||
$93 $01 $9D $70 $01 $DE $70 $01
|
||||
$BD $70 $01 $AE $74 $01 $9D $70
|
||||
$01 $CE $73 $01 $BD $70 $01 $AE
|
||||
$73 $01 $95 $70 $D6 $70 $B5 $70
|
||||
$A6 $72 $95 $70 $C6 $71 $C6 $71
|
||||
$A5 $71 $CD $02 $02 $F0 $08 $A9
|
||||
$02 $8D $10 $02 $4C $C0 $45 $A9
|
||||
$4B $4A $0A $85 $50 $06 $50 $06
|
||||
$50 $46 $50 $A5 $50 $A6 $50 $09
|
||||
$C9 $85 $60 $16 $4C $56 $4C $56
|
||||
$4C $B5 $4C $A6 $60 $09 $41 $8D
|
||||
$2E $01 $5E $00 $01 $5E $00 $01
|
||||
$1E $00 $01 $BD $00 $01 $AE $2E
|
||||
$01 $09 $81 $9D $00 $01 $4E $36
|
||||
$01 $4E $36 $01 $0E $36 $01 $BD
|
||||
$00 $01 $2A $2A $6A $85 $70 $A6
|
||||
$70 $09 $03 $95 $0C $26 $C0 $66
|
||||
$C0 $66 $C0 $B5 $0C $A6 $C0 $85
|
||||
$D0 $36 $75 $36 $75 $76 $75 $A5
|
||||
$D0 $A6 $D0 $9D $00 $01 $2E $B7
|
||||
$01 $2E $B7 $01 $2E $B7 $01 $6E
|
||||
$B7 $01 $BD $00 $01 $AE $B7 $01
|
||||
$8D $DD $01 $3E $00 $01 $7E $00
|
||||
$01 $7E $00 $01 $AD $DD $01 $CD
|
||||
$03 $02 $F0 $08 $A9 $03 $8D $10
|
||||
$02 $4C $C0 $45 $A9 $E8 $85 $20
|
||||
$A9 $42 $85 $21 $A9 $00 $09 $03
|
||||
$4C $D5 $42 $09 $FF $09 $30 $20
|
||||
$E1 $42 $09 $42 $6C $20 $00 $09
|
||||
$FF $85 $30 $A6 $30 $A9 $00 $60
|
||||
$95 $0D $A5 $40 $CD $04 $02 $F0
|
||||
$08 $A9 $04 $8D $10 $02 $4C $C0
|
||||
$45 $A9 $35 $AA $CA $CA $E8 $8A
|
||||
$A8 $88 $88 $C8 $98 $AA $A9 $20
|
||||
$9A $A2 $10 $BA $8A $85 $40 $A5
|
||||
$40 $CD $05 $02 $F0 $08 $A9 $05
|
||||
$8D $10 $02 $4C $C0 $45 $2A $A9
|
||||
$6A $85 $50 $A9 $6B $85 $51 $A9
|
||||
$A1 $85 $60 $A9 $A2 $85 $61 $A9
|
||||
$FF $69 $FF $69 $FF $E9 $AE $85
|
||||
$40 $A6 $40 $75 $00 $F5 $01 $65
|
||||
$60 $E5 $61 $8D $20 $01 $A9 $4D
|
||||
$8D $21 $01 $A9 $23 $6D $20 $01
|
||||
$ED $21 $01 $85 $F0 $A6 $F0 $A9
|
||||
$64 $8D $24 $01 $A9 $62 $8D $25
|
||||
$01 $A9 $26 $7D $00 $01 $FD $01
|
||||
$01 $85 $F1 $A4 $F1 $A9 $E5 $8D
|
||||
$28 $01 $A9 $E9 $8D $29 $01 $A9
|
||||
$34 $79 $00 $01 $F9 $01 $01 $85
|
||||
$F2 $A6 $F2 $A9 $20 $85 $70 $A9
|
||||
$01 $85 $71 $A9 $24 $85 $72 $A9
|
||||
$01 $85 $73 $61 $41 $E1 $3F $85
|
||||
$F3 $A4 $F3 $A9 $DA $85 $80 $A9
|
||||
$00 $85 $81 $A9 $DC $85 $82 $A9
|
||||
$00 $85 $83 $A9 $AA $71 $80 $F1
|
||||
$82 $85 $30 $A5 $30 $CD $06 $02
|
||||
$F0 $08 $A9 $06 $8D $10 $02 $4C
|
||||
$C0 $45 $A9 $00 $85 $34 $A9 $FF
|
||||
$8D $30 $01 $A9 $99 $8D $9D $01
|
||||
$A9 $DB $8D $99 $01 $A9 $2F $85
|
||||
$32 $A9 $32 $85 $4F $A9 $30 $85
|
||||
$33 $A9 $70 $85 $AF $A9 $18 $85
|
||||
$30 $C9 $18 $F0 $02 $29 $00 $09
|
||||
$01 $C5 $30 $D0 $02 $29 $00 $A2
|
||||
$00 $CD $30 $01 $F0 $04 $85 $40
|
||||
$A6 $40 $D5 $27 $D0 $06 $09 $84
|
||||
$85 $41 $A6 $41 $29 $DB $DD $00
|
||||
$01 $F0 $02 $29 $00 $85 $42 $A4
|
||||
$42 $29 $00 $D9 $00 $01 $D0 $02
|
||||
$09 $0F $85 $43 $A6 $43 $09 $24
|
||||
$C1 $40 $F0 $02 $09 $7F $85 $44
|
||||
$A4 $44 $49 $0F $D1 $33 $D0 $04
|
||||
$A5 $44 $85 $15 $A5 $15 $CD $07
|
||||
$02 $F0 $08 $A9 $07 $8D $10 $02
|
||||
$4C $C0 $45 $A9 $A5 $85 $20 $8D
|
||||
$20 $01 $A9 $5A $85 $21 $A2 $A5
|
||||
$E0 $A5 $F0 $02 $A2 $01 $E4 $20
|
||||
$F0 $02 $A2 $02 $EC $20 $01 $F0
|
||||
$02 $A2 $03 $86 $30 $A4 $30 $C0
|
||||
$A5 $F0 $02 $A0 $04 $C4 $20 $F0
|
||||
$02 $A0 $05 $CC $20 $01 $F0 $02
|
||||
$A0 $06 $84 $31 $A5 $31 $24 $20
|
||||
$D0 $02 $A9 $07 $2C $20 $01 $D0
|
||||
$02 $A9 $08 $24 $21 $D0 $02 $85
|
||||
$42 $A5 $42 $CD $08 $02 $F0 $08
|
||||
$A9 $08 $8D $10 $02 $4C $C0 $45
|
||||
$A9 $54 $85 $32 $A9 $B3 $85 $A1
|
||||
$A9 $87 $85 $43 $A2 $A1 $10 $02
|
||||
$A2 $32 $B4 $00 $10 $04 $A9 $05
|
||||
$A6 $A1 $30 $02 $E9 $03 $30 $02
|
||||
$A9 $41 $49 $30 $85 $32 $75 $00
|
||||
$50 $02 $A9 $03 $85 $54 $B6 $00
|
||||
$75 $51 $50 $02 $A9 $E5 $75 $40
|
||||
$70 $05 $99 $01 $00 $65 $55 $70
|
||||
$02 $A9 $00 $69 $F0 $90 $04 $85
|
||||
$60 $65 $43 $90 $02 $A9 $FF $65
|
||||
$54 $B0 $04 $69 $87 $A6 $60 $B0
|
||||
$02 $A9 $00 $95 $73 $A5 $80 $CD
|
||||
$09 $02 $F0 $08 $A9 $09 $8D $10
|
||||
$02 $4C $C0 $45 $69 $00 $A9 $99
|
||||
$69 $87 $18 $EA $90 $04 $69 $60
|
||||
$69 $93 $38 $EA $90 $01 $B8 $50
|
||||
$02 $A9 $00 $69 $AD $EA $85 $30
|
||||
$A5 $30 $CD $0A $02 $F0 $08 $A9
|
||||
$0A $8D $10 $02 $4C $C0 $45 $69
|
||||
$01 $A9 $27 $69 $01 $38 $08 $18
|
||||
$28 $69 $00 $48 $A9 $00 $68 $85
|
||||
$30 $A5 $30 $CD $0B $02 $F0 $08
|
||||
$A9 $0B $8D $10 $02 $4C $C0 $45
|
||||
$18 $A9 $42 $90 $04 $85 $33 $B0
|
||||
$0A $A9 $45 $48 $A9 $61 $48 $38
|
||||
$08 $18 $40 $A5 $33 $CD $0C $02
|
||||
$F0 $08 $A9 $0C $8D $10 $02 $4C
|
||||
$C0 $45 $69 $01 $78 $F8 $08 $68
|
||||
$85 $20 $58 $D8 $08 $68 $65 $20
|
||||
$85 $21 $A5 $21 $CD $0D $02 $F0
|
||||
$08 $A9 $0D $8D $10 $02 $4C $C0
|
||||
$45 $A9 $41 $85 $60 $E6 $60 $A5
|
||||
$60 $CD $0E $02 $F0 $08 $A9 $0E
|
||||
$8D $10 $02 $4C $C0 $45 $A9 $FE
|
||||
$CD $10 $02 $D0 $03 $EE $10 $02
|
||||
$00 $00 $00 $00 $00 $00 $00 $00
|
||||
$00 $00 $00 $00 $00 $00 $00 $00
|
||||
$00 $00 $00 $00 $00 $00 $00 $00
|
||||
$00 $00 $00 $00 $00 $00 $00 $00
|
||||
$00 $00 $00 $00 $00 $00 $00 $00
|
||||
$00 $00 $00 $00 $00 $00 $00 $00
|
||||
$00 $00 $00 $00 $00 $00 $00 $00
|
||||
$00 $00 $00 $00 $00 $00 $00 $00
|
||||
; Test 6502 emulation.
|
||||
ORG
|
||||
$4000
|
||||
$A9 $00 $8D $10 $02 $A9 $55 $8D
|
||||
$00 $02 $A9 $AA $8D $01 $02 $A9
|
||||
$FF $8D $02 $02 $A9 $6E $8D $03
|
||||
$02 $A9 $42 $8D $04 $02 $A9 $33
|
||||
$8D $05 $02 $A9 $9D $8D $06 $02
|
||||
$A9 $7F $8D $07 $02 $A9 $A5 $8D
|
||||
$08 $02 $A9 $1F $8D $09 $02 $A9
|
||||
$CE $8D $0A $02 $A9 $29 $8D $0B
|
||||
$02 $A9 $42 $8D $0C $02 $A9 $6C
|
||||
$8D $0D $02 $A9 $42 $8D $0E $02
|
||||
$A9 $55 $A2 $2A $A0 $73 $85 $81
|
||||
$A9 $01 $85 $61 $A9 $7E $A5 $81
|
||||
$8D $10 $09 $A9 $7E $AD $10 $09
|
||||
$95 $56 $A9 $7E $B5 $56 $84 $60
|
||||
$91 $60 $A9 $7E $B1 $60 $9D $FF
|
||||
$07 $A9 $7E $BD $FF $07 $99 $FF
|
||||
$07 $A9 $7E $B9 $FF $07 $81 $36
|
||||
$A9 $7E $A1 $36 $86 $50 $A6 $60
|
||||
$A4 $50 $8E $13 $09 $A2 $22 $AE
|
||||
$13 $09 $8C $14 $09 $A0 $99 $AC
|
||||
$14 $09 $94 $2D $96 $77 $A0 $99
|
||||
$B4 $2D $A2 $22 $B6 $77 $A0 $99
|
||||
$BC $A0 $08 $A2 $22 $BE $A1 $08
|
||||
$9D $00 $02 $AD $2A $02 $CD $00
|
||||
$02 $F0 $03 $4C $C0 $45 $A9 $FE
|
||||
$8D $10 $02 $A9 $55 $29 $53 $09
|
||||
$38 $49 $11 $85 $99 $A9 $B9 $85
|
||||
$10 $A9 $E7 $85 $11 $A9 $39 $85
|
||||
$12 $A5 $99 $25 $10 $05 $11 $45
|
||||
$12 $A2 $10 $85 $99 $A9 $BC $85
|
||||
$20 $A9 $31 $85 $21 $A9 $17 $85
|
||||
$22 $A5 $99 $35 $10 $15 $11 $55
|
||||
$12 $85 $99 $A9 $6F $8D $10 $01
|
||||
$A9 $3C $8D $11 $01 $A9 $27 $8D
|
||||
$12 $01 $A5 $99 $2D $10 $01 $0D
|
||||
$11 $01 $4D $12 $01 $85 $99 $A9
|
||||
$8A $8D $20 $01 $A9 $47 $8D $21
|
||||
$01 $A9 $8F $8D $22 $01 $A5 $99
|
||||
$3D $10 $01 $1D $11 $01 $5D $12
|
||||
$01 $A0 $20 $85 $99 $A9 $73 $8D
|
||||
$30 $01 $A9 $2A $8D $31 $01 $A9
|
||||
$F1 $8D $32 $01 $A5 $99 $39 $10
|
||||
$01 $19 $11 $01 $59 $12 $01 $85
|
||||
$99 $A9 $70 $85 $30 $A9 $01 $85
|
||||
$31 $A9 $71 $85 $32 $A9 $01 $85
|
||||
$33 $A9 $72 $85 $34 $A9 $01 $85
|
||||
$35 $A9 $C5 $8D $70 $01 $A9 $7C
|
||||
$8D $71 $01 $A9 $A1 $8D $72 $01
|
||||
$A5 $99 $21 $20 $01 $22 $41 $24
|
||||
$85 $99 $A9 $60 $85 $40 $A9 $01
|
||||
$85 $41 $A9 $61 $85 $42 $A9 $01
|
||||
$85 $43 $A9 $62 $85 $44 $A9 $01
|
||||
$85 $45 $A9 $37 $8D $50 $02 $A9
|
||||
$23 $8D $51 $02 $A9 $9D $8D $52
|
||||
$02 $A5 $99 $A0 $F0 $31 $40 $11
|
||||
$42 $51 $44 $85 $A9 $A5 $A9 $CD
|
||||
$01 $02 $F0 $08 $A9 $01 $8D $10
|
||||
$02 $4C $C0 $45 $A9 $FF $A2 $00
|
||||
$85 $90 $E6 $90 $E6 $90 $A5 $90
|
||||
$A6 $90 $95 $90 $F6 $90 $B5 $90
|
||||
$A6 $91 $9D $90 $01 $EE $92 $01
|
||||
$BD $90 $01 $AE $92 $01 $9D $90
|
||||
$01 $FE $90 $01 $BD $90 $01 $AE
|
||||
$93 $01 $9D $70 $01 $DE $70 $01
|
||||
$BD $70 $01 $AE $74 $01 $9D $70
|
||||
$01 $CE $73 $01 $BD $70 $01 $AE
|
||||
$73 $01 $95 $70 $D6 $70 $B5 $70
|
||||
$A6 $72 $95 $70 $C6 $71 $C6 $71
|
||||
$A5 $71 $CD $02 $02 $F0 $08 $A9
|
||||
$02 $8D $10 $02 $4C $C0 $45 $A9
|
||||
$4B $4A $0A $85 $50 $06 $50 $06
|
||||
$50 $46 $50 $A5 $50 $A6 $50 $09
|
||||
$C9 $85 $60 $16 $4C $56 $4C $56
|
||||
$4C $B5 $4C $A6 $60 $09 $41 $8D
|
||||
$2E $01 $5E $00 $01 $5E $00 $01
|
||||
$1E $00 $01 $BD $00 $01 $AE $2E
|
||||
$01 $09 $81 $9D $00 $01 $4E $36
|
||||
$01 $4E $36 $01 $0E $36 $01 $BD
|
||||
$00 $01 $2A $2A $6A $85 $70 $A6
|
||||
$70 $09 $03 $95 $0C $26 $C0 $66
|
||||
$C0 $66 $C0 $B5 $0C $A6 $C0 $85
|
||||
$D0 $36 $75 $36 $75 $76 $75 $A5
|
||||
$D0 $A6 $D0 $9D $00 $01 $2E $B7
|
||||
$01 $2E $B7 $01 $2E $B7 $01 $6E
|
||||
$B7 $01 $BD $00 $01 $AE $B7 $01
|
||||
$8D $DD $01 $3E $00 $01 $7E $00
|
||||
$01 $7E $00 $01 $AD $DD $01 $CD
|
||||
$03 $02 $F0 $08 $A9 $03 $8D $10
|
||||
$02 $4C $C0 $45 $A9 $E8 $85 $20
|
||||
$A9 $42 $85 $21 $A9 $00 $09 $03
|
||||
$4C $D5 $42 $09 $FF $09 $30 $20
|
||||
$E1 $42 $09 $42 $6C $20 $00 $09
|
||||
$FF $85 $30 $A6 $30 $A9 $00 $60
|
||||
$95 $0D $A5 $40 $CD $04 $02 $F0
|
||||
$08 $A9 $04 $8D $10 $02 $4C $C0
|
||||
$45 $A9 $35 $AA $CA $CA $E8 $8A
|
||||
$A8 $88 $88 $C8 $98 $AA $A9 $20
|
||||
$9A $A2 $10 $BA $8A $85 $40 $A5
|
||||
$40 $CD $05 $02 $F0 $08 $A9 $05
|
||||
$8D $10 $02 $4C $C0 $45 $2A $A9
|
||||
$6A $85 $50 $A9 $6B $85 $51 $A9
|
||||
$A1 $85 $60 $A9 $A2 $85 $61 $A9
|
||||
$FF $69 $FF $69 $FF $E9 $AE $85
|
||||
$40 $A6 $40 $75 $00 $F5 $01 $65
|
||||
$60 $E5 $61 $8D $20 $01 $A9 $4D
|
||||
$8D $21 $01 $A9 $23 $6D $20 $01
|
||||
$ED $21 $01 $85 $F0 $A6 $F0 $A9
|
||||
$64 $8D $24 $01 $A9 $62 $8D $25
|
||||
$01 $A9 $26 $7D $00 $01 $FD $01
|
||||
$01 $85 $F1 $A4 $F1 $A9 $E5 $8D
|
||||
$28 $01 $A9 $E9 $8D $29 $01 $A9
|
||||
$34 $79 $00 $01 $F9 $01 $01 $85
|
||||
$F2 $A6 $F2 $A9 $20 $85 $70 $A9
|
||||
$01 $85 $71 $A9 $24 $85 $72 $A9
|
||||
$01 $85 $73 $61 $41 $E1 $3F $85
|
||||
$F3 $A4 $F3 $A9 $DA $85 $80 $A9
|
||||
$00 $85 $81 $A9 $DC $85 $82 $A9
|
||||
$00 $85 $83 $A9 $AA $71 $80 $F1
|
||||
$82 $85 $30 $A5 $30 $CD $06 $02
|
||||
$F0 $08 $A9 $06 $8D $10 $02 $4C
|
||||
$C0 $45 $A9 $00 $85 $34 $A9 $FF
|
||||
$8D $30 $01 $A9 $99 $8D $9D $01
|
||||
$A9 $DB $8D $99 $01 $A9 $2F $85
|
||||
$32 $A9 $32 $85 $4F $A9 $30 $85
|
||||
$33 $A9 $70 $85 $AF $A9 $18 $85
|
||||
$30 $C9 $18 $F0 $02 $29 $00 $09
|
||||
$01 $C5 $30 $D0 $02 $29 $00 $A2
|
||||
$00 $CD $30 $01 $F0 $04 $85 $40
|
||||
$A6 $40 $D5 $27 $D0 $06 $09 $84
|
||||
$85 $41 $A6 $41 $29 $DB $DD $00
|
||||
$01 $F0 $02 $29 $00 $85 $42 $A4
|
||||
$42 $29 $00 $D9 $00 $01 $D0 $02
|
||||
$09 $0F $85 $43 $A6 $43 $09 $24
|
||||
$C1 $40 $F0 $02 $09 $7F $85 $44
|
||||
$A4 $44 $49 $0F $D1 $33 $D0 $04
|
||||
$A5 $44 $85 $15 $A5 $15 $CD $07
|
||||
$02 $F0 $08 $A9 $07 $8D $10 $02
|
||||
$4C $C0 $45 $A9 $A5 $85 $20 $8D
|
||||
$20 $01 $A9 $5A $85 $21 $A2 $A5
|
||||
$E0 $A5 $F0 $02 $A2 $01 $E4 $20
|
||||
$F0 $02 $A2 $02 $EC $20 $01 $F0
|
||||
$02 $A2 $03 $86 $30 $A4 $30 $C0
|
||||
$A5 $F0 $02 $A0 $04 $C4 $20 $F0
|
||||
$02 $A0 $05 $CC $20 $01 $F0 $02
|
||||
$A0 $06 $84 $31 $A5 $31 $24 $20
|
||||
$D0 $02 $A9 $07 $2C $20 $01 $D0
|
||||
$02 $A9 $08 $24 $21 $D0 $02 $85
|
||||
$42 $A5 $42 $CD $08 $02 $F0 $08
|
||||
$A9 $08 $8D $10 $02 $4C $C0 $45
|
||||
$A9 $54 $85 $32 $A9 $B3 $85 $A1
|
||||
$A9 $87 $85 $43 $A2 $A1 $10 $02
|
||||
$A2 $32 $B4 $00 $10 $04 $A9 $05
|
||||
$A6 $A1 $30 $02 $E9 $03 $30 $02
|
||||
$A9 $41 $49 $30 $85 $32 $75 $00
|
||||
$50 $02 $A9 $03 $85 $54 $B6 $00
|
||||
$75 $51 $50 $02 $A9 $E5 $75 $40
|
||||
$70 $05 $99 $01 $00 $65 $55 $70
|
||||
$02 $A9 $00 $69 $F0 $90 $04 $85
|
||||
$60 $65 $43 $90 $02 $A9 $FF $65
|
||||
$54 $B0 $04 $69 $87 $A6 $60 $B0
|
||||
$02 $A9 $00 $95 $73 $A5 $80 $CD
|
||||
$09 $02 $F0 $08 $A9 $09 $8D $10
|
||||
$02 $4C $C0 $45 $69 $00 $A9 $99
|
||||
$69 $87 $18 $EA $90 $04 $69 $60
|
||||
$69 $93 $38 $EA $90 $01 $B8 $50
|
||||
$02 $A9 $00 $69 $AD $EA $85 $30
|
||||
$A5 $30 $CD $0A $02 $F0 $08 $A9
|
||||
$0A $8D $10 $02 $4C $C0 $45 $69
|
||||
$01 $A9 $27 $69 $01 $38 $08 $18
|
||||
$28 $69 $00 $48 $A9 $00 $68 $85
|
||||
$30 $A5 $30 $CD $0B $02 $F0 $08
|
||||
$A9 $0B $8D $10 $02 $4C $C0 $45
|
||||
$18 $A9 $42 $90 $04 $85 $33 $B0
|
||||
$0A $A9 $45 $48 $A9 $61 $48 $38
|
||||
$08 $18 $40 $A5 $33 $CD $0C $02
|
||||
$F0 $08 $A9 $0C $8D $10 $02 $4C
|
||||
$C0 $45 $69 $01 $78 $F8 $08 $68
|
||||
$85 $20 $58 $D8 $08 $68 $65 $20
|
||||
$85 $21 $A5 $21 $CD $0D $02 $F0
|
||||
$08 $A9 $0D $8D $10 $02 $4C $C0
|
||||
$45 $A9 $41 $85 $60 $E6 $60 $A5
|
||||
$60 $CD $0E $02 $F0 $08 $A9 $0E
|
||||
$8D $10 $02 $4C $C0 $45 $A9 $FE
|
||||
$CD $10 $02 $D0 $03 $EE $10 $02
|
||||
$00 $00 $00 $00 $00 $00 $00 $00
|
||||
$00 $00 $00 $00 $00 $00 $00 $00
|
||||
$00 $00 $00 $00 $00 $00 $00 $00
|
||||
$00 $00 $00 $00 $00 $00 $00 $00
|
||||
$00 $00 $00 $00 $00 $00 $00 $00
|
||||
$00 $00 $00 $00 $00 $00 $00 $00
|
||||
$00 $00 $00 $00 $00 $00 $00 $00
|
||||
$00 $00 $00 $00 $00 $00 $00 $00
|
||||
|
|
|
|||
|
|
@ -0,0 +1,960 @@
|
|||
ca65 V2.13.2 - (C) Copyright 1998-2005 Ullrich von Bassewitz
|
||||
Main file : testall.asm
|
||||
Current file: testall.asm
|
||||
|
||||
000000r 1 ; Testing 6502 opcodes.
|
||||
000000r 1 ; Copied and adapted from AllSuiteA.asm from project hmc-6502:
|
||||
000000r 1 ; https://code.google.com/archive/p/hmc-6502/
|
||||
000000r 1 ; EXPECTED FINAL RESULTS: $0210 = FF
|
||||
000000r 1 ; (any other number will be the test that failed)
|
||||
000000r 1 ; To build with cl65:
|
||||
000000r 1 ; cl65 -C testall_cl65.cfg -l --start-addr 16384 -t none -o tall.bin testall.asm
|
||||
000000r 1 ; then load to simulator from debug console with 'L B TALL.BIN'
|
||||
000000r 1 ; and execute with 'X 4000'.
|
||||
000000r 1
|
||||
000000r 1 .segment "CODE1"
|
||||
000000r 1
|
||||
000000r 1 .segment "CODE2"
|
||||
000000r 1
|
||||
000000r 1 .ORG $4000
|
||||
004000 1
|
||||
004000 1 start:
|
||||
004000 1 ; initialize:
|
||||
004000 1 A9 00 LDA #$00
|
||||
004002 1 8D 10 02 STA $0210
|
||||
004005 1 ; store each test's expected
|
||||
004005 1 A9 55 LDA #$55
|
||||
004007 1 8D 00 02 STA $0200
|
||||
00400A 1 A9 AA LDA #$AA
|
||||
00400C 1 8D 01 02 STA $0201
|
||||
00400F 1 A9 FF LDA #$FF
|
||||
004011 1 8D 02 02 STA $0202
|
||||
004014 1 A9 6E LDA #$6E
|
||||
004016 1 8D 03 02 STA $0203
|
||||
004019 1 A9 42 LDA #$42
|
||||
00401B 1 8D 04 02 STA $0204
|
||||
00401E 1 A9 33 LDA #$33
|
||||
004020 1 8D 05 02 STA $0205
|
||||
004023 1 A9 9D LDA #$9D
|
||||
004025 1 8D 06 02 STA $0206
|
||||
004028 1 A9 7F LDA #$7F
|
||||
00402A 1 8D 07 02 STA $0207
|
||||
00402D 1 A9 A5 LDA #$A5
|
||||
00402F 1 8D 08 02 STA $0208
|
||||
004032 1 A9 1F LDA #$1F
|
||||
004034 1 8D 09 02 STA $0209
|
||||
004037 1 A9 CE LDA #$CE
|
||||
004039 1 8D 0A 02 STA $020A
|
||||
00403C 1 A9 29 LDA #$29
|
||||
00403E 1 8D 0B 02 STA $020B
|
||||
004041 1 A9 42 LDA #$42
|
||||
004043 1 8D 0C 02 STA $020C
|
||||
004046 1 A9 6C LDA #$6C
|
||||
004048 1 8D 0D 02 STA $020D
|
||||
00404B 1 A9 42 LDA #$42
|
||||
00404D 1 8D 0E 02 STA $020E
|
||||
004050 1
|
||||
004050 1
|
||||
004050 1 ; expected result: $022A = 0x55
|
||||
004050 1 test00:
|
||||
004050 1 A9 55 LDA #85
|
||||
004052 1 A2 2A LDX #42
|
||||
004054 1 A0 73 LDY #115
|
||||
004056 1 85 81 STA $81
|
||||
004058 1 A9 01 LDA #$01
|
||||
00405A 1 85 61 STA $61
|
||||
00405C 1 A9 7E LDA #$7E
|
||||
00405E 1 A5 81 LDA $81
|
||||
004060 1 8D 10 09 STA $0910
|
||||
004063 1 A9 7E LDA #$7E
|
||||
004065 1 AD 10 09 LDA $0910
|
||||
004068 1 95 56 STA $56,X
|
||||
00406A 1 A9 7E LDA #$7E
|
||||
00406C 1 B5 56 LDA $56,X
|
||||
00406E 1 84 60 STY $60
|
||||
004070 1 91 60 STA ($60),Y
|
||||
004072 1 A9 7E LDA #$7E
|
||||
004074 1 B1 60 LDA ($60),Y
|
||||
004076 1 9D FF 07 STA $07ff,X
|
||||
004079 1 A9 7E LDA #$7E
|
||||
00407B 1 BD FF 07 LDA $07ff,X
|
||||
00407E 1 99 FF 07 STA $07ff,Y
|
||||
004081 1 A9 7E LDA #$7E
|
||||
004083 1 B9 FF 07 LDA $07ff,Y
|
||||
004086 1 81 36 STA ($36,X)
|
||||
004088 1 A9 7E LDA #$7E
|
||||
00408A 1 A1 36 LDA ($36,X)
|
||||
00408C 1 86 50 STX $50
|
||||
00408E 1 A6 60 LDX $60
|
||||
004090 1 A4 50 LDY $50
|
||||
004092 1 8E 13 09 STX $0913
|
||||
004095 1 A2 22 LDX #$22
|
||||
004097 1 AE 13 09 LDX $0913
|
||||
00409A 1 8C 14 09 STY $0914
|
||||
00409D 1 A0 99 LDY #$99
|
||||
00409F 1 AC 14 09 LDY $0914
|
||||
0040A2 1 94 2D STY $2D,X
|
||||
0040A4 1 96 77 STX $77,Y
|
||||
0040A6 1 A0 99 LDY #$99
|
||||
0040A8 1 B4 2D LDY $2D,X
|
||||
0040AA 1 A2 22 LDX #$22
|
||||
0040AC 1 B6 77 LDX $77,Y
|
||||
0040AE 1 A0 99 LDY #$99
|
||||
0040B0 1 BC A0 08 LDY $08A0,X
|
||||
0040B3 1 A2 22 LDX #$22
|
||||
0040B5 1 BE A1 08 LDX $08A1,Y
|
||||
0040B8 1 9D 00 02 STA $0200,X
|
||||
0040BB 1
|
||||
0040BB 1 ; CHECK test00:
|
||||
0040BB 1 AD 2A 02 LDA $022A
|
||||
0040BE 1 CD 00 02 CMP $0200
|
||||
0040C1 1 F0 03 BEQ test00pass
|
||||
0040C3 1 4C C0 45 JMP theend
|
||||
0040C6 1 test00pass:
|
||||
0040C6 1 A9 FE LDA #$FE
|
||||
0040C8 1 8D 10 02 STA $0210
|
||||
0040CB 1
|
||||
0040CB 1
|
||||
0040CB 1 ; expected result: $A9 = 0xAA
|
||||
0040CB 1 test01:
|
||||
0040CB 1 ; imm
|
||||
0040CB 1 A9 55 LDA #85
|
||||
0040CD 1 29 53 AND #83
|
||||
0040CF 1 09 38 ORA #56
|
||||
0040D1 1 49 11 EOR #17
|
||||
0040D3 1
|
||||
0040D3 1 ; zpg
|
||||
0040D3 1 85 99 STA $99
|
||||
0040D5 1 A9 B9 LDA #185
|
||||
0040D7 1 85 10 STA $10
|
||||
0040D9 1 A9 E7 LDA #231
|
||||
0040DB 1 85 11 STA $11
|
||||
0040DD 1 A9 39 LDA #57
|
||||
0040DF 1 85 12 STA $12
|
||||
0040E1 1 A5 99 LDA $99
|
||||
0040E3 1 25 10 AND $10
|
||||
0040E5 1 05 11 ORA $11
|
||||
0040E7 1 45 12 EOR $12
|
||||
0040E9 1
|
||||
0040E9 1 ; zpx
|
||||
0040E9 1 A2 10 LDX #16
|
||||
0040EB 1 85 99 STA $99
|
||||
0040ED 1 A9 BC LDA #188
|
||||
0040EF 1 85 20 STA $20
|
||||
0040F1 1 A9 31 LDA #49
|
||||
0040F3 1 85 21 STA $21
|
||||
0040F5 1 A9 17 LDA #23
|
||||
0040F7 1 85 22 STA $22
|
||||
0040F9 1 A5 99 LDA $99
|
||||
0040FB 1 35 10 AND $10,X
|
||||
0040FD 1 15 11 ORA $11,X
|
||||
0040FF 1 55 12 EOR $12,X
|
||||
004101 1
|
||||
004101 1 ; abs
|
||||
004101 1 85 99 STA $99
|
||||
004103 1 A9 6F LDA #111
|
||||
004105 1 8D 10 01 STA $0110
|
||||
004108 1 A9 3C LDA #60
|
||||
00410A 1 8D 11 01 STA $0111
|
||||
00410D 1 A9 27 LDA #39
|
||||
00410F 1 8D 12 01 STA $0112
|
||||
004112 1 A5 99 LDA $99
|
||||
004114 1 2D 10 01 AND $0110
|
||||
004117 1 0D 11 01 ORA $0111
|
||||
00411A 1 4D 12 01 EOR $0112
|
||||
00411D 1
|
||||
00411D 1 ; abx
|
||||
00411D 1 85 99 STA $99
|
||||
00411F 1 A9 8A LDA #138
|
||||
004121 1 8D 20 01 STA $0120
|
||||
004124 1 A9 47 LDA #71
|
||||
004126 1 8D 21 01 STA $0121
|
||||
004129 1 A9 8F LDA #143
|
||||
00412B 1 8D 22 01 STA $0122
|
||||
00412E 1 A5 99 LDA $99
|
||||
004130 1 3D 10 01 AND $0110,X
|
||||
004133 1 1D 11 01 ORA $0111,X
|
||||
004136 1 5D 12 01 EOR $0112,X
|
||||
004139 1
|
||||
004139 1 ; aby
|
||||
004139 1 A0 20 LDY #32
|
||||
00413B 1 85 99 STA $99
|
||||
00413D 1 A9 73 LDA #115
|
||||
00413F 1 8D 30 01 STA $0130
|
||||
004142 1 A9 2A LDA #42
|
||||
004144 1 8D 31 01 STA $0131
|
||||
004147 1 A9 F1 LDA #241
|
||||
004149 1 8D 32 01 STA $0132
|
||||
00414C 1 A5 99 LDA $99
|
||||
00414E 1 39 10 01 AND $0110,Y
|
||||
004151 1 19 11 01 ORA $0111,Y
|
||||
004154 1 59 12 01 EOR $0112,Y
|
||||
004157 1
|
||||
004157 1 ; idx
|
||||
004157 1 85 99 STA $99
|
||||
004159 1 A9 70 LDA #112
|
||||
00415B 1 85 30 STA $30
|
||||
00415D 1 A9 01 LDA #$01
|
||||
00415F 1 85 31 STA $31
|
||||
004161 1 A9 71 LDA #113
|
||||
004163 1 85 32 STA $32
|
||||
004165 1 A9 01 LDA #$01
|
||||
004167 1 85 33 STA $33
|
||||
004169 1 A9 72 LDA #114
|
||||
00416B 1 85 34 STA $34
|
||||
00416D 1 A9 01 LDA #$01
|
||||
00416F 1 85 35 STA $35
|
||||
004171 1 A9 C5 LDA #197
|
||||
004173 1 8D 70 01 STA $0170
|
||||
004176 1 A9 7C LDA #124
|
||||
004178 1 8D 71 01 STA $0171
|
||||
00417B 1 A9 A1 LDA #161
|
||||
00417D 1 8D 72 01 STA $0172
|
||||
004180 1 A5 99 LDA $99
|
||||
004182 1 21 20 AND ($20,X)
|
||||
004184 1 01 22 ORA ($22,X)
|
||||
004186 1 41 24 EOR ($24,X)
|
||||
004188 1
|
||||
004188 1 ; idy
|
||||
004188 1 85 99 STA $99
|
||||
00418A 1 A9 60 LDA #96
|
||||
00418C 1 85 40 STA $40
|
||||
00418E 1 A9 01 LDA #$01
|
||||
004190 1 85 41 STA $41
|
||||
004192 1 A9 61 LDA #97
|
||||
004194 1 85 42 STA $42
|
||||
004196 1 A9 01 LDA #$01
|
||||
004198 1 85 43 STA $43
|
||||
00419A 1 A9 62 LDA #98
|
||||
00419C 1 85 44 STA $44
|
||||
00419E 1 A9 01 LDA #$01
|
||||
0041A0 1 85 45 STA $45
|
||||
0041A2 1 A9 37 LDA #55
|
||||
0041A4 1 8D 50 02 STA $0250
|
||||
0041A7 1 A9 23 LDA #35
|
||||
0041A9 1 8D 51 02 STA $0251
|
||||
0041AC 1 A9 9D LDA #157
|
||||
0041AE 1 8D 52 02 STA $0252
|
||||
0041B1 1 A5 99 LDA $99
|
||||
0041B3 1 A0 F0 LDY #$F0
|
||||
0041B5 1 31 40 AND ($40),Y
|
||||
0041B7 1 11 42 ORA ($42),Y
|
||||
0041B9 1 51 44 EOR ($44),Y
|
||||
0041BB 1
|
||||
0041BB 1 85 A9 STA $A9
|
||||
0041BD 1
|
||||
0041BD 1 ; CHECK test01
|
||||
0041BD 1 A5 A9 LDA $A9
|
||||
0041BF 1 CD 01 02 CMP $0201
|
||||
0041C2 1 F0 08 BEQ test02
|
||||
0041C4 1 A9 01 LDA #$01
|
||||
0041C6 1 8D 10 02 STA $0210
|
||||
0041C9 1 4C C0 45 JMP theend
|
||||
0041CC 1
|
||||
0041CC 1
|
||||
0041CC 1 ; expected result: $71 = 0xFF
|
||||
0041CC 1 test02:
|
||||
0041CC 1 A9 FF LDA #$FF
|
||||
0041CE 1 A2 00 LDX #$00
|
||||
0041D0 1
|
||||
0041D0 1 85 90 STA $90
|
||||
0041D2 1 E6 90 INC $90
|
||||
0041D4 1 E6 90 INC $90
|
||||
0041D6 1 A5 90 LDA $90
|
||||
0041D8 1 A6 90 LDX $90
|
||||
0041DA 1
|
||||
0041DA 1 95 90 STA $90,X
|
||||
0041DC 1 F6 90 INC $90,X
|
||||
0041DE 1 B5 90 LDA $90,X
|
||||
0041E0 1 A6 91 LDX $91
|
||||
0041E2 1
|
||||
0041E2 1 9D 90 01 STA $0190,X
|
||||
0041E5 1 EE 92 01 INC $0192
|
||||
0041E8 1 BD 90 01 LDA $0190,X
|
||||
0041EB 1 AE 92 01 LDX $0192
|
||||
0041EE 1
|
||||
0041EE 1 9D 90 01 STA $0190,X
|
||||
0041F1 1 FE 90 01 INC $0190,X
|
||||
0041F4 1 BD 90 01 LDA $0190,X
|
||||
0041F7 1 AE 93 01 LDX $0193
|
||||
0041FA 1
|
||||
0041FA 1 9D 70 01 STA $0170,X
|
||||
0041FD 1 DE 70 01 DEC $0170,X
|
||||
004200 1 BD 70 01 LDA $0170,X
|
||||
004203 1 AE 74 01 LDX $0174
|
||||
004206 1
|
||||
004206 1 9D 70 01 STA $0170,X
|
||||
004209 1 CE 73 01 DEC $0173
|
||||
00420C 1 BD 70 01 LDA $0170,X
|
||||
00420F 1 AE 73 01 LDX $0173
|
||||
004212 1
|
||||
004212 1 95 70 STA $70,X
|
||||
004214 1 D6 70 DEC $70,X
|
||||
004216 1 B5 70 LDA $70,X
|
||||
004218 1 A6 72 LDX $72
|
||||
00421A 1
|
||||
00421A 1 95 70 STA $70,X
|
||||
00421C 1 C6 71 DEC $71
|
||||
00421E 1 C6 71 DEC $71
|
||||
004220 1
|
||||
004220 1 ; CHECK test02
|
||||
004220 1 A5 71 LDA $71
|
||||
004222 1 CD 02 02 CMP $0202
|
||||
004225 1 F0 08 BEQ test03
|
||||
004227 1 A9 02 LDA #$02
|
||||
004229 1 8D 10 02 STA $0210
|
||||
00422C 1 4C C0 45 JMP theend
|
||||
00422F 1
|
||||
00422F 1
|
||||
00422F 1 ; expected result: $01DD = 0x6E
|
||||
00422F 1 test03:
|
||||
00422F 1 A9 4B LDA #$4B
|
||||
004231 1 4A LSR
|
||||
004232 1 0A ASL
|
||||
004233 1
|
||||
004233 1 85 50 STA $50
|
||||
004235 1 06 50 ASL $50
|
||||
004237 1 06 50 ASL $50
|
||||
004239 1 46 50 LSR $50
|
||||
00423B 1 A5 50 LDA $50
|
||||
00423D 1
|
||||
00423D 1 A6 50 LDX $50
|
||||
00423F 1 09 C9 ORA #$C9
|
||||
004241 1 85 60 STA $60
|
||||
004243 1 16 4C ASL $4C,X
|
||||
004245 1 56 4C LSR $4C,X
|
||||
004247 1 56 4C LSR $4C,X
|
||||
004249 1 B5 4C LDA $4C,X
|
||||
00424B 1
|
||||
00424B 1 A6 60 LDX $60
|
||||
00424D 1 09 41 ORA #$41
|
||||
00424F 1 8D 2E 01 STA $012E
|
||||
004252 1 5E 00 01 LSR $0100,X
|
||||
004255 1 5E 00 01 LSR $0100,X
|
||||
004258 1 1E 00 01 ASL $0100,X
|
||||
00425B 1 BD 00 01 LDA $0100,X
|
||||
00425E 1
|
||||
00425E 1 AE 2E 01 LDX $012E
|
||||
004261 1 09 81 ORA #$81
|
||||
004263 1 9D 00 01 STA $0100,X
|
||||
004266 1 4E 36 01 LSR $0136
|
||||
004269 1 4E 36 01 LSR $0136
|
||||
00426C 1 0E 36 01 ASL $0136
|
||||
00426F 1 BD 00 01 LDA $0100,X
|
||||
004272 1
|
||||
004272 1 ; rol & ror
|
||||
004272 1
|
||||
004272 1 2A ROL
|
||||
004273 1 2A ROL
|
||||
004274 1 6A ROR
|
||||
004275 1 85 70 STA $70
|
||||
004277 1
|
||||
004277 1 A6 70 LDX $70
|
||||
004279 1 09 03 ORA #$03
|
||||
00427B 1 95 0C STA $0C,X
|
||||
00427D 1 26 C0 ROL $C0
|
||||
00427F 1 66 C0 ROR $C0
|
||||
004281 1 66 C0 ROR $C0
|
||||
004283 1 B5 0C LDA $0C,X
|
||||
004285 1
|
||||
004285 1 A6 C0 LDX $C0
|
||||
004287 1 85 D0 STA $D0
|
||||
004289 1 36 75 ROL $75,X
|
||||
00428B 1 36 75 ROL $75,X
|
||||
00428D 1 76 75 ROR $75,X
|
||||
00428F 1 A5 D0 LDA $D0
|
||||
004291 1
|
||||
004291 1 A6 D0 LDX $D0
|
||||
004293 1 9D 00 01 STA $0100,X
|
||||
004296 1 2E B7 01 ROL $01B7
|
||||
004299 1 2E B7 01 ROL $01B7
|
||||
00429C 1 2E B7 01 ROL $01B7
|
||||
00429F 1 6E B7 01 ROR $01B7
|
||||
0042A2 1 BD 00 01 LDA $0100,X
|
||||
0042A5 1
|
||||
0042A5 1 AE B7 01 LDX $01B7
|
||||
0042A8 1 8D DD 01 STA $01DD
|
||||
0042AB 1 3E 00 01 ROL $0100,X
|
||||
0042AE 1 7E 00 01 ROR $0100,X
|
||||
0042B1 1 7E 00 01 ROR $0100,X
|
||||
0042B4 1
|
||||
0042B4 1 ; CHECK test03
|
||||
0042B4 1 AD DD 01 LDA $01DD
|
||||
0042B7 1 CD 03 02 CMP $0203
|
||||
0042BA 1 F0 08 BEQ test04
|
||||
0042BC 1 A9 03 LDA #$03
|
||||
0042BE 1 8D 10 02 STA $0210
|
||||
0042C1 1 4C C0 45 JMP theend
|
||||
0042C4 1
|
||||
0042C4 1
|
||||
0042C4 1 ; expected result: $40 = 0x42
|
||||
0042C4 1 test04:
|
||||
0042C4 1 A9 E8 LDA #$E8 ;originally:#$7C
|
||||
0042C6 1 85 20 STA $20
|
||||
0042C8 1 A9 42 LDA #$42 ;originally:#$02
|
||||
0042CA 1 85 21 STA $21
|
||||
0042CC 1 A9 00 LDA #$00
|
||||
0042CE 1 09 03 ORA #$03
|
||||
0042D0 1 4C D5 42 JMP jump1
|
||||
0042D3 1 09 FF ORA #$FF ; not done
|
||||
0042D5 1 jump1:
|
||||
0042D5 1 09 30 ORA #$30
|
||||
0042D7 1 20 E1 42 JSR subr
|
||||
0042DA 1 09 42 ORA #$42
|
||||
0042DC 1 6C 20 00 JMP ($0020)
|
||||
0042DF 1 09 FF ORA #$FF ; not done
|
||||
0042E1 1 subr:
|
||||
0042E1 1 85 30 STA $30
|
||||
0042E3 1 A6 30 LDX $30
|
||||
0042E5 1 A9 00 LDA #$00
|
||||
0042E7 1 60 RTS
|
||||
0042E8 1 final:
|
||||
0042E8 1 95 0D STA $0D,X
|
||||
0042EA 1
|
||||
0042EA 1 ; CHECK test04
|
||||
0042EA 1 A5 40 LDA $40
|
||||
0042EC 1 CD 04 02 CMP $0204
|
||||
0042EF 1 F0 08 BEQ test05
|
||||
0042F1 1 A9 04 LDA #$04
|
||||
0042F3 1 8D 10 02 STA $0210
|
||||
0042F6 1 4C C0 45 JMP theend
|
||||
0042F9 1
|
||||
0042F9 1
|
||||
0042F9 1 ; expected result: $40 = 0x33
|
||||
0042F9 1 test05:
|
||||
0042F9 1 A9 35 LDA #$35
|
||||
0042FB 1
|
||||
0042FB 1 AA TAX
|
||||
0042FC 1 CA DEX
|
||||
0042FD 1 CA DEX
|
||||
0042FE 1 E8 INX
|
||||
0042FF 1 8A TXA
|
||||
004300 1
|
||||
004300 1 A8 TAY
|
||||
004301 1 88 DEY
|
||||
004302 1 88 DEY
|
||||
004303 1 C8 INY
|
||||
004304 1 98 TYA
|
||||
004305 1
|
||||
004305 1 AA TAX
|
||||
004306 1 A9 20 LDA #$20
|
||||
004308 1 9A TXS
|
||||
004309 1 A2 10 LDX #$10
|
||||
00430B 1 BA TSX
|
||||
00430C 1 8A TXA
|
||||
00430D 1
|
||||
00430D 1 85 40 STA $40
|
||||
00430F 1
|
||||
00430F 1 ; CHECK test05
|
||||
00430F 1 A5 40 LDA $40
|
||||
004311 1 CD 05 02 CMP $0205
|
||||
004314 1 F0 08 BEQ test06
|
||||
004316 1 A9 05 LDA #$05
|
||||
004318 1 8D 10 02 STA $0210
|
||||
00431B 1 4C C0 45 JMP theend
|
||||
00431E 1
|
||||
00431E 1
|
||||
00431E 1 ; expected result: $30 = 9D
|
||||
00431E 1 test06:
|
||||
00431E 1
|
||||
00431E 1 ; RESET TO CARRY FLAG = 0
|
||||
00431E 1 2A ROL
|
||||
00431F 1
|
||||
00431F 1 A9 6A LDA #$6A
|
||||
004321 1 85 50 STA $50
|
||||
004323 1 A9 6B LDA #$6B
|
||||
004325 1 85 51 STA $51
|
||||
004327 1 A9 A1 LDA #$A1
|
||||
004329 1 85 60 STA $60
|
||||
00432B 1 A9 A2 LDA #$A2
|
||||
00432D 1 85 61 STA $61
|
||||
00432F 1
|
||||
00432F 1 A9 FF LDA #$FF
|
||||
004331 1 69 FF ADC #$FF
|
||||
004333 1 69 FF ADC #$FF
|
||||
004335 1 E9 AE SBC #$AE
|
||||
004337 1
|
||||
004337 1 85 40 STA $40
|
||||
004339 1 A6 40 LDX $40
|
||||
00433B 1 75 00 ADC $00,X
|
||||
00433D 1 F5 01 SBC $01,X
|
||||
00433F 1
|
||||
00433F 1 65 60 ADC $60
|
||||
004341 1 E5 61 SBC $61
|
||||
004343 1
|
||||
004343 1 8D 20 01 STA $0120
|
||||
004346 1 A9 4D LDA #$4D
|
||||
004348 1 8D 21 01 STA $0121
|
||||
00434B 1 A9 23 LDA #$23
|
||||
00434D 1 6D 20 01 ADC $0120
|
||||
004350 1 ED 21 01 SBC $0121
|
||||
004353 1
|
||||
004353 1 85 F0 STA $F0
|
||||
004355 1 A6 F0 LDX $F0
|
||||
004357 1 A9 64 LDA #$64
|
||||
004359 1 8D 24 01 STA $0124
|
||||
00435C 1 A9 62 LDA #$62
|
||||
00435E 1 8D 25 01 STA $0125
|
||||
004361 1 A9 26 LDA #$26
|
||||
004363 1 7D 00 01 ADC $0100,X
|
||||
004366 1 FD 01 01 SBC $0101,X
|
||||
004369 1
|
||||
004369 1 85 F1 STA $F1
|
||||
00436B 1 A4 F1 LDY $F1
|
||||
00436D 1 A9 E5 LDA #$E5
|
||||
00436F 1 8D 28 01 STA $0128
|
||||
004372 1 A9 E9 LDA #$E9
|
||||
004374 1 8D 29 01 STA $0129
|
||||
004377 1 A9 34 LDA #$34
|
||||
004379 1 79 00 01 ADC $0100,Y
|
||||
00437C 1 F9 01 01 SBC $0101,Y
|
||||
00437F 1
|
||||
00437F 1 85 F2 STA $F2
|
||||
004381 1 A6 F2 LDX $F2
|
||||
004383 1 A9 20 LDA #$20
|
||||
004385 1 85 70 STA $70
|
||||
004387 1 A9 01 LDA #$01
|
||||
004389 1 85 71 STA $71
|
||||
00438B 1 A9 24 LDA #$24
|
||||
00438D 1 85 72 STA $72
|
||||
00438F 1 A9 01 LDA #$01
|
||||
004391 1 85 73 STA $73
|
||||
004393 1 61 41 ADC ($41,X)
|
||||
004395 1 E1 3F SBC ($3F,X)
|
||||
004397 1
|
||||
004397 1 85 F3 STA $F3
|
||||
004399 1 A4 F3 LDY $F3
|
||||
00439B 1 A9 DA LDA #$DA
|
||||
00439D 1 85 80 STA $80
|
||||
00439F 1 A9 00 LDA #$00
|
||||
0043A1 1 85 81 STA $81
|
||||
0043A3 1 A9 DC LDA #$DC
|
||||
0043A5 1 85 82 STA $82
|
||||
0043A7 1 A9 00 LDA #$00
|
||||
0043A9 1 85 83 STA $83
|
||||
0043AB 1 A9 AA LDA #$AA
|
||||
0043AD 1 71 80 ADC ($80),Y
|
||||
0043AF 1 F1 82 SBC ($82),Y
|
||||
0043B1 1 85 30 STA $30
|
||||
0043B3 1
|
||||
0043B3 1 ; CHECK test06
|
||||
0043B3 1 A5 30 LDA $30
|
||||
0043B5 1 CD 06 02 CMP $0206
|
||||
0043B8 1 F0 08 BEQ test07
|
||||
0043BA 1 A9 06 LDA #$06
|
||||
0043BC 1 8D 10 02 STA $0210
|
||||
0043BF 1 4C C0 45 JMP theend
|
||||
0043C2 1
|
||||
0043C2 1
|
||||
0043C2 1 ; expected result: $15 = 0x7F
|
||||
0043C2 1 test07:
|
||||
0043C2 1 ; prepare memory
|
||||
0043C2 1 A9 00 LDA #$00
|
||||
0043C4 1 85 34 STA $34
|
||||
0043C6 1 A9 FF LDA #$FF
|
||||
0043C8 1 8D 30 01 STA $0130
|
||||
0043CB 1 A9 99 LDA #$99
|
||||
0043CD 1 8D 9D 01 STA $019D
|
||||
0043D0 1 A9 DB LDA #$DB
|
||||
0043D2 1 8D 99 01 STA $0199
|
||||
0043D5 1 A9 2F LDA #$2F
|
||||
0043D7 1 85 32 STA $32
|
||||
0043D9 1 A9 32 LDA #$32
|
||||
0043DB 1 85 4F STA $4F
|
||||
0043DD 1 A9 30 LDA #$30
|
||||
0043DF 1 85 33 STA $33
|
||||
0043E1 1 A9 70 LDA #$70
|
||||
0043E3 1 85 AF STA $AF
|
||||
0043E5 1 A9 18 LDA #$18
|
||||
0043E7 1 85 30 STA $30
|
||||
0043E9 1
|
||||
0043E9 1 ; imm
|
||||
0043E9 1 C9 18 CMP #$18
|
||||
0043EB 1 F0 02 BEQ beq1 ; taken
|
||||
0043ED 1 29 00 AND #$00 ; not done
|
||||
0043EF 1 beq1:
|
||||
0043EF 1 ; zpg
|
||||
0043EF 1 09 01 ORA #$01
|
||||
0043F1 1 C5 30 CMP $30
|
||||
0043F3 1 D0 02 BNE bne1 ; taken
|
||||
0043F5 1 29 00 AND #$00 ; not done
|
||||
0043F7 1 bne1:
|
||||
0043F7 1 ; abs
|
||||
0043F7 1 A2 00 LDX #$00
|
||||
0043F9 1 CD 30 01 CMP $0130
|
||||
0043FC 1 F0 04 BEQ beq2 ; not taken
|
||||
0043FE 1 85 40 STA $40
|
||||
004400 1 A6 40 LDX $40
|
||||
004402 1 beq2:
|
||||
004402 1 ; zpx
|
||||
004402 1 D5 27 CMP $27,X
|
||||
004404 1 D0 06 BNE bne2 ; not taken
|
||||
004406 1 09 84 ORA #$84
|
||||
004408 1 85 41 STA $41
|
||||
00440A 1 A6 41 LDX $41
|
||||
00440C 1 bne2:
|
||||
00440C 1 ; abx
|
||||
00440C 1 29 DB AND #$DB
|
||||
00440E 1 DD 00 01 CMP $0100,X
|
||||
004411 1 F0 02 BEQ beq3 ; taken
|
||||
004413 1 29 00 AND #$00 ; not done
|
||||
004415 1 beq3:
|
||||
004415 1 ; aby
|
||||
004415 1 85 42 STA $42
|
||||
004417 1 A4 42 LDY $42
|
||||
004419 1 29 00 AND #$00
|
||||
00441B 1 D9 00 01 CMP $0100,Y
|
||||
00441E 1 D0 02 BNE bne3 ; taken
|
||||
004420 1 09 0F ORA #$0F ; not done
|
||||
004422 1 bne3:
|
||||
004422 1 ; idx
|
||||
004422 1 85 43 STA $43
|
||||
004424 1 A6 43 LDX $43
|
||||
004426 1 09 24 ORA #$24
|
||||
004428 1 C1 40 CMP ($40,X)
|
||||
00442A 1 F0 02 BEQ beq4 ; not taken
|
||||
00442C 1 09 7F ORA #$7F
|
||||
00442E 1 beq4:
|
||||
00442E 1 ; idy
|
||||
00442E 1 85 44 STA $44
|
||||
004430 1 A4 44 LDY $44
|
||||
004432 1 49 0F EOR #$0F
|
||||
004434 1 D1 33 CMP ($33),Y
|
||||
004436 1 D0 04 BNE bne4 ; not taken
|
||||
004438 1 A5 44 LDA $44
|
||||
00443A 1 85 15 STA $15
|
||||
00443C 1 bne4:
|
||||
00443C 1
|
||||
00443C 1 ; CHECK test07
|
||||
00443C 1 A5 15 LDA $15
|
||||
00443E 1 CD 07 02 CMP $0207
|
||||
004441 1 F0 08 BEQ test08
|
||||
004443 1 A9 07 LDA #$07
|
||||
004445 1 8D 10 02 STA $0210
|
||||
004448 1 4C C0 45 JMP theend
|
||||
00444B 1
|
||||
00444B 1
|
||||
00444B 1 ; expected result: $42 = 0xA5
|
||||
00444B 1 test08:
|
||||
00444B 1 ; prepare memory
|
||||
00444B 1 A9 A5 LDA #$A5
|
||||
00444D 1 85 20 STA $20
|
||||
00444F 1 8D 20 01 STA $0120
|
||||
004452 1 A9 5A LDA #$5A
|
||||
004454 1 85 21 STA $21
|
||||
004456 1
|
||||
004456 1 ; cpx imm...
|
||||
004456 1 A2 A5 LDX #$A5
|
||||
004458 1 E0 A5 CPX #$A5
|
||||
00445A 1 F0 02 BEQ b1 ; taken
|
||||
00445C 1 A2 01 LDX #$01 ; not done
|
||||
00445E 1 b1:
|
||||
00445E 1 ; cpx zpg...
|
||||
00445E 1 E4 20 CPX $20
|
||||
004460 1 F0 02 BEQ b2 ; taken
|
||||
004462 1 A2 02 LDX #$02 ; not done
|
||||
004464 1 b2:
|
||||
004464 1 ; cpx abs...
|
||||
004464 1 EC 20 01 CPX $0120
|
||||
004467 1 F0 02 BEQ b3 ; taken
|
||||
004469 1 A2 03 LDX #$03 ; not done
|
||||
00446B 1 b3:
|
||||
00446B 1 ; cpy imm...
|
||||
00446B 1 86 30 STX $30
|
||||
00446D 1 A4 30 LDY $30
|
||||
00446F 1 C0 A5 CPY #$A5
|
||||
004471 1 F0 02 BEQ b4 ; taken
|
||||
004473 1 A0 04 LDY #$04 ; not done
|
||||
004475 1 b4:
|
||||
004475 1 ; cpy zpg...
|
||||
004475 1 C4 20 CPY $20
|
||||
004477 1 F0 02 BEQ b5 ; taken
|
||||
004479 1 A0 05 LDY #$05 ; not done
|
||||
00447B 1 b5:
|
||||
00447B 1 ; cpy abs...
|
||||
00447B 1 CC 20 01 CPY $0120
|
||||
00447E 1 F0 02 BEQ b6 ; taken
|
||||
004480 1 A0 06 LDY #$06 ; not done
|
||||
004482 1 b6:
|
||||
004482 1 ; bit zpg...
|
||||
004482 1 84 31 STY $31
|
||||
004484 1 A5 31 LDA $31
|
||||
004486 1 24 20 BIT $20
|
||||
004488 1 D0 02 BNE b7 ; taken
|
||||
00448A 1 A9 07 LDA #$07 ; not done
|
||||
00448C 1 b7:
|
||||
00448C 1 ; bit abs...
|
||||
00448C 1 2C 20 01 BIT $0120
|
||||
00448F 1 D0 02 BNE b8 ; taken
|
||||
004491 1 A9 08 LDA #$08 ; not done
|
||||
004493 1 b8:
|
||||
004493 1 24 21 BIT $21
|
||||
004495 1 D0 02 BNE b9 ; not taken
|
||||
004497 1 85 42 STA $42
|
||||
004499 1 b9:
|
||||
004499 1
|
||||
004499 1 ; CHECK test08
|
||||
004499 1 A5 42 LDA $42
|
||||
00449B 1 CD 08 02 CMP $0208
|
||||
00449E 1 F0 08 BEQ test09
|
||||
0044A0 1 A9 08 LDA #$08
|
||||
0044A2 1 8D 10 02 STA $0210
|
||||
0044A5 1 4C C0 45 JMP theend
|
||||
0044A8 1
|
||||
0044A8 1
|
||||
0044A8 1 ; expected result: $80 = 0x1F
|
||||
0044A8 1 test09:
|
||||
0044A8 1 ; prepare memory
|
||||
0044A8 1 A9 54 LDA #$54
|
||||
0044AA 1 85 32 STA $32
|
||||
0044AC 1 A9 B3 LDA #$B3
|
||||
0044AE 1 85 A1 STA $A1
|
||||
0044B0 1 A9 87 LDA #$87
|
||||
0044B2 1 85 43 STA $43
|
||||
0044B4 1
|
||||
0044B4 1 ; BPL
|
||||
0044B4 1 A2 A1 LDX #$A1
|
||||
0044B6 1 10 02 BPL bpl1 ; not taken
|
||||
0044B8 1 A2 32 LDX #$32
|
||||
0044BA 1 bpl1:
|
||||
0044BA 1 B4 00 LDY $00,X
|
||||
0044BC 1 10 04 BPL bpl2 ; taken
|
||||
0044BE 1 A9 05 LDA #$05 ; not done
|
||||
0044C0 1 A6 A1 LDX $A1 ; not done
|
||||
0044C2 1 bpl2:
|
||||
0044C2 1
|
||||
0044C2 1 ; BMI
|
||||
0044C2 1 30 02 BMI bmi1 ; not taken
|
||||
0044C4 1 E9 03 SBC #$03
|
||||
0044C6 1 bmi1:
|
||||
0044C6 1 30 02 BMI bmi2 ; taken
|
||||
0044C8 1 A9 41 LDA #$41 ; not done
|
||||
0044CA 1 bmi2:
|
||||
0044CA 1
|
||||
0044CA 1 ; BVC
|
||||
0044CA 1 49 30 EOR #$30
|
||||
0044CC 1 85 32 STA $32
|
||||
0044CE 1 75 00 ADC $00,X
|
||||
0044D0 1 50 02 BVC bvc1 ; not taken
|
||||
0044D2 1 A9 03 LDA #$03
|
||||
0044D4 1 bvc1:
|
||||
0044D4 1 85 54 STA $54
|
||||
0044D6 1 B6 00 LDX $00,Y
|
||||
0044D8 1 75 51 ADC $51,X
|
||||
0044DA 1 50 02 BVC bvc2 ; taken
|
||||
0044DC 1 A9 E5 LDA #$E5 ; not done
|
||||
0044DE 1 bvc2:
|
||||
0044DE 1
|
||||
0044DE 1 ; BVS
|
||||
0044DE 1 75 40 ADC $40,X
|
||||
0044E0 1 70 05 BVS bvs1 ; not taken
|
||||
0044E2 1 99 01 00 STA $0001,Y
|
||||
0044E5 1 65 55 ADC $55
|
||||
0044E7 1 bvs1:
|
||||
0044E7 1 70 02 BVS bvs2 ; taken
|
||||
0044E9 1 A9 00 LDA #$00
|
||||
0044EB 1 bvs2:
|
||||
0044EB 1
|
||||
0044EB 1 ; BCC
|
||||
0044EB 1 69 F0 ADC #$F0
|
||||
0044ED 1 90 04 BCC bcc1 ; not taken
|
||||
0044EF 1 85 60 STA $60
|
||||
0044F1 1 65 43 ADC $43
|
||||
0044F3 1 bcc1:
|
||||
0044F3 1 90 02 BCC bcc2 ; taken
|
||||
0044F5 1 A9 FF LDA #$FF
|
||||
0044F7 1 bcc2:
|
||||
0044F7 1
|
||||
0044F7 1 ; BCS
|
||||
0044F7 1 65 54 ADC $54
|
||||
0044F9 1 B0 04 BCS bcs1 ; not taken
|
||||
0044FB 1 69 87 ADC #$87
|
||||
0044FD 1 A6 60 LDX $60
|
||||
0044FF 1 bcs1:
|
||||
0044FF 1 B0 02 BCS bcs2 ; taken
|
||||
004501 1 A9 00 LDA #$00 ; not done
|
||||
004503 1 bcs2:
|
||||
004503 1 95 73 STA $73,X
|
||||
004505 1
|
||||
004505 1 ; CHECK test09
|
||||
004505 1 A5 80 LDA $80
|
||||
004507 1 CD 09 02 CMP $0209
|
||||
00450A 1 F0 08 BEQ test10
|
||||
00450C 1 A9 09 LDA #$09
|
||||
00450E 1 8D 10 02 STA $0210
|
||||
004511 1 4C C0 45 JMP theend
|
||||
004514 1
|
||||
004514 1
|
||||
004514 1 ; expected result: $30 = 0xCE
|
||||
004514 1 test10:
|
||||
004514 1
|
||||
004514 1 ; RESET TO CARRY = 0 & OVERFLOW = 0
|
||||
004514 1 69 00 ADC #$00
|
||||
004516 1
|
||||
004516 1 A9 99 LDA #$99
|
||||
004518 1 69 87 ADC #$87
|
||||
00451A 1 18 CLC
|
||||
00451B 1 EA NOP
|
||||
00451C 1 90 04 BCC t10bcc1 ; taken
|
||||
00451E 1 69 60 ADC #$60 ; not done
|
||||
004520 1 69 93 ADC #$93 ; not done
|
||||
004522 1 t10bcc1:
|
||||
004522 1 38 SEC
|
||||
004523 1 EA NOP
|
||||
004524 1 90 01 BCC t10bcc2 ; not taken
|
||||
004526 1 B8 CLV
|
||||
004527 1 t10bcc2:
|
||||
004527 1 50 02 BVC t10bvc1 ; taken
|
||||
004529 1 A9 00 LDA #$00 ; not done
|
||||
00452B 1 t10bvc1:
|
||||
00452B 1 69 AD ADC #$AD
|
||||
00452D 1 EA NOP
|
||||
00452E 1 85 30 STA $30
|
||||
004530 1
|
||||
004530 1 ; CHECK test10
|
||||
004530 1 A5 30 LDA $30
|
||||
004532 1 CD 0A 02 CMP $020A
|
||||
004535 1 F0 08 BEQ test11
|
||||
004537 1 A9 0A LDA #$0A
|
||||
004539 1 8D 10 02 STA $0210
|
||||
00453C 1 4C C0 45 JMP theend
|
||||
00453F 1
|
||||
00453F 1
|
||||
00453F 1 ; expected result: $30 = 0x29
|
||||
00453F 1 test11:
|
||||
00453F 1
|
||||
00453F 1 ; RESET TO CARRY = 0 & ZERO = 0
|
||||
00453F 1 69 01 ADC #$01
|
||||
004541 1
|
||||
004541 1 A9 27 LDA #$27
|
||||
004543 1 69 01 ADC #$01
|
||||
004545 1 38 SEC
|
||||
004546 1 08 PHP
|
||||
004547 1 18 CLC
|
||||
004548 1 28 PLP
|
||||
004549 1 69 00 ADC #$00
|
||||
00454B 1 48 PHA
|
||||
00454C 1 A9 00 LDA #$00
|
||||
00454E 1 68 PLA
|
||||
00454F 1 85 30 STA $30
|
||||
004551 1
|
||||
004551 1 ; CHECK test11
|
||||
004551 1 A5 30 LDA $30
|
||||
004553 1 CD 0B 02 CMP $020B
|
||||
004556 1 F0 08 BEQ test12
|
||||
004558 1 A9 0B LDA #$0B
|
||||
00455A 1 8D 10 02 STA $0210
|
||||
00455D 1 4C C0 45 JMP theend
|
||||
004560 1
|
||||
004560 1
|
||||
004560 1 ; expected result: $33 = 0x42
|
||||
004560 1 test12:
|
||||
004560 1 18 CLC
|
||||
004561 1 A9 42 LDA #$42
|
||||
004563 1 90 04 BCC runstuff
|
||||
004565 1 85 33 STA $33
|
||||
004567 1 B0 0A BCS t12end
|
||||
004569 1 runstuff:
|
||||
004569 1 A9 45 LDA #$45
|
||||
00456B 1 48 PHA
|
||||
00456C 1 A9 61 LDA #$61
|
||||
00456E 1 48 PHA
|
||||
00456F 1 38 SEC
|
||||
004570 1 08 PHP
|
||||
004571 1 18 CLC
|
||||
004572 1 40 RTI
|
||||
004573 1 t12end:
|
||||
004573 1
|
||||
004573 1 ; CHECK test12
|
||||
004573 1 A5 33 LDA $33
|
||||
004575 1 CD 0C 02 CMP $020C
|
||||
004578 1 F0 08 BEQ test13
|
||||
00457A 1 A9 0C LDA #$0C
|
||||
00457C 1 8D 10 02 STA $0210
|
||||
00457F 1 4C C0 45 JMP theend
|
||||
004582 1
|
||||
004582 1
|
||||
004582 1 ; expected result: $21 = 0x6C (simulator)
|
||||
004582 1 ; $21 = 0x0C (ours)
|
||||
004582 1 test13:
|
||||
004582 1
|
||||
004582 1 ; RESET TO CARRY = 0 & ZERO = 0
|
||||
004582 1 69 01 ADC #$01
|
||||
004584 1
|
||||
004584 1 78 SEI
|
||||
004585 1 F8 SED
|
||||
004586 1 08 PHP
|
||||
004587 1 68 PLA
|
||||
004588 1 85 20 STA $20
|
||||
00458A 1 58 CLI
|
||||
00458B 1 D8 CLD
|
||||
00458C 1 08 PHP
|
||||
00458D 1 68 PLA
|
||||
00458E 1 65 20 ADC $20
|
||||
004590 1 85 21 STA $21
|
||||
004592 1
|
||||
004592 1 ; CHECK test13
|
||||
004592 1 A5 21 LDA $21
|
||||
004594 1 CD 0D 02 CMP $020D
|
||||
004597 1 F0 08 BEQ test14
|
||||
004599 1 A9 0D LDA #$0D
|
||||
00459B 1 8D 10 02 STA $0210
|
||||
00459E 1 4C C0 45 JMP theend
|
||||
0045A1 1
|
||||
0045A1 1
|
||||
0045A1 1 ; expect result: $60 = 0x42
|
||||
0045A1 1 test14:
|
||||
0045A1 1 ; !!! NOTICE: BRK doesn't work in this
|
||||
0045A1 1 ; simulator, so commented instructions
|
||||
0045A1 1 ; are what should be executed...
|
||||
0045A1 1 ;JMP pass_intrp
|
||||
0045A1 1 A9 41 LDA #$41
|
||||
0045A3 1 85 60 STA $60
|
||||
0045A5 1 ;RTI
|
||||
0045A5 1 ;pass_intrp:
|
||||
0045A5 1 ;LDA #$FF
|
||||
0045A5 1 ;STA $60
|
||||
0045A5 1 ;BRK (two bytes)
|
||||
0045A5 1 E6 60 INC $60
|
||||
0045A7 1
|
||||
0045A7 1 ; CHECK test14
|
||||
0045A7 1 A5 60 LDA $60
|
||||
0045A9 1 CD 0E 02 CMP $020E
|
||||
0045AC 1 F0 08 BEQ suiteafinal
|
||||
0045AE 1 A9 0E LDA #$0E
|
||||
0045B0 1 8D 10 02 STA $0210
|
||||
0045B3 1 4C C0 45 JMP theend
|
||||
0045B6 1
|
||||
0045B6 1 suiteafinal:
|
||||
0045B6 1 ; IF $0210 == 0xFE, INCREMENT
|
||||
0045B6 1 ; (checking that it didn't
|
||||
0045B6 1 ; happen to wander off and
|
||||
0045B6 1 ; not run our instructions
|
||||
0045B6 1 ; to say which tests failed...)
|
||||
0045B6 1 A9 FE LDA #$FE
|
||||
0045B8 1 CD 10 02 CMP $0210
|
||||
0045BB 1 D0 03 BNE theend
|
||||
0045BD 1 EE 10 02 INC $0210
|
||||
0045C0 1 theend:
|
||||
0045C0 1 00 BRK
|
||||
0045C1 1 00 BRK
|
||||
0045C2 1 ;JMP theend
|
||||
0045C2 1 A2 FF LDX #$FF
|
||||
0045C4 1 9A TXS
|
||||
0045C5 1 60 RTS
|
||||
0045C6 1
|
||||
0045C6 1 .segment "KERN"
|
||||
0045C6 1
|
||||
0045C6 1 .ORG $FF00
|
||||
00FF00 1
|
||||
00FF00 1 40 RTI
|
||||
00FF01 1
|
||||
00FF01 1 .segment "VECT"
|
||||
00FF01 1
|
||||
00FF01 1 .ORG $FFFA
|
||||
00FFFA 1
|
||||
00FFFA 1 00 FF 00 FF .BYTE $00,$FF,$00,$FF,$00,$FF
|
||||
00FFFE 1 00 FF
|
||||
010000 1
|
||||
010000 1 ;-------------------------- END
|
||||
010000 1
|
||||
|
|
@ -0,0 +1,24 @@
|
|||
#
|
||||
# This is configuration file for CL65 linker to produce
|
||||
# binary image 64 kB long, which is to be loaded from
|
||||
# address $0000.
|
||||
# Code segment CODE1, 15 kB starts at $0400.
|
||||
# Code segment CODE2, 49 kB starts at $4000.
|
||||
# Kernel jump table segment KERN (250 B) starts at $FF00.
|
||||
# Vectors segment start at $FFFA.
|
||||
#
|
||||
MEMORY {
|
||||
RAM0: start = $0000, size = $400, fill = yes;
|
||||
RAM1: start = $0400, size = $3C00, fill = yes;
|
||||
RAM2: start = $4000, size = $BF00, fill = yes;
|
||||
ROM0: start = $FF00, size = $FA, fill = yes;
|
||||
ROM1: start = $FFFA, size = 6;
|
||||
}
|
||||
|
||||
SEGMENTS {
|
||||
CODE1: load = RAM1, type = rw;
|
||||
CODE2: load = RAM2, type = rw;
|
||||
KERN: load = ROM0, type = ro;
|
||||
VECT: load = ROM1, type = ro;
|
||||
}
|
||||
|
||||
138
testbcd.dat
138
testbcd.dat
|
|
@ -1,69 +1,69 @@
|
|||
; Program disassembly from $0400 to $0600 2/9/2016
|
||||
; Test BCD mode.
|
||||
ORG
|
||||
$0400
|
||||
$A0 $01 $8C $04 $03 $A9 $00 $8D
|
||||
$07 $03 $8D $0A $03 $AD $0A $03
|
||||
$29 $0F $8D $0B $03 $AD $0A $03
|
||||
$29 $F0 $8D $0F $03 $09 $0F $8D
|
||||
$10 $03 $AD $07 $03 $29 $0F $8D
|
||||
$09 $03 $AD $07 $03 $29 $F0 $8D
|
||||
$08 $03 $20 $5E $04 $20 $47 $05
|
||||
$20 $18 $05 $D0 $1D $20 $B1 $04
|
||||
$20 $54 $05 $20 $18 $05 $D0 $12
|
||||
$EE $07 $03 $D0 $D5 $EE $0A $03
|
||||
$D0 $BB $88 $10 $B8 $A9 $00 $8D
|
||||
$04 $03 $00 $00 $00 $00 $F8 $C0
|
||||
$01 $AD $07 $03 $6D $0A $03 $8D
|
||||
$02 $03 $08 $68 $8D $03 $03 $D8
|
||||
$C0 $01 $AD $07 $03 $6D $0A $03
|
||||
$8D $05 $03 $08 $68 $8D $06 $03
|
||||
$C0 $01 $AD $09 $03 $6D $0B $03
|
||||
$C9 $0A $A2 $00 $90 $06 $E8 $69
|
||||
$05 $29 $0F $38 $0D $08 $03 $7D
|
||||
$0F $03 $08 $B0 $04 $C9 $A0 $90
|
||||
$03 $69 $5F $38 $8D $00 $03 $08
|
||||
$68 $8D $01 $03 $68 $8D $0D $03
|
||||
$60 $F8 $C0 $01 $AD $07 $03 $ED
|
||||
$0A $03 $8D $02 $03 $08 $68 $8D
|
||||
$03 $03 $D8 $C0 $01 $AD $07 $03
|
||||
$ED $0A $03 $8D $05 $03 $08 $68
|
||||
$8D $06 $03 $60 $C0 $01 $AD $09
|
||||
$03 $ED $0B $03 $A2 $00 $B0 $06
|
||||
$E8 $E9 $05 $29 $0F $18 $0D $08
|
||||
$03 $FD $0F $03 $B0 $02 $E9 $5F
|
||||
$8D $00 $03 $60 $C0 $01 $AD $09
|
||||
$03 $ED $0B $03 $A2 $00 $B0 $04
|
||||
$E8 $29 $0F $18 $0D $08 $03 $FD
|
||||
$0F $03 $B0 $02 $E9 $5F $E0 $00
|
||||
$F0 $02 $E9 $06 $8D $00 $03 $60
|
||||
$AD $02 $03 $CD $00 $03 $D0 $26
|
||||
$AD $03 $03 $4D $0C $03 $29 $80
|
||||
$D0 $1C $AD $03 $03 $4D $0D $03
|
||||
$29 $40 $D0 $12 $AD $03 $03 $4D
|
||||
$0E $03 $29 $02 $D0 $08 $AD $03
|
||||
$03 $4D $01 $03 $29 $01 $60 $AD
|
||||
$0D $03 $8D $0C $03 $AD $06 $03
|
||||
$8D $0E $03 $60 $20 $D4 $04 $AD
|
||||
$06 $03 $8D $0C $03 $8D $0D $03
|
||||
$8D $0E $03 $8D $01 $03 $60 $AD
|
||||
$00 $03 $08 $68 $8D $0C $03 $8D
|
||||
$0E $03 $60 $20 $F4 $04 $AD $00
|
||||
$03 $08 $68 $8D $0C $03 $8D $0E
|
||||
$03 $AD $06 $03 $8D $0D $03 $8D
|
||||
$01 $03 $60 $AD $00 $03 $08 $68
|
||||
$8D $0C $03 $8D $0E $03 $60 $20
|
||||
$D4 $04 $AD $00 $03 $08 $68 $8D
|
||||
$0C $03 $8D $0E $03 $AD $06 $03
|
||||
$8D $0D $03 $8D $01 $03 $60 $00
|
||||
$00 $00 $00 $00 $00 $00 $00 $00
|
||||
$00 $00 $00 $00 $00 $00 $00 $00
|
||||
$00 $00 $00 $00 $00 $00 $00 $00
|
||||
$00 $00 $00 $00 $00 $00 $00 $00
|
||||
$00 $00 $00 $00 $00 $00 $00 $00
|
||||
$00 $00 $00 $00 $00 $00 $00 $00
|
||||
$00 $00 $00 $00 $00 $00 $00 $00
|
||||
$00 $00 $00 $00 $00 $00 $00 $00
|
||||
$00 $00 $00 $00 $00 $00 $00 $00
|
||||
$00 $00 $00 $00 $00 $00 $00 $00
|
||||
|
||||
; Program disassembly from $0400 to $0600 2/9/2016
|
||||
; Test BCD mode.
|
||||
ORG
|
||||
$0400
|
||||
$A0 $01 $8C $04 $03 $A9 $00 $8D
|
||||
$07 $03 $8D $0A $03 $AD $0A $03
|
||||
$29 $0F $8D $0B $03 $AD $0A $03
|
||||
$29 $F0 $8D $0F $03 $09 $0F $8D
|
||||
$10 $03 $AD $07 $03 $29 $0F $8D
|
||||
$09 $03 $AD $07 $03 $29 $F0 $8D
|
||||
$08 $03 $20 $5E $04 $20 $47 $05
|
||||
$20 $18 $05 $D0 $1D $20 $B1 $04
|
||||
$20 $54 $05 $20 $18 $05 $D0 $12
|
||||
$EE $07 $03 $D0 $D5 $EE $0A $03
|
||||
$D0 $BB $88 $10 $B8 $A9 $00 $8D
|
||||
$04 $03 $00 $00 $00 $00 $F8 $C0
|
||||
$01 $AD $07 $03 $6D $0A $03 $8D
|
||||
$02 $03 $08 $68 $8D $03 $03 $D8
|
||||
$C0 $01 $AD $07 $03 $6D $0A $03
|
||||
$8D $05 $03 $08 $68 $8D $06 $03
|
||||
$C0 $01 $AD $09 $03 $6D $0B $03
|
||||
$C9 $0A $A2 $00 $90 $06 $E8 $69
|
||||
$05 $29 $0F $38 $0D $08 $03 $7D
|
||||
$0F $03 $08 $B0 $04 $C9 $A0 $90
|
||||
$03 $69 $5F $38 $8D $00 $03 $08
|
||||
$68 $8D $01 $03 $68 $8D $0D $03
|
||||
$60 $F8 $C0 $01 $AD $07 $03 $ED
|
||||
$0A $03 $8D $02 $03 $08 $68 $8D
|
||||
$03 $03 $D8 $C0 $01 $AD $07 $03
|
||||
$ED $0A $03 $8D $05 $03 $08 $68
|
||||
$8D $06 $03 $60 $C0 $01 $AD $09
|
||||
$03 $ED $0B $03 $A2 $00 $B0 $06
|
||||
$E8 $E9 $05 $29 $0F $18 $0D $08
|
||||
$03 $FD $0F $03 $B0 $02 $E9 $5F
|
||||
$8D $00 $03 $60 $C0 $01 $AD $09
|
||||
$03 $ED $0B $03 $A2 $00 $B0 $04
|
||||
$E8 $29 $0F $18 $0D $08 $03 $FD
|
||||
$0F $03 $B0 $02 $E9 $5F $E0 $00
|
||||
$F0 $02 $E9 $06 $8D $00 $03 $60
|
||||
$AD $02 $03 $CD $00 $03 $D0 $26
|
||||
$AD $03 $03 $4D $0C $03 $29 $80
|
||||
$D0 $1C $AD $03 $03 $4D $0D $03
|
||||
$29 $40 $D0 $12 $AD $03 $03 $4D
|
||||
$0E $03 $29 $02 $D0 $08 $AD $03
|
||||
$03 $4D $01 $03 $29 $01 $60 $AD
|
||||
$0D $03 $8D $0C $03 $AD $06 $03
|
||||
$8D $0E $03 $60 $20 $D4 $04 $AD
|
||||
$06 $03 $8D $0C $03 $8D $0D $03
|
||||
$8D $0E $03 $8D $01 $03 $60 $AD
|
||||
$00 $03 $08 $68 $8D $0C $03 $8D
|
||||
$0E $03 $60 $20 $F4 $04 $AD $00
|
||||
$03 $08 $68 $8D $0C $03 $8D $0E
|
||||
$03 $AD $06 $03 $8D $0D $03 $8D
|
||||
$01 $03 $60 $AD $00 $03 $08 $68
|
||||
$8D $0C $03 $8D $0E $03 $60 $20
|
||||
$D4 $04 $AD $00 $03 $08 $68 $8D
|
||||
$0C $03 $8D $0E $03 $AD $06 $03
|
||||
$8D $0D $03 $8D $01 $03 $60 $00
|
||||
$00 $00 $00 $00 $00 $00 $00 $00
|
||||
$00 $00 $00 $00 $00 $00 $00 $00
|
||||
$00 $00 $00 $00 $00 $00 $00 $00
|
||||
$00 $00 $00 $00 $00 $00 $00 $00
|
||||
$00 $00 $00 $00 $00 $00 $00 $00
|
||||
$00 $00 $00 $00 $00 $00 $00 $00
|
||||
$00 $00 $00 $00 $00 $00 $00 $00
|
||||
$00 $00 $00 $00 $00 $00 $00 $00
|
||||
$00 $00 $00 $00 $00 $00 $00 $00
|
||||
$00 $00 $00 $00 $00 $00 $00 $00
|
||||
|
||||
|
|
|
|||
1548
tinybasic.dat
1548
tinybasic.dat
File diff suppressed because it is too large
Load Diff
Loading…
Reference in New Issue