mirror of
https://github.com/ksherlock/wdc-utils.git
synced 2024-12-11 11:49:28 +00:00
more samples.
This commit is contained in:
parent
b0d601fecf
commit
14eb08e05e
@ -1,7 +1,7 @@
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AS = wdc816as
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AS = wdc816as
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ASFLAGS = -L
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ASFLAGS = -L
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all: instructions.obj
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all: instructions.obj hello1.obj hello2.obj
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%.obj : %.asm
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%.obj : %.asm
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$(AS) $(ASFLAGS) $< -o $@
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$(AS) $(ASFLAGS) $< -o $@
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24
samples/hello.macros
Normal file
24
samples/hello.macros
Normal file
@ -0,0 +1,24 @@
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_WriteLine macro
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ldx #$1a0c
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jsl $e10000
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endm
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cstr macro str
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db str
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db 0
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endm
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pstr macro str
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db end#-start#
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start#
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db str
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end#
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endm
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gsstr macro str
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dw end#-start#
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start#
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db str
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end#
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endm
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20
samples/hello1.asm
Normal file
20
samples/hello1.asm
Normal file
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;
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; 1-segment code.
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;
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include 'hello.macros'
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macdelim {
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CODE
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pea #^text
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pea #text
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_WriteLine
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rtl
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text
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pstr {'hello, world'}
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ends
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41
samples/hello1.lst
Normal file
41
samples/hello1.lst
Normal file
@ -0,0 +1,41 @@
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Tue Jan 3 2017 23:55 Page 1
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***************************************
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** WDC 65C816 Macro Assembler **
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** **
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** Version 3.49.1- Feb 6 2006 **
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***************************************
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1
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2 ;
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3 ; 1-segment code.
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4 ;
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5 include 'hello.macros'
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6
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7 macdelim {
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8
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9 CODE
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10 00:0000: F4 xx xx pea #^text
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11 00:0003: F4 xx xx pea #text
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12 _WriteLine
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+ 12 00:0006: A2 0C 1A ldx #$1a0c
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+ 12 00:0009: 22 00 00 E1 jsl $e10000
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13
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14 00:000D: 6B rtl
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15
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16 text
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17 pstr {'hello, world'}
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+ 17 00:000E: 0C db end0002-start0002
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+ 17 start0002
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+ 17 00:000F: 68 65 6C 6C db 'hello, world'
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00:0013: 6F 2C 20 77
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00:0017: 6F 72 6C 64
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+ 17 end0002
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18 ends
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19
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20
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Lines assembled: 50
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Errors: 0
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BIN
samples/hello1.obj
Normal file
BIN
samples/hello1.obj
Normal file
Binary file not shown.
22
samples/hello2.asm
Normal file
22
samples/hello2.asm
Normal file
@ -0,0 +1,22 @@
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;
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; 2-segment code.
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;
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include 'hello.macros'
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macdelim {
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CODE
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pea #^text
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pea #text
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_WriteLine
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rtl
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ends
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KDATA
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text
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pstr {'hello, world'}
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ends
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43
samples/hello2.lst
Normal file
43
samples/hello2.lst
Normal file
@ -0,0 +1,43 @@
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Tue Jan 3 2017 23:55 Page 1
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***************************************
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** WDC 65C816 Macro Assembler **
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** **
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** Version 3.49.1- Feb 6 2006 **
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***************************************
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1
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2 ;
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3 ; 2-segment code.
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4 ;
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5 include 'hello.macros'
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6
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7 macdelim {
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8
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9 CODE
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10 00:0000: F4 xx xx pea #^text
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11 00:0003: F4 xx xx pea #text
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12 _WriteLine
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+ 12 00:0006: A2 0C 1A ldx #$1a0c
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+ 12 00:0009: 22 00 00 E1 jsl $e10000
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13
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14 00:000D: 6B rtl
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15 ends
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16
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17 KDATA
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18 text
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19 pstr {'hello, world'}
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+ 19 00:0000: 0C db end0002-start0002
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+ 19 start0002
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+ 19 00:0001: 68 65 6C 6C db 'hello, world'
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00:0005: 6F 2C 20 77
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00:0009: 6F 72 6C 64
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+ 19 end0002
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20 00:000D: ends
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21
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22
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Lines assembled: 52
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Errors: 0
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BIN
samples/hello2.obj
Normal file
BIN
samples/hello2.obj
Normal file
Binary file not shown.
299
samples/instructions.lst
Normal file
299
samples/instructions.lst
Normal file
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Tue Jan 3 2017 22:11 Page 1
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***************************************
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** WDC 65C816 Macro Assembler **
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** **
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** Version 3.49.1- Feb 6 2006 **
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***************************************
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1 00:0000: 00 12 brk $12
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2 00:0002: 01 12 ora (<$12,x)
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3 00:0004: 02 12 cop $12
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4 00:0006: 03 12 ora <$12,s
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5 00:0008: 04 12 tsb <$12
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6 00:000A: 05 12 ora <$12
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7 00:000C: 06 12 asl <$12
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8 00:000E: 07 12 ora [<$12]
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9 00:0010: 08 php
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10 00:0011: 09 34 12 ora #$1234
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11 00:0014: 0A asl
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12 00:0015: 0B phd
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13 00:0016: 0C 34 12 tsb |$1234
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14 00:0019: 0D 34 12 ora |$1234
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15 00:001C: 0E 34 12 asl |$1234
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16 00:001F: 0F 56 34 12 ora >$123456
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17 ;
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18 00:0023: 10 00 bpl *+2
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19 00:0025: 11 12 ora (<$12),y
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20 00:0027: 12 12 ora (<$12)
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21 00:0029: 13 12 ora (<$12,s),y
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22 00:002B: 14 12 trb <$12
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23 00:002D: 15 12 ora <$12,x
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24 00:002F: 16 12 asl <$12,x
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25 00:0031: 17 12 ora [<$12],y
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26 00:0033: 18 clc
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27 00:0034: 19 34 12 ora |$1234,y
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28 00:0037: 1A inc
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29 00:0038: 1B tcs
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30 00:0039: 1C 34 12 trb |$1234
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31 00:003C: 1D 34 12 ora |$1234,x
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32 00:003F: 1E 34 12 asl |$1234,x
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33 00:0042: 1F 56 34 12 ora >$123456,x
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34 ;
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35 00:0046: 20 34 12 jsr |$1234
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36 00:0049: 21 12 and (<$12,x)
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37 00:004B: 22 56 34 12 jsl >$123456
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38 00:004F: 23 12 and <$12,s
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39 00:0051: 24 12 bit <$12
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40 00:0053: 25 12 and <$12
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41 00:0055: 26 12 rol <$12
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42 00:0057: 27 12 and [<$12]
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43 00:0059: 28 plp
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44 00:005A: 29 34 12 and #$1234
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45 00:005D: 2A rol
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46 00:005E: 2B pld
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47 00:005F: 2C 34 12 bit |$1234
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48 00:0062: 2D 34 12 and |$1234
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49 00:0065: 2E 34 12 rol |$1234
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50 00:0068: 2F 56 34 12 and >$123456
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51 ;
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52 00:006C: 30 00 bmi *+2
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Tue Jan 3 2017 22:11 Page 2
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53 00:006E: 31 12 and (<$12),y
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54 00:0070: 32 12 and (<$12)
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55 00:0072: 33 12 and (<$12,s),y
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56 00:0074: 34 12 bit <$12,x
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57 00:0076: 35 12 and <$12,x
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58 00:0078: 36 12 rol <$12,x
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59 00:007A: 37 12 and [<$12],y
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60 00:007C: 38 sec
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61 00:007D: 39 34 12 and |$1234,y
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62 00:0080: 3A dec
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63 00:0081: 3B tsc
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64 00:0082: 3C 34 12 bit |$1234,x
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65 00:0085: 3D 34 12 and |$1234,x
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66 00:0088: 3E 34 12 rol |$1234,x
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67 00:008B: 3F 56 34 12 and >$123456,x
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68 ;
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69 00:008F: 40 rti
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70 00:0090: 41 12 eor (<$12,x)
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71 00:0092: 42 12 wdm $12
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72 00:0094: 43 12 eor <$12,s
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73 00:0096: 44 34 12 mvp $12,$34
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74 00:0099: 45 12 eor <$12
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75 00:009B: 46 12 lsr <$12
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76 00:009D: 47 12 eor [<$12]
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77 00:009F: 48 pha
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78 00:00A0: 49 34 12 eor #$1234
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79 00:00A3: 4A lsr
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80 00:00A4: 4B phk
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81 00:00A5: 4C 34 12 jmp |$1234
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82 00:00A8: 4D 34 12 eor |$1234
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83 00:00AB: 4E 34 12 lsr |$1234
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84 00:00AE: 4F 56 34 12 eor >$123456
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85 ;
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86 00:00B2: 50 00 bvc *+2
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87 00:00B4: 51 12 eor (<$12),y
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88 00:00B6: 52 12 eor (<$12)
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89 00:00B8: 53 12 eor (<$12,s),y
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90 00:00BA: 54 34 12 mvn $12,$34
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91 00:00BD: 55 12 eor <$12,x
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92 00:00BF: 56 12 lsr <$12,x
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93 00:00C1: 57 12 eor [<$12],y
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94 00:00C3: 58 cli
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95 00:00C4: 59 34 12 eor |$1234,y
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96 00:00C7: 5A phy
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97 00:00C8: 5B tcd
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98 00:00C9: 5C 56 34 12 jml >$123456
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99 00:00CD: 5D 34 12 eor |$1234,x
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100 00:00D0: 5E 34 12 lsr |$1234,x
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101 00:00D3: 5F 56 34 12 eor >$123456,x
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102 ;
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103 00:00D7: 60 rts
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104 00:00D8: 61 12 adc (<$12,x)
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105 00:00DA: 62 00 00 per *+3
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106 00:00DD: 63 12 adc <$12,s
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107 00:00DF: 64 12 stz <$12
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108 00:00E1: 65 12 adc <$12
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109 00:00E3: 66 12 ror <$12
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110 00:00E5: 67 12 adc [<$12]
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Tue Jan 3 2017 22:11 Page 3
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111 00:00E7: 68 pla
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112 00:00E8: 69 34 12 adc #$1234
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113 00:00EB: 6A ror
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114 00:00EC: 6B rtl
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115 00:00ED: 6C 34 12 jmp (|$1234)
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116 00:00F0: 6D 34 12 adc |$1234
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117 00:00F3: 6E 34 12 ror |$1234
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118 00:00F6: 6F 56 34 12 adc >$123456
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119 ;
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120 00:00FA: 70 00 bvs *+2
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121 00:00FC: 71 12 adc (<$12),y
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122 00:00FE: 72 12 adc (<$12)
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123 00:0100: 73 12 adc (<$12,s),y
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124 00:0102: 74 12 stz <$12,x
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125 00:0104: 75 12 adc <$12,x
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126 00:0106: 76 12 ror <$12,x
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127 00:0108: 77 12 adc [<$12],y
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128 00:010A: 78 sei
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129 00:010B: 79 34 12 adc |$1234,y
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130 00:010E: 7A ply
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131 00:010F: 7B tdc
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132 00:0110: 7C 34 12 jmp (|$1234,x)
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133 00:0113: 7D 34 12 adc |$1234,x
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134 00:0116: 7E 34 12 ror |$1234,x
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135 00:0119: 7F 56 34 12 adc >$123456,x
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136 ;
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137 00:011D: 80 00 bra *+2
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138 00:011F: 81 12 sta (<$12,x)
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139 00:0121: 82 00 00 brl *+3
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140 00:0124: 83 12 sta <$12,s
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141 00:0126: 84 12 sty <$12
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142 00:0128: 85 12 sta <$12
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143 00:012A: 86 12 stx <$12
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144 00:012C: 87 12 sta [<$12]
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145 00:012E: 88 dey
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146 00:012F: 89 34 12 bit #$1234
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147 00:0132: 8A txa
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148 00:0133: 8B phb
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149 00:0134: 8C 34 12 sty |$1234
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150 00:0137: 8D 34 12 sta |$1234
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151 00:013A: 8E 34 12 stx |$1234
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152 00:013D: 8F 56 34 12 sta >$123456
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153 ;
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154 00:0141: 90 00 bcc *+2
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155 00:0143: 91 12 sta (<$12),y
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156 00:0145: 92 12 sta (<$12)
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157 00:0147: 93 12 sta (<$12,s),y
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158 00:0149: 94 12 sty <$12,x
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159 00:014B: 95 12 sta <$12,x
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160 00:014D: 96 12 stx <$12,y
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161 00:014F: 97 12 sta [<$12],y
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162 00:0151: 98 tya
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163 00:0152: 99 34 12 sta |$1234,y
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164 00:0155: 9A txs
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165 00:0156: 9B txy
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166 00:0157: 9C 34 12 stz |$1234
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167 00:015A: 9D 34 12 sta |$1234,x
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168 00:015D: 9E 34 12 stz |$1234,x
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Tue Jan 3 2017 22:11 Page 4
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169 00:0160: 9F 56 34 12 sta >$123456,x
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170 ;
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171 00:0164: A0 34 12 ldy #$1234
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172 00:0167: A1 12 lda (<$12,x)
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173 00:0169: A2 34 12 ldx #$1234
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174 00:016C: A3 12 lda <$12,s
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175 00:016E: A4 12 ldy <$12
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176 00:0170: A5 12 lda <$12
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177 00:0172: A6 12 ldx <$12
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178 00:0174: A7 12 lda [<$12]
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179 00:0176: A8 tay
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180 00:0177: A9 34 12 lda #$1234
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181 00:017A: AA tax
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182 00:017B: AB plb
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183 00:017C: AC 34 12 ldy |$1234
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|
184 00:017F: AD 34 12 lda |$1234
|
||||||
|
185 00:0182: AE 34 12 ldx |$1234
|
||||||
|
186 00:0185: AF 56 34 12 lda >$123456
|
||||||
|
187 ;
|
||||||
|
188 00:0189: B0 00 bcs *+2
|
||||||
|
189 00:018B: B1 12 lda (<$12),y
|
||||||
|
190 00:018D: B2 12 lda (<$12)
|
||||||
|
191 00:018F: B3 12 lda (<$12,s),y
|
||||||
|
192 00:0191: B4 12 ldy <$12,x
|
||||||
|
193 00:0193: B5 12 lda <$12,x
|
||||||
|
194 00:0195: B6 12 ldx <$12,y
|
||||||
|
195 00:0197: B7 12 lda [<$12],y
|
||||||
|
196 00:0199: B8 clv
|
||||||
|
197 00:019A: B9 34 12 lda |$1234,y
|
||||||
|
198 00:019D: BA tsx
|
||||||
|
199 00:019E: BB tyx
|
||||||
|
200 00:019F: BC 34 12 ldy |$1234,x
|
||||||
|
201 00:01A2: BD 34 12 lda |$1234,x
|
||||||
|
202 00:01A5: BE 34 12 ldx |$1234,y
|
||||||
|
203 00:01A8: BF 56 34 12 lda >$123456,x
|
||||||
|
204 ;
|
||||||
|
205 00:01AC: C0 34 12 cpy #$1234
|
||||||
|
206 00:01AF: C1 12 cmp (<$12,x)
|
||||||
|
207 00:01B1: C2 00 rep #$00
|
||||||
|
208 00:01B3: C3 12 cmp <$12,s
|
||||||
|
209 00:01B5: C4 12 cpy <$12
|
||||||
|
210 00:01B7: C5 12 cmp <$12
|
||||||
|
211 00:01B9: C6 12 dec <$12
|
||||||
|
212 00:01BB: C7 12 cmp [<$12]
|
||||||
|
213 00:01BD: C8 iny
|
||||||
|
214 00:01BE: C9 34 12 cmp #$1234
|
||||||
|
215 00:01C1: CA dex
|
||||||
|
216 00:01C2: CB wai
|
||||||
|
217 00:01C3: CC 34 12 cpy |$1234
|
||||||
|
218 00:01C6: CD 34 12 cmp |$1234
|
||||||
|
219 00:01C9: CE 34 12 dec |$1234
|
||||||
|
220 00:01CC: CF 56 34 12 cmp >$123456
|
||||||
|
221 ;
|
||||||
|
222 00:01D0: D0 00 bne *+2
|
||||||
|
223 00:01D2: D1 12 cmp (<$12),y
|
||||||
|
224 00:01D4: D2 12 cmp (<$12)
|
||||||
|
225 00:01D6: D3 12 cmp (<$12,s),y
|
||||||
|
226 00:01D8: D4 12 pei (<$12)
|
||||||
|
Tue Jan 3 2017 22:11 Page 5
|
||||||
|
|
||||||
|
|
||||||
|
227 00:01DA: D5 12 cmp <$12,x
|
||||||
|
228 00:01DC: D6 12 dec <$12,x
|
||||||
|
229 00:01DE: D7 12 cmp [<$12],y
|
||||||
|
230 00:01E0: D8 cld
|
||||||
|
231 00:01E1: D9 34 12 cmp |$1234,y
|
||||||
|
232 00:01E4: DA phx
|
||||||
|
233 00:01E5: DB stp
|
||||||
|
234 00:01E6: DC 34 12 jml ($1234) ; was jml [$1234]
|
||||||
|
235 ;jmp [$1234] ; ok!
|
||||||
|
236 ;jml [$1234] ; error!
|
||||||
|
237 00:01E9: DD 34 12 cmp |$1234,x
|
||||||
|
238 00:01EC: DE 34 12 dec |$1234,x
|
||||||
|
239 00:01EF: DF 56 34 12 cmp >$123456,x
|
||||||
|
240 ;
|
||||||
|
241 00:01F3: E0 34 12 cpx #$1234
|
||||||
|
242 00:01F6: E1 12 sbc (<$12,x)
|
||||||
|
243 00:01F8: E2 00 sep #$00
|
||||||
|
244 00:01FA: E3 12 sbc <$12,s
|
||||||
|
245 00:01FC: E4 12 cpx <$12
|
||||||
|
246 00:01FE: E5 12 sbc <$12
|
||||||
|
247 00:0200: E6 12 inc <$12
|
||||||
|
248 00:0202: E7 12 sbc [<$12]
|
||||||
|
249 00:0204: E8 inx
|
||||||
|
250 00:0205: E9 34 12 sbc #$1234
|
||||||
|
251 00:0208: EA nop
|
||||||
|
252 00:0209: EB xba
|
||||||
|
253 00:020A: EC 34 12 cpx |$1234
|
||||||
|
254 00:020D: ED 34 12 sbc |$1234
|
||||||
|
255 00:0210: EE 34 12 inc |$1234
|
||||||
|
256 00:0213: EF 56 34 12 sbc >$123456
|
||||||
|
257 ;
|
||||||
|
258 00:0217: F0 00 beq *+2
|
||||||
|
259 00:0219: F1 12 sbc (<$12),y
|
||||||
|
260 00:021B: F2 12 sbc (<$12)
|
||||||
|
261 00:021D: F3 12 sbc (<$12,s),y
|
||||||
|
262 00:021F: F4 34 12 pea |$1234
|
||||||
|
263 00:0222: F5 12 sbc <$12,x
|
||||||
|
264 00:0224: F6 12 inc <$12,x
|
||||||
|
265 00:0226: F7 12 sbc [<$12],y
|
||||||
|
266 00:0228: F8 sed
|
||||||
|
267 00:0229: F9 34 12 sbc |$1234,y
|
||||||
|
268 00:022C: FA plx
|
||||||
|
269 00:022D: FB xce
|
||||||
|
270 00:022E: FC 34 12 jsr (|$1234,x)
|
||||||
|
271 00:0231: FD 34 12 sbc |$1234,x
|
||||||
|
272 00:0234: FE 34 12 inc |$1234,x
|
||||||
|
273 00:0237: FF 56 34 12 sbc >$123456,x
|
||||||
|
274 ;
|
||||||
|
|
||||||
|
|
||||||
|
Lines assembled: 274
|
||||||
|
Errors: 0
|
BIN
samples/instructions.obj
Normal file
BIN
samples/instructions.obj
Normal file
Binary file not shown.
Loading…
Reference in New Issue
Block a user