more samples.

This commit is contained in:
Kelvin Sherlock 2017-01-04 13:37:09 -05:00
parent b0d601fecf
commit 14eb08e05e
10 changed files with 450 additions and 1 deletions

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@ -1,7 +1,7 @@
AS = wdc816as
ASFLAGS = -L
all: instructions.obj
all: instructions.obj hello1.obj hello2.obj
%.obj : %.asm
$(AS) $(ASFLAGS) $< -o $@

24
samples/hello.macros Normal file
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@ -0,0 +1,24 @@
_WriteLine macro
ldx #$1a0c
jsl $e10000
endm
cstr macro str
db str
db 0
endm
pstr macro str
db end#-start#
start#
db str
end#
endm
gsstr macro str
dw end#-start#
start#
db str
end#
endm

20
samples/hello1.asm Normal file
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@ -0,0 +1,20 @@
;
; 1-segment code.
;
include 'hello.macros'
macdelim {
CODE
pea #^text
pea #text
_WriteLine
rtl
text
pstr {'hello, world'}
ends

41
samples/hello1.lst Normal file
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@ -0,0 +1,41 @@
Tue Jan 3 2017 23:55 Page 1
***************************************
** WDC 65C816 Macro Assembler **
** **
** Version 3.49.1- Feb 6 2006 **
***************************************
1
2 ;
3 ; 1-segment code.
4 ;
5 include 'hello.macros'
6
7 macdelim {
8
9 CODE
10 00:0000: F4 xx xx pea #^text
11 00:0003: F4 xx xx pea #text
12 _WriteLine
+ 12 00:0006: A2 0C 1A ldx #$1a0c
+ 12 00:0009: 22 00 00 E1 jsl $e10000
13
14 00:000D: 6B rtl
15
16 text
17 pstr {'hello, world'}
+ 17 00:000E: 0C db end0002-start0002
+ 17 start0002
+ 17 00:000F: 68 65 6C 6C db 'hello, world'
00:0013: 6F 2C 20 77
00:0017: 6F 72 6C 64
+ 17 end0002
18 ends
19
20
Lines assembled: 50
Errors: 0

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samples/hello1.obj Normal file

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22
samples/hello2.asm Normal file
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@ -0,0 +1,22 @@
;
; 2-segment code.
;
include 'hello.macros'
macdelim {
CODE
pea #^text
pea #text
_WriteLine
rtl
ends
KDATA
text
pstr {'hello, world'}
ends

43
samples/hello2.lst Normal file
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Tue Jan 3 2017 23:55 Page 1
***************************************
** WDC 65C816 Macro Assembler **
** **
** Version 3.49.1- Feb 6 2006 **
***************************************
1
2 ;
3 ; 2-segment code.
4 ;
5 include 'hello.macros'
6
7 macdelim {
8
9 CODE
10 00:0000: F4 xx xx pea #^text
11 00:0003: F4 xx xx pea #text
12 _WriteLine
+ 12 00:0006: A2 0C 1A ldx #$1a0c
+ 12 00:0009: 22 00 00 E1 jsl $e10000
13
14 00:000D: 6B rtl
15 ends
16
17 KDATA
18 text
19 pstr {'hello, world'}
+ 19 00:0000: 0C db end0002-start0002
+ 19 start0002
+ 19 00:0001: 68 65 6C 6C db 'hello, world'
00:0005: 6F 2C 20 77
00:0009: 6F 72 6C 64
+ 19 end0002
20 00:000D: ends
21
22
Lines assembled: 52
Errors: 0

BIN
samples/hello2.obj Normal file

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299
samples/instructions.lst Normal file
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@ -0,0 +1,299 @@
Tue Jan 3 2017 22:11 Page 1
***************************************
** WDC 65C816 Macro Assembler **
** **
** Version 3.49.1- Feb 6 2006 **
***************************************
1 00:0000: 00 12 brk $12
2 00:0002: 01 12 ora (<$12,x)
3 00:0004: 02 12 cop $12
4 00:0006: 03 12 ora <$12,s
5 00:0008: 04 12 tsb <$12
6 00:000A: 05 12 ora <$12
7 00:000C: 06 12 asl <$12
8 00:000E: 07 12 ora [<$12]
9 00:0010: 08 php
10 00:0011: 09 34 12 ora #$1234
11 00:0014: 0A asl
12 00:0015: 0B phd
13 00:0016: 0C 34 12 tsb |$1234
14 00:0019: 0D 34 12 ora |$1234
15 00:001C: 0E 34 12 asl |$1234
16 00:001F: 0F 56 34 12 ora >$123456
17 ;
18 00:0023: 10 00 bpl *+2
19 00:0025: 11 12 ora (<$12),y
20 00:0027: 12 12 ora (<$12)
21 00:0029: 13 12 ora (<$12,s),y
22 00:002B: 14 12 trb <$12
23 00:002D: 15 12 ora <$12,x
24 00:002F: 16 12 asl <$12,x
25 00:0031: 17 12 ora [<$12],y
26 00:0033: 18 clc
27 00:0034: 19 34 12 ora |$1234,y
28 00:0037: 1A inc
29 00:0038: 1B tcs
30 00:0039: 1C 34 12 trb |$1234
31 00:003C: 1D 34 12 ora |$1234,x
32 00:003F: 1E 34 12 asl |$1234,x
33 00:0042: 1F 56 34 12 ora >$123456,x
34 ;
35 00:0046: 20 34 12 jsr |$1234
36 00:0049: 21 12 and (<$12,x)
37 00:004B: 22 56 34 12 jsl >$123456
38 00:004F: 23 12 and <$12,s
39 00:0051: 24 12 bit <$12
40 00:0053: 25 12 and <$12
41 00:0055: 26 12 rol <$12
42 00:0057: 27 12 and [<$12]
43 00:0059: 28 plp
44 00:005A: 29 34 12 and #$1234
45 00:005D: 2A rol
46 00:005E: 2B pld
47 00:005F: 2C 34 12 bit |$1234
48 00:0062: 2D 34 12 and |$1234
49 00:0065: 2E 34 12 rol |$1234
50 00:0068: 2F 56 34 12 and >$123456
51 ;
52 00:006C: 30 00 bmi *+2
Tue Jan 3 2017 22:11 Page 2
53 00:006E: 31 12 and (<$12),y
54 00:0070: 32 12 and (<$12)
55 00:0072: 33 12 and (<$12,s),y
56 00:0074: 34 12 bit <$12,x
57 00:0076: 35 12 and <$12,x
58 00:0078: 36 12 rol <$12,x
59 00:007A: 37 12 and [<$12],y
60 00:007C: 38 sec
61 00:007D: 39 34 12 and |$1234,y
62 00:0080: 3A dec
63 00:0081: 3B tsc
64 00:0082: 3C 34 12 bit |$1234,x
65 00:0085: 3D 34 12 and |$1234,x
66 00:0088: 3E 34 12 rol |$1234,x
67 00:008B: 3F 56 34 12 and >$123456,x
68 ;
69 00:008F: 40 rti
70 00:0090: 41 12 eor (<$12,x)
71 00:0092: 42 12 wdm $12
72 00:0094: 43 12 eor <$12,s
73 00:0096: 44 34 12 mvp $12,$34
74 00:0099: 45 12 eor <$12
75 00:009B: 46 12 lsr <$12
76 00:009D: 47 12 eor [<$12]
77 00:009F: 48 pha
78 00:00A0: 49 34 12 eor #$1234
79 00:00A3: 4A lsr
80 00:00A4: 4B phk
81 00:00A5: 4C 34 12 jmp |$1234
82 00:00A8: 4D 34 12 eor |$1234
83 00:00AB: 4E 34 12 lsr |$1234
84 00:00AE: 4F 56 34 12 eor >$123456
85 ;
86 00:00B2: 50 00 bvc *+2
87 00:00B4: 51 12 eor (<$12),y
88 00:00B6: 52 12 eor (<$12)
89 00:00B8: 53 12 eor (<$12,s),y
90 00:00BA: 54 34 12 mvn $12,$34
91 00:00BD: 55 12 eor <$12,x
92 00:00BF: 56 12 lsr <$12,x
93 00:00C1: 57 12 eor [<$12],y
94 00:00C3: 58 cli
95 00:00C4: 59 34 12 eor |$1234,y
96 00:00C7: 5A phy
97 00:00C8: 5B tcd
98 00:00C9: 5C 56 34 12 jml >$123456
99 00:00CD: 5D 34 12 eor |$1234,x
100 00:00D0: 5E 34 12 lsr |$1234,x
101 00:00D3: 5F 56 34 12 eor >$123456,x
102 ;
103 00:00D7: 60 rts
104 00:00D8: 61 12 adc (<$12,x)
105 00:00DA: 62 00 00 per *+3
106 00:00DD: 63 12 adc <$12,s
107 00:00DF: 64 12 stz <$12
108 00:00E1: 65 12 adc <$12
109 00:00E3: 66 12 ror <$12
110 00:00E5: 67 12 adc [<$12]
Tue Jan 3 2017 22:11 Page 3
111 00:00E7: 68 pla
112 00:00E8: 69 34 12 adc #$1234
113 00:00EB: 6A ror
114 00:00EC: 6B rtl
115 00:00ED: 6C 34 12 jmp (|$1234)
116 00:00F0: 6D 34 12 adc |$1234
117 00:00F3: 6E 34 12 ror |$1234
118 00:00F6: 6F 56 34 12 adc >$123456
119 ;
120 00:00FA: 70 00 bvs *+2
121 00:00FC: 71 12 adc (<$12),y
122 00:00FE: 72 12 adc (<$12)
123 00:0100: 73 12 adc (<$12,s),y
124 00:0102: 74 12 stz <$12,x
125 00:0104: 75 12 adc <$12,x
126 00:0106: 76 12 ror <$12,x
127 00:0108: 77 12 adc [<$12],y
128 00:010A: 78 sei
129 00:010B: 79 34 12 adc |$1234,y
130 00:010E: 7A ply
131 00:010F: 7B tdc
132 00:0110: 7C 34 12 jmp (|$1234,x)
133 00:0113: 7D 34 12 adc |$1234,x
134 00:0116: 7E 34 12 ror |$1234,x
135 00:0119: 7F 56 34 12 adc >$123456,x
136 ;
137 00:011D: 80 00 bra *+2
138 00:011F: 81 12 sta (<$12,x)
139 00:0121: 82 00 00 brl *+3
140 00:0124: 83 12 sta <$12,s
141 00:0126: 84 12 sty <$12
142 00:0128: 85 12 sta <$12
143 00:012A: 86 12 stx <$12
144 00:012C: 87 12 sta [<$12]
145 00:012E: 88 dey
146 00:012F: 89 34 12 bit #$1234
147 00:0132: 8A txa
148 00:0133: 8B phb
149 00:0134: 8C 34 12 sty |$1234
150 00:0137: 8D 34 12 sta |$1234
151 00:013A: 8E 34 12 stx |$1234
152 00:013D: 8F 56 34 12 sta >$123456
153 ;
154 00:0141: 90 00 bcc *+2
155 00:0143: 91 12 sta (<$12),y
156 00:0145: 92 12 sta (<$12)
157 00:0147: 93 12 sta (<$12,s),y
158 00:0149: 94 12 sty <$12,x
159 00:014B: 95 12 sta <$12,x
160 00:014D: 96 12 stx <$12,y
161 00:014F: 97 12 sta [<$12],y
162 00:0151: 98 tya
163 00:0152: 99 34 12 sta |$1234,y
164 00:0155: 9A txs
165 00:0156: 9B txy
166 00:0157: 9C 34 12 stz |$1234
167 00:015A: 9D 34 12 sta |$1234,x
168 00:015D: 9E 34 12 stz |$1234,x
Tue Jan 3 2017 22:11 Page 4
169 00:0160: 9F 56 34 12 sta >$123456,x
170 ;
171 00:0164: A0 34 12 ldy #$1234
172 00:0167: A1 12 lda (<$12,x)
173 00:0169: A2 34 12 ldx #$1234
174 00:016C: A3 12 lda <$12,s
175 00:016E: A4 12 ldy <$12
176 00:0170: A5 12 lda <$12
177 00:0172: A6 12 ldx <$12
178 00:0174: A7 12 lda [<$12]
179 00:0176: A8 tay
180 00:0177: A9 34 12 lda #$1234
181 00:017A: AA tax
182 00:017B: AB plb
183 00:017C: AC 34 12 ldy |$1234
184 00:017F: AD 34 12 lda |$1234
185 00:0182: AE 34 12 ldx |$1234
186 00:0185: AF 56 34 12 lda >$123456
187 ;
188 00:0189: B0 00 bcs *+2
189 00:018B: B1 12 lda (<$12),y
190 00:018D: B2 12 lda (<$12)
191 00:018F: B3 12 lda (<$12,s),y
192 00:0191: B4 12 ldy <$12,x
193 00:0193: B5 12 lda <$12,x
194 00:0195: B6 12 ldx <$12,y
195 00:0197: B7 12 lda [<$12],y
196 00:0199: B8 clv
197 00:019A: B9 34 12 lda |$1234,y
198 00:019D: BA tsx
199 00:019E: BB tyx
200 00:019F: BC 34 12 ldy |$1234,x
201 00:01A2: BD 34 12 lda |$1234,x
202 00:01A5: BE 34 12 ldx |$1234,y
203 00:01A8: BF 56 34 12 lda >$123456,x
204 ;
205 00:01AC: C0 34 12 cpy #$1234
206 00:01AF: C1 12 cmp (<$12,x)
207 00:01B1: C2 00 rep #$00
208 00:01B3: C3 12 cmp <$12,s
209 00:01B5: C4 12 cpy <$12
210 00:01B7: C5 12 cmp <$12
211 00:01B9: C6 12 dec <$12
212 00:01BB: C7 12 cmp [<$12]
213 00:01BD: C8 iny
214 00:01BE: C9 34 12 cmp #$1234
215 00:01C1: CA dex
216 00:01C2: CB wai
217 00:01C3: CC 34 12 cpy |$1234
218 00:01C6: CD 34 12 cmp |$1234
219 00:01C9: CE 34 12 dec |$1234
220 00:01CC: CF 56 34 12 cmp >$123456
221 ;
222 00:01D0: D0 00 bne *+2
223 00:01D2: D1 12 cmp (<$12),y
224 00:01D4: D2 12 cmp (<$12)
225 00:01D6: D3 12 cmp (<$12,s),y
226 00:01D8: D4 12 pei (<$12)
Tue Jan 3 2017 22:11 Page 5
227 00:01DA: D5 12 cmp <$12,x
228 00:01DC: D6 12 dec <$12,x
229 00:01DE: D7 12 cmp [<$12],y
230 00:01E0: D8 cld
231 00:01E1: D9 34 12 cmp |$1234,y
232 00:01E4: DA phx
233 00:01E5: DB stp
234 00:01E6: DC 34 12 jml ($1234) ; was jml [$1234]
235 ;jmp [$1234] ; ok!
236 ;jml [$1234] ; error!
237 00:01E9: DD 34 12 cmp |$1234,x
238 00:01EC: DE 34 12 dec |$1234,x
239 00:01EF: DF 56 34 12 cmp >$123456,x
240 ;
241 00:01F3: E0 34 12 cpx #$1234
242 00:01F6: E1 12 sbc (<$12,x)
243 00:01F8: E2 00 sep #$00
244 00:01FA: E3 12 sbc <$12,s
245 00:01FC: E4 12 cpx <$12
246 00:01FE: E5 12 sbc <$12
247 00:0200: E6 12 inc <$12
248 00:0202: E7 12 sbc [<$12]
249 00:0204: E8 inx
250 00:0205: E9 34 12 sbc #$1234
251 00:0208: EA nop
252 00:0209: EB xba
253 00:020A: EC 34 12 cpx |$1234
254 00:020D: ED 34 12 sbc |$1234
255 00:0210: EE 34 12 inc |$1234
256 00:0213: EF 56 34 12 sbc >$123456
257 ;
258 00:0217: F0 00 beq *+2
259 00:0219: F1 12 sbc (<$12),y
260 00:021B: F2 12 sbc (<$12)
261 00:021D: F3 12 sbc (<$12,s),y
262 00:021F: F4 34 12 pea |$1234
263 00:0222: F5 12 sbc <$12,x
264 00:0224: F6 12 inc <$12,x
265 00:0226: F7 12 sbc [<$12],y
266 00:0228: F8 sed
267 00:0229: F9 34 12 sbc |$1234,y
268 00:022C: FA plx
269 00:022D: FB xce
270 00:022E: FC 34 12 jsr (|$1234,x)
271 00:0231: FD 34 12 sbc |$1234,x
272 00:0234: FE 34 12 inc |$1234,x
273 00:0237: FF 56 34 12 sbc >$123456,x
274 ;
Lines assembled: 274
Errors: 0

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samples/instructions.obj Normal file

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