mirror of
https://github.com/peterdell/wudsn-ide.git
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418 lines
10 KiB
XML
418 lines
10 KiB
XML
<?xml version="1.0" encoding="iso-8859-1"?>
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<instructionset
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completionProposalAutoActivationCharacters=""
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singleLineCommentDelimiters=";"
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multipleLinesCommentDelimiters=""
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stringDelimiterCharacters="""
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blockDefinitionCharacters=""
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identifiersCaseSensitive="false"
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identifierStartCharacters="_ABCDEFGHIJKLMNOPQRSTUVWXYZabcdefghijklmnopqrstuvwxyz"
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identifierPartCharacters="_ABCDEFGHIJKLMNOPQRSTUVWXYZabcdefghijklmnopqrstuvwxyz0123456789"
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identifierSeparatorCharacter=""
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labelDefinitionSuffixCharacter=""
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macroUsagePrefixCharacter=""
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instructionsCaseSensitive="false"
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sourceIncludeDefaultExtension="">
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<directive
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cpus="*"
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name="ALIGN"
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title="_A_l_i_g_n program counter"
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type="DIRECTIVE"
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proposal="ALIGN _"/>
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<directive
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cpus="*"
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name="BYTE"
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title="Declare constant as _b_y_t_e"
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type="DIRECTIVE"
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proposal="BYTE _"/>
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<directive
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cpus="*"
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name="DC"
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title="_Declare _constant"
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type="DIRECTIVE"
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proposal="DC _"/>
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<directive
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cpus="*"
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name="DC.B"
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title="_Declare _constant as _byte"
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type="DIRECTIVE"
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proposal="DC.B _"/>
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<directive
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cpus="*"
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name="DC.L"
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title="_Declare _constant as _long"
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type="DIRECTIVE"
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proposal="DC.L _"/>
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<directive
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cpus="*"
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name="DC.W"
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title="_Declare _constant as _word"
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type="DIRECTIVE"
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proposal="DC.W _"/>
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<directive
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cpus="*"
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name="DS"
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title="_Declare _space"
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type="DIRECTIVE"
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proposal="DS _"/>
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<directive
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cpus="*"
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name="DS.B"
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title="_Declare _space in _bytes"
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type="DIRECTIVE"
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proposal="DS.B _"/>
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<directive
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cpus="*"
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name="DS.L"
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title="_Declare _space in _longs"
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type="DIRECTIVE"
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proposal="DS.L _"/>
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<directive
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cpus="*"
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name="DS.W"
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title="_Declare _space in _words"
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type="DIRECTIVE"
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proposal="DS.W _"/>
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<directive
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cpus="*"
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name="DV"
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title="_Declare _value"
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type="DIRECTIVE"
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proposal="DV _"/>
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<directive
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cpus="*"
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name="DV.B"
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title="_Declare _value as _byte"
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type="DIRECTIVE"
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proposal="DV.B _"/>
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<directive
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cpus="*"
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name="DV.L"
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title="_Declare _value as _long"
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type="DIRECTIVE"
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proposal="DV.L _"/>
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<directive
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cpus="*"
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name="DV.W"
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title="_Declare _value as _word"
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type="DIRECTIVE"
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proposal="DV.W _"/>
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<directive
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cpus="*"
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name="ECHO"
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title="_E_c_h_o"
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type="DIRECTIVE"
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proposal="ECHO _"/>
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<directive
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cpus="*"
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name="EIF"
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title="_End of _I_F"
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type="END_FOLDING_BLOCK_DIRECTIVE"
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proposal="EIF_"/>
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<directive
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cpus="*"
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name="ELSE"
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title="_E_l_s_e"
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type="DIRECTIVE"
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proposal="ELSE_"/>
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<directive
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cpus="*"
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name="END"
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title="_E_n_d assmbly"
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type="DIRECTIVE"
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proposal="END\n_"/>
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<directive
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cpus="*"
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name="ENDIF"
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title="_E_n_d of _I_F"
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type="END_FOLDING_BLOCK_DIRECTIVE"
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proposal="ENDIF_"/>
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<directive
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cpus="*"
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name="ENDM"
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title="_E_n_d of _macro"
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type="END_SECTION_DIRECTIVE"
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proposal="ENDM_"/>
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<directive
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cpus="*"
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name="EQM"
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title="Set _e_quate _macro"
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type="DIRECTIVE"
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proposal="EQM _"/>
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<directive
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cpus="*"
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name="EQU"
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title="Set _e_q_uate"
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type="DIRECTIVE"
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proposal="EQU _"/>
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<directive
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cpus="*"
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name="ERR"
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title="End assmbly with _e_r_ror"
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type="DIRECTIVE"
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proposal="ERR _"/>
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<directive
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cpus="*"
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name="HEX"
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title="Declare raw _h_e_x data"
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type="DIRECTIVE"
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proposal="HEX _"/>
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<directive
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cpus="*"
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name="IF"
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title="_I_f"
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type="BEGIN_FOLDING_BLOCK_DIRECTIVE"
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proposal="IF _\nENDIF"/>
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<directive
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cpus="*"
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name="IFCONST"
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title="_I_f _c_o_n_s_tant defined"
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type="BEGIN_FOLDING_BLOCK_DIRECTIVE"
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proposal="IFCONST _\nENDIF"/>
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<directive
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cpus="*"
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name="IFNCONST"
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title="_I_f _not _c_o_n_s_tant defined"
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type="BEGIN_FOLDING_BLOCK_DIRECTIVE"
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proposal="IFNCONST _\nENDIF"/>
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<directive
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cpus="*"
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name="INCBIN"
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title="_I_n_clude _b_i_nary file"
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type="BINARY_INCLUDE_DIRECTIVE"
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proposal="INCBIN "_""/>
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<directive
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cpus="*"
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name="INCDIR"
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title="_I_n_clude _d_i_rectory"
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type="DIRECTIVE"
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proposal="INCDIR "_""/>
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<directive
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cpus="*"
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name="INCLUDE"
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title="_I_n_c_l_u_d_e source file"
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type="SOURCE_INCLUDE_DIRECTIVE"
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proposal="INCLUDE "_""/>
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<directive
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cpus="*"
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name="LIST"
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title="Turn _l_i_s_ting ON or OFF"
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type="DIRECTIVE"
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proposal="LIST _"/>
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<directive
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cpus="*"
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name="LONG"
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title="Declare constant as _l_o_n_g"
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type="DIRECTIVE"
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proposal="LONG _"/>
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<directive
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cpus="*"
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name="MAC"
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title="Define _m_a_cro"
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type="BEGIN_MACRO_DEFINITION_SECTION_DIRECTIVE"
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proposal="MAC _\nENDM _"/>
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<directive
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cpus="*"
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name="MEXIT"
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title="_Macro _e_x_i_t"
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type="DIRECTIVE"
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proposal="MEXIT_"/>
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<directive
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cpus="*"
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name="ORG"
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title="Set _o_ri_gin"
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type="BEGIN_IMPLEMENTATION_SECTION_DIRECTIVE"
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proposal="ORG _"/>
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<directive
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cpus="*"
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name="PROCESSOR"
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title="Set _p_r_o_c_e_s_s_o_r model"
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type="DIRECTIVE"
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proposal="PROCESSOR 6502\n_"/>
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<directive
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cpus="*"
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name="REND"
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title="_Relocatable origin _e_n_d"
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type="DIRECTIVE"
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proposal="REND_"/>
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<directive
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cpus="*"
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name="REPEAT"
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title="Begin _r_e_p_e_a_t block"
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type="BEGIN_REPEAT_SECTION_DIRECTIVE"
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proposal="REPEAT _\nREPEND"/>
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<directive
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cpus="*"
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name="REPEND"
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title="_R_e_peat block _e_n_d"
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type="END_SECTION_DIRECTIVE"
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proposal="REPEND_"/>
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<directive
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cpus="*"
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name="RORG"
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title="Set _relocatable _o_ri_gin"
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type="DIRECTIVE"
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proposal="RORG _"/>
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<directive
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cpus="*"
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name="SEG"
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title="Start _s_e_gment"
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type="DIRECTIVE"
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proposal="SEG _"/>
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<directive
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cpus="*"
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name="SEG.U"
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title="Start _s_e_gment _uninitialized"
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type="DIRECTIVE"
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proposal="SEG.U _"/>
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<directive
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cpus="*"
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name="SET"
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title="_S_e_t redefinable symbol"
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type="DIRECTIVE"
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proposal="SET _"/>
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<directive
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cpus="*"
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name="SUBROUTINE"
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title="Begin _s_u_b_r_o_u_t_i_n_e"
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type="DIRECTIVE"
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proposal="SUBROUTINE\n_"/>
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<directive
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cpus="*"
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name="WORD"
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title="Declare constant as _w_o_r_d"
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type="DIRECTIVE"
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proposal="WORD _"/>
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<!-- Illegal opcodes are taken 1:1 from ATASM -->
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<illegalopcode
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cpus="MOS6502_ILLEGAL"
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name="ANC"
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title="_A_nd byte with accumulator and set _carry"
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proposal="ANC _"
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flags="N,Z,C"
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addressing="Immediate"/>
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<illegalopcode
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cpus="MOS6502_ILLEGAL"
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name="ANE"
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title="_A_nd X register with accumulator but _exact operation unknown"
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proposal="ANE _"
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addressing="Immediate"/>
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<illegalopcode
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cpus="MOS6502_ILLEGAL"
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name="ARR"
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title="_And byte with accumulator then _rotate one bit _right in accumulator"
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proposal="ARR _"
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flags="N,V,Z,C"
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addressing="Immediate"/>
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<illegalopcode
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cpus="MOS6502_ILLEGAL"
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name="DCP"
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title="_De_crement memory by one and com_pare with memory"
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proposal="DCP _"
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flags="C"
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addressing="Zero Page; Zero Page,X; Absolute; Absolute,X; Absolute,Y;(Indirect,X); (Indirect),Y"/>
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<illegalopcode
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cpus="MOS6502_ILLEGAL"
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name="ISB"
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title="_Increase memory by one, then _subtract memory from accumulator (with _borrow)"
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proposal="ISB _"
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flags="N,V,Z,C"
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addressing="Zero Page; Zero Page,X; Absolute; Absolute,X; Absolute,Y;(Indirect,X); (Indirect),Y"/>
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<illegalopcode
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cpus="MOS6502_ILLEGAL"
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name="LAS"
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title="_Load _accumulator, X register and _stack pointer with with memory anded stack pointer"
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proposal="LAS _"
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flags="N,Z"
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addressing="Absolute,Y"/>
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<illegalopcode
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cpus="MOS6502_ILLEGAL"
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name="LAX"
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title="_Load _accumulator and _X register with memory"
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proposal="LAX _"
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flags="N,Z"
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addressing="Zero Page; Zero Page,Y; Absolute; Absolute,Y;(Indirect,X);(Indirect),Y"/>
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<illegalopcode
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cpus="MOS6502_ILLEGAL"
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name="LXA"
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title="And byte with accumulator, then _load value into _X register and _accumulator"
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proposal="LXA _"
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flags="N,Z"
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addressing="Immediate"/>
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<illegalopcode
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cpus="MOS6502_ILLEGAL"
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name="RLA"
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title="_Rotate one bit _left in memory, then and _accumulator with memory"
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proposal="RLA _"
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flags="N,Z,C"
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addressing="Zero Page; Zero Page,X; Absolute; Absolute,X; Absolute,Y;(Indirect,X); (Indirect),Y"/>
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<illegalopcode
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cpus="MOS6502_ILLEGAL"
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name="RRA"
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title="_Rotate one bit _right in memory, then add memory to _accumulator (with carry)"
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proposal="RRA _"
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flags="N,V,Z,C"
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addressing="Zero Page; Zero Page,X; Absolute; Absolute,X; Absolute,Y;(Indirect,X); (Indirect),Y"/>
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<illegalopcode
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cpus="MOS6502_ILLEGAL"
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name="SAX"
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title="_Store _accumulator anded with _X register"
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proposal="SAX _"
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flags="N,Z"
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addressing="Zero Page;Zero Page,Y;(Indirect,X);Absolute"/>
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<illegalopcode
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cpus="MOS6502_ILLEGAL"
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name="SBX"
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title="_Subtract _byte from _X register (without borrow) after X register anded with the accumulator and store result in X register"
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proposal="SBX _"
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flags="N,Z,C"
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addressing="Immediate"/>
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<illegalopcode
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cpus="MOS6502_ILLEGAL"
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name="SHA"
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title="_Store (don't know what _H is for) X register anded with _accumulator anded with 7"
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proposal="SHA _"
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flags="-"
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addressing="Absolute,Y ;(Indirect),Y"/>
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<illegalopcode
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cpus="MOS6502_ILLEGAL"
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name="SHS"
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title="And X register with accumulator and move to stack pointer. _Store _high byte of the target address of the argument +1 anded with _stack pointer"
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proposal="SHS _"
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flags="-"
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addressing="Absolute,Y"/>
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<illegalopcode
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cpus="MOS6502_ILLEGAL"
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name="SHX"
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title="_Store _high byte of the target address of the argument +1 anded with _X register"
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proposal="SHX _"
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flags="-"
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addressing="Absolute,Y"/>
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<illegalopcode
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cpus="MOS6502_ILLEGAL"
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name="SHY"
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title="_Store _high byte of the target address of the argument +1 anded with _Y register"
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proposal="SHY _"
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flags="-"
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addressing="Absolute,x"/>
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<illegalopcode
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cpus="MOS6502_ILLEGAL"
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name="SLO"
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title="_Shift _left one bit in memory, then _or accumulator with memory"
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proposal="SLO _"
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flags="N,Z,C"
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addressing="Zero Page; Zero Page,X; Absolute; Absolute,X; Absolute,Y; (Indirect,X); (Indirect),Y"/>
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<illegalopcode
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cpus="MOS6502_ILLEGAL"
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name="SRE"
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title="_Shift _right one bit in memory, then _eor accumulator with memory"
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proposal="SRE _"
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flags="N,Z,C"
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addressing="Zero Page; Zero Page,X; Absolute; Absolute,X; Absolute,Y;(Indirect,X);(Indirect),Y"/>
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</instructionset>
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