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Adding an immediate mode version of BRK since the IRQ will treat it as a two byte instruction
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3
x65.cpp
3
x65.cpp
@ -403,6 +403,7 @@ enum AddrMode {
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AMM_IMM_DBL_XY = 1<<AMB_IMM_DBL_XY,
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// instruction group specific masks
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AMM_BRK = AMM_NON | AMM_IMM,
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AMM_BRA = AMM_BRANCH | AMM_ABS,
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AMM_ORA = AMM_IMM | AMM_ZP | AMM_ZP_X | AMM_ABS | AMM_ABS_Y | AMM_ABS_X | AMM_ZP_REL_X | AMM_ZP_Y_REL,
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AMM_STA = AMM_ZP | AMM_ZP_X | AMM_ABS | AMM_ABS_Y | AMM_ABS_X | AMM_ZP_REL_X | AMM_ZP_Y_REL,
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@ -462,7 +463,7 @@ struct mnem {
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struct mnem opcodes_6502[] = {
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// nam modes (zp,x) zp # $0000 (zp),y zp,x abs,y abs,x (xx) A empty
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{ "brk", AMM_NON, { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 } },
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{ "brk", AMM_BRK, { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 } },
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{ "jsr", AMM_ABS, { 0x00, 0x00, 0x00, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 } },
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{ "rti", AMM_NON, { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x40 } },
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{ "rts", AMM_NON, { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x60 } },
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