mirror of
https://github.com/ksherlock/x65.git
synced 2024-06-11 01:29:26 +00:00
Alias opcodes
- Added aliases to opcodes - Fixed XCode warnings - Revisited outdated comments - Fixed CPU / PROCESSOR keyword giving an error even if the argument was valid - Rearranged switch statements to be in a more logical order
This commit is contained in:
Carl-Henrik Skårstedt
parent
2c07d9285f
commit
d279d35f7e
18
README.md
18
README.md
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@ -105,7 +105,7 @@ Would yield 3 bytes where the address of a label can be calculated by taking the
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### <a name="labels">Labels
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Labels come in two flavors: **Addresses** (PC based) or **Values** (Evaluated from an expression). An address label is simply placed somewhere in code and a value label is follwed by '**=**' and an expression. All labels are rewritable so it is fine to do things like NumInstance = NumInstance+1. Value assignments can be prefixed with '.const' or '.label' but is not required to be prefixed by anything.
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Labels come in two flavors: **Addresses** (PC based) or **Values** (Evaluated from an expression). An address label is simply placed somewhere in code and a value label is followed by '**=**' and an expression. All labels are rewritable so it is fine to do things like NumInstance = NumInstance+1. Value assignments can be prefixed with '.const' or '.label' but is not required to be prefixed by anything, the CONST keyword should cause an error if the label is modified in the same source file.
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*Local labels* exist inbetween *global labels* and gets discarded whenever a new global label is added. The syntax for local labels are one of: prefix with period, at-sign, exclamation mark or suffix with $, as in: **.local** or **!local** or **@local** or **local$**. Both value labels and address labels can be local labels.
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@ -485,7 +485,7 @@ Adds a folder to search for INCLUDE, INCBIN, etc. files in
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The accumulator and index register mode will be reset to 8 bits if the CPU is switched to something other than 65816.
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An alternative method is to add .b/.w to immediat mode instructions that support 16 bit modes such as:
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An alternative method is to add .b/.w to immediate mode instructions that support 16 bit modes such as:
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```
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ora.b #$21
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@ -586,15 +586,15 @@ SAV causes Merlin to save the result it has generated so far, which is somewhat
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## <a name="expressions">Expression syntax
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Expressions contain values, such as labels or raw numbers and operators including +, -, \*, /, & (and), | (or), ^ (eor), << (shift left), >> (shift right) similar to how expressions work in C. Parenthesis are supported for managing order of operations where C style precedence needs to be overrided. In addition there are some special characters supported:
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Expressions contain values, such as labels or raw numbers and operators including +, -, \*, /, & (and), | (or), ^ (eor), << (shift left), >> (shift right) similar to how expressions work in C. Parenthesis are supported for managing order of operations where C style precedence needs to be overridden. In addition there are some special characters supported:
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* \*: Current address (PC). This conflicts with the use of \* as multiply so multiply will be interpreted only after a value or right parenthesis
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* <: If less than is not follwed by another '<' in an expression this evaluates to the low byte of a value (and $ff)
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* <: If less than is not followed by another '<' in an expression this evaluates to the low byte of a value (and $ff)
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* >: If greater than is not followed by another '>' in an expression this evaluates to the high byte of a value (>>8)
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* ^: Inbetween two values '^' is an eor operation, as a prefix to values it extracts the bank byte (v>>24).
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* !: Start of scope (use like an address label in expression)
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* %: First address after scope (use like an address label in expression)
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* $: Preceeds hexadecimal value
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* $: Precedes hexadecimal value
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* %: If immediately followed by '0' or '1' this is a binary value and not scope closure address
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Example:
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@ -637,10 +637,10 @@ Alternative syntax for macros:
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To support the syntax of other assemblers macro parameters can also be defined through space separated arguments:
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```
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macro loop_end op lbl {
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op
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bne lbl
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}
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macro loop_end op lbl {
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op
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bne lbl
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}
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ldx #4
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{
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300
x65.cpp
300
x65.cpp
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@ -458,9 +458,9 @@ struct mnem opcodes_6502[] = {
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{ "nop", AMM_NON, { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xea } }
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};
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char* aliases_6502[] = {
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const char* aliases_6502[] = {
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"bcc", "blt",
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"bvs", "bge",
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"bcs", "bge",
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nullptr, nullptr
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};
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@ -559,9 +559,9 @@ struct mnem opcodes_65C02[] = {
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{ "bbs7", AMC_BBR, { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xea, 0x00, 0x00, 0xff } },
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};
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char* aliases_65C02[] = {
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const char* aliases_65C02[] = {
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"bcc", "blt",
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"bvs", "bge",
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"bcs", "bge",
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nullptr, nullptr
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};
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@ -674,9 +674,9 @@ struct mnem opcodes_65816[] = {
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{ "xce", AMM_NON, { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfB, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 } },
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};
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char* aliases_65816[] = {
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const char* aliases_65816[] = {
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"bcc", "blt",
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"bvs", "bge",
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"bcs", "bge",
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"tcs", "tas",
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"tsc", "tsa",
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"xba", "swa",
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@ -685,7 +685,6 @@ char* aliases_65816[] = {
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nullptr, nullptr
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};
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static const int num_opcodes_65816 = sizeof(opcodes_65816) / sizeof(opcodes_65816[0]);
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@ -721,8 +720,8 @@ enum CPUIndex {
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struct CPUDetails {
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mnem *opcodes;
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int num_opcodes;
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char* name;
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char** aliases;
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const char* name;
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const char** aliases;
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} aCPUs[] = {
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{ opcodes_6502, num_opcodes_6502, "6502", aliases_6502 },
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{ opcodes_65C02, num_opcodes_65C02-18, "65C02", aliases_65C02 },
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@ -959,7 +958,7 @@ public:
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};
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// relocs are cheaper than full expressions and work with
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// local labels for relative sections which could otherwise
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// local labels for relative sections which would otherwise
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// be out of scope at link time.
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struct Reloc {
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@ -992,7 +991,7 @@ struct ListLine {
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typedef std::vector<struct ListLine> Listing;
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// start of data section support
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// Default is a fixed address section at $1000
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// Default is a relative section
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// Whenever org or dum with address is encountered => new section
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// If org is fixed and < $200 then it is a dummy section Otherwise clear dummy section
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typedef struct Section {
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@ -1052,8 +1051,7 @@ typedef struct Section {
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void AddReloc(int base, int offset, int section, Reloc::Type type = Reloc::WORD);
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Section() : pRelocs(nullptr), pListing(nullptr) { reset(); }
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Section(strref _name, int _address) : pRelocs(nullptr), pListing(nullptr)
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{
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Section(strref _name, int _address) : pRelocs(nullptr), pListing(nullptr) {
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reset(); name = _name; start_address = load_address = address = _address;
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address_assigned = true;
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}
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@ -1063,7 +1061,7 @@ typedef struct Section {
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}
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~Section() { }
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// Appending data to a section
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// Append data to a section
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void CheckOutputCapacity(unsigned int addSize);
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void AddByte(int b);
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void AddWord(int w);
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@ -1222,16 +1220,15 @@ public:
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pairArray<unsigned int, Macro> macros;
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pairArray<unsigned int, LabelPool> labelPools;
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pairArray<unsigned int, LabelStruct> labelStructs;
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// labels matching xdef names will be marked as external
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pairArray<unsigned int, strref> xdefs;
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pairArray<unsigned int, strref> xdefs; // labels matching xdef names will be marked as external
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std::vector<LateEval> lateEval;
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std::vector<LocalLabelRecord> localLabels;
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std::vector<char*> loadedData; // free when assembler is completed
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std::vector<char*> loadedData; // free when assembler is completed
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std::vector<MemberOffset> structMembers; // labelStructs refer to sets of structMembers
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std::vector<strref> includePaths;
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std::vector<Section> allSections;
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std::vector<ExtLabels> externals; // external labels organized by object file
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std::vector<ExtLabels> externals; // external labels organized by object file
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MapSymbolArray map;
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// CPU target
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@ -1279,7 +1276,7 @@ public:
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// Generate assembler listing if requested
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bool List(strref filename);
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// Generate source for all valid instructions
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// Generate source for all valid instructions and addressing modes for current CPU
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bool AllOpcodes(strref filename);
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// Clean up memory allocations, reset assembler state
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@ -1413,7 +1410,8 @@ void Asm::Cleanup() {
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for (std::vector<ExtLabels>::iterator exti = externals.begin(); exti !=externals.end(); ++exti)
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exti->labels.clear();
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externals.clear();
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SetSection(strref("default")); // this section is relocatable but is assigned address $1000 if exporting without directives
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// this section is relocatable but is assigned address $1000 if exporting without directives
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SetSection(strref("default"));
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current_section = &allSections[0];
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syntax = SYNTAX_SANE;
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scope_depth = 0;
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@ -1434,7 +1432,7 @@ int sortHashLookup(const void *A, const void *B) {
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return _A->op_hash > _B->op_hash ? 1 : -1;
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}
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int BuildInstructionTable(OPLookup *pInstr, int maxInstructions, struct mnem *opcodes, int count)
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int BuildInstructionTable(OPLookup *pInstr, int maxInstructions, struct mnem *opcodes, int count, const char **aliases)
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{
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// create an instruction table (mnemonic hash lookup)
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int numInstructions = 0;
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@ -1445,6 +1443,23 @@ int BuildInstructionTable(OPLookup *pInstr, int maxInstructions, struct mnem *op
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op.type = OT_MNEMONIC;
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}
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// add instruction aliases
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if (aliases) {
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while (*aliases) {
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strref orig(*aliases++);
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strref alias(*aliases++);
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for (int o=0; o<count; o++) {
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if (orig.same_str_case(opcodes[o].instr)) {
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OPLookup &op = pInstr[numInstructions++];
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op.op_hash = alias.fnv1a_lower();
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op.index = o;
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op.type = OT_MNEMONIC;
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break;
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}
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}
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}
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}
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// add assembler directives
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for (int d = 0; d<nDirectiveNames; d++) {
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OPLookup &op_hash = pInstr[numInstructions++];
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@ -1452,7 +1467,7 @@ int BuildInstructionTable(OPLookup *pInstr, int maxInstructions, struct mnem *op
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op_hash.index = (unsigned char)aDirectiveNames[d].directive;
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op_hash.type = OT_DIRECTIVE;
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}
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// sort table by hash for binary search lookup
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qsort(pInstr, numInstructions, sizeof(OPLookup), sortHashLookup);
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return numInstructions;
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@ -1465,7 +1480,7 @@ void Asm::SetCPU(CPUIndex CPU) {
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list_cpu = cpu;
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opcode_table = aCPUs[CPU].opcodes;
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opcode_count = aCPUs[CPU].num_opcodes;
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num_instructions = BuildInstructionTable(aInstructions, MAX_OPCODES_DIRECTIVES, opcode_table, opcode_count);
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num_instructions = BuildInstructionTable(aInstructions, MAX_OPCODES_DIRECTIVES, opcode_table, opcode_count, aCPUs[CPU].aliases);
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if (CPU != CPU_65816) {
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accumulator_16bit = false;
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index_reg_16bit = false;
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@ -1477,8 +1492,8 @@ char* Asm::LoadText(strref filename, size_t &size) {
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strown<512> file(filename);
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std::vector<strref>::iterator i = includePaths.begin();
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for (;;) {
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if (FILE *f = fopen(file.c_str(), "rb")) {
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fseek(f, 0, SEEK_END);
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if (FILE *f = fopen(file.c_str(), "rb")) { // rb is intended here since OS
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fseek(f, 0, SEEK_END); // eol conversion can do ugly things
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size_t _size = ftell(f);
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fseek(f, 0, SEEK_SET);
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if (char *buf = (char*)calloc(_size, 1)) {
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@ -1533,6 +1548,7 @@ char* Asm::LoadBinary(strref filename, size_t &size) {
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return nullptr;
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}
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// Create a new section with a fixed address
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void Asm::SetSection(strref name, int address)
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{
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if (name) {
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@ -1645,7 +1661,8 @@ unsigned char* Asm::BuildExport(strref append, int &file_size, int &addr)
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return nullptr;
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if (has_relative_section) {
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if (!has_fixed_section) {
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SetSection(strref(), 0x1000);
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start_address = 0x1000;
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SetSection(strref(), start_address);
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CurrSection().export_append = append;
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last_fixed_section = SectionId();
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}
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@ -1941,11 +1958,13 @@ void Asm::CheckOutputCapacity(unsigned int addSize) {
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// add a custom macro
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StatusCode Asm::AddMacro(strref macro, strref source_name, strref source_file, strref &left)
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{ //
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// Non-merlin macro types:
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// Recommended macro syntax:
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// macro name(optional params) { actual macro }
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//
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// -endm option macro syntax:
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// macro name arg\nactual macro\nendmacro
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//
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// Merlin macro:
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// Merlin macro syntax: (TODO: ignore arguments and use ]1, ]2, etc.)
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// name mac arg1 arg2\nactual macro\n[<<<]/[EOM]
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//
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strref name;
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@ -2499,7 +2518,7 @@ StatusCode Asm::EvalExpression(strref expression, const struct EvalContext &etx,
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case EVOP_SUB: // -
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if (ri==1)
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values[ri-1] = -values[ri-1];
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else {
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else if (ri>1) {
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ri--;
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for (int i = 0; i<num_sections; i++)
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section_counts[i][ri-1] -= section_counts[i][ri];
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@ -2669,21 +2688,6 @@ StatusCode Asm::CheckLateEval(strref added_label, int scope_end)
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}
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bool resolved = true;
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switch (i->type) {
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case LateEval::LET_BRANCH:
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value -= i->address+1;
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if (value<-128 || value>127) {
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i = lateEval.erase(i);
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return ERROR_BRANCH_OUT_OF_RANGE;
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} if (trg >= allSections[sec].size())
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return ERROR_SECTION_TARGET_OFFSET_OUT_OF_RANGE;
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allSections[sec].SetByte(trg, value);
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break;
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case LateEval::LET_BRANCH_16:
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value -= i->address+2;
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if (trg >= allSections[sec].size())
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return ERROR_SECTION_TARGET_OFFSET_OUT_OF_RANGE;
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allSections[sec].SetWord(trg, value);
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break;
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case LateEval::LET_BYTE:
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if (ret==STATUS_RELATIVE_SECTION) {
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if (i->section<0)
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@ -2698,6 +2702,7 @@ StatusCode Asm::CheckLateEval(strref added_label, int scope_end)
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return ERROR_SECTION_TARGET_OFFSET_OUT_OF_RANGE;
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allSections[sec].SetByte(trg, value);
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break;
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case LateEval::LET_ABS_REF:
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if (ret==STATUS_RELATIVE_SECTION) {
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if (i->section<0)
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@ -2711,6 +2716,7 @@ StatusCode Asm::CheckLateEval(strref added_label, int scope_end)
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return ERROR_SECTION_TARGET_OFFSET_OUT_OF_RANGE;
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allSections[sec].SetWord(trg, value);
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break;
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case LateEval::LET_ABS_L_REF:
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if (ret==STATUS_RELATIVE_SECTION) {
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if (i->section<0)
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@ -2724,6 +2730,24 @@ StatusCode Asm::CheckLateEval(strref added_label, int scope_end)
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return ERROR_SECTION_TARGET_OFFSET_OUT_OF_RANGE;
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allSections[sec].SetTriple(trg, value);
|
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break;
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|
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case LateEval::LET_BRANCH:
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value -= i->address+1;
|
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if (value<-128 || value>127) {
|
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i = lateEval.erase(i);
|
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return ERROR_BRANCH_OUT_OF_RANGE;
|
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} if (trg >= allSections[sec].size())
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return ERROR_SECTION_TARGET_OFFSET_OUT_OF_RANGE;
|
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allSections[sec].SetByte(trg, value);
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break;
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case LateEval::LET_BRANCH_16:
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value -= i->address+2;
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||||
if (trg >= allSections[sec].size())
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return ERROR_SECTION_TARGET_OFFSET_OUT_OF_RANGE;
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allSections[sec].SetWord(trg, value);
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break;
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case LateEval::LET_LABEL: {
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Label *label = GetLabel(i->label, i->file_ref);
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if (!label)
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@ -3300,6 +3324,7 @@ int LookupOpCodeIndex(unsigned int hash, OPLookup *lookup, int count)
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return -1; // index not found
|
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}
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// Encountered a REPT or LUP
|
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StatusCode Asm::Directive_Rept(strref line, strref source_file)
|
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{
|
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SourceContext &ctx = contextStack.curr();
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@ -3370,8 +3395,9 @@ StatusCode Asm::ApplyDirective(AssemblerDirective dir, strref line, strref sourc
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case AD_CPU:
|
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for (int c = 0; c < nCPUs; c++) {
|
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if (line.same_str(aCPUs[c].name)) {
|
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SetCPU((CPUIndex)c);
|
||||
break;
|
||||
if (c != cpu)
|
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SetCPU((CPUIndex)c);
|
||||
return STATUS_OK;
|
||||
}
|
||||
}
|
||||
return ERROR_CPU_NOT_SUPPORTED;
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@ -3616,7 +3642,6 @@ StatusCode Asm::ApplyDirective(AssemblerDirective dir, strref line, strref sourc
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SetCPU(CPU_65C02);
|
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break;
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case AD_TEXT: { // text: add text within quotes
|
||||
// for now just copy the windows ascii. TODO: Convert to petscii.
|
||||
// https://en.wikipedia.org/wiki/PETSCII
|
||||
// ascii: no change
|
||||
// shifted: a-z => $41.. A-Z => $61..
|
||||
|
|
@ -3857,6 +3882,7 @@ StatusCode Asm::ApplyDirective(AssemblerDirective dir, strref line, strref sourc
|
|||
return error;
|
||||
}
|
||||
|
||||
// Make an educated guess at the intended address mode from an opcode argument
|
||||
StatusCode Asm::GetAddressMode(strref line, bool flipXY, AddrMode &addrMode, int &len, strref &expression)
|
||||
{
|
||||
bool force_zp = false;
|
||||
|
|
@ -3937,7 +3963,7 @@ StatusCode Asm::GetAddressMode(strref line, bool flipXY, AddrMode &addrMode, int
|
|||
return STATUS_OK;
|
||||
}
|
||||
|
||||
// Push an opcode to the output buffer
|
||||
// Push an opcode to the output buffer in the current section
|
||||
StatusCode Asm::AddOpcode(strref line, int index, strref source_file)
|
||||
{
|
||||
StatusCode error = STATUS_OK;
|
||||
|
|
@ -4024,26 +4050,19 @@ StatusCode Asm::AddOpcode(strref line, int index, strref source_file)
|
|||
addrMode = AMB_ABS_L_X;
|
||||
}
|
||||
|
||||
bool valid_addressing_mode = !!(validModes & (1 << addrMode));
|
||||
|
||||
if (!valid_addressing_mode) {
|
||||
if (addrMode==AMB_ZP_REL_X && (validModes & AMM_REL_X)) {
|
||||
if (!(validModes & (1 << addrMode))) {
|
||||
if (addrMode==AMB_ZP_REL_X && (validModes & AMM_REL_X))
|
||||
addrMode = AMB_REL_X;
|
||||
valid_addressing_mode = true;
|
||||
} else if (addrMode==AMB_REL && (validModes & AMM_ZP_REL)) {
|
||||
else if (addrMode==AMB_REL && (validModes & AMM_ZP_REL))
|
||||
addrMode = AMB_ZP_REL;
|
||||
valid_addressing_mode = true;
|
||||
} else if (addrMode==AMB_ABS && (validModes & AMM_ABS_L)) {
|
||||
else if (addrMode==AMB_ABS && (validModes & AMM_ABS_L))
|
||||
addrMode = AMB_ABS_L;
|
||||
valid_addressing_mode = true;
|
||||
} else if (addrMode==AMB_ABS_X && (validModes & AMM_ABS_L_X)) {
|
||||
else if (addrMode==AMB_ABS_X && (validModes & AMM_ABS_L_X))
|
||||
addrMode = AMB_ABS_L_X;
|
||||
valid_addressing_mode = true;
|
||||
} else if (addrMode==AMB_REL_L && (validModes & AMM_ZP_REL_L)) {
|
||||
else if (addrMode==AMB_REL_L && (validModes & AMM_ZP_REL_L))
|
||||
addrMode = AMB_ZP_REL_L;
|
||||
valid_addressing_mode = true;
|
||||
} else
|
||||
error = ERROR_INVALID_ADDRESSING_MODE;
|
||||
else
|
||||
return ERROR_INVALID_ADDRESSING_MODE;
|
||||
}
|
||||
|
||||
// Add the instruction and argument to the code
|
||||
|
|
@ -4085,10 +4104,6 @@ StatusCode Asm::AddOpcode(strref line, int index, strref source_file)
|
|||
codeArg = CA_THREE_BYTES;
|
||||
break;
|
||||
|
||||
case AMB_ACC: // 9 A
|
||||
case AMB_NON: // a
|
||||
break;
|
||||
|
||||
case AMB_ZP_ABS: // d $12, label
|
||||
codeArg = CA_BYTE_BRANCH;
|
||||
break;
|
||||
|
|
@ -4106,10 +4121,77 @@ StatusCode Asm::AddOpcode(strref line, int index, strref source_file)
|
|||
else
|
||||
codeArg = CA_ONE_BYTE;
|
||||
break;
|
||||
|
||||
case AMB_ACC: // 9 A
|
||||
case AMB_NON: // a
|
||||
default:
|
||||
break;
|
||||
|
||||
}
|
||||
}
|
||||
|
||||
switch (codeArg) {
|
||||
case CA_ONE_BYTE:
|
||||
if (evalLater)
|
||||
AddLateEval(CurrSection().DataOffset(), CurrSection().GetPC(), scope_address[scope_depth], expression, source_file, LateEval::LET_BYTE);
|
||||
else if (error == STATUS_RELATIVE_SECTION)
|
||||
CurrSection().AddReloc(target_section_offs, CurrSection().DataOffset(), target_section,
|
||||
target_section_type == Reloc::HI_BYTE ? Reloc::HI_BYTE : Reloc::LO_BYTE);
|
||||
AddByte(value);
|
||||
break;
|
||||
|
||||
case CA_TWO_BYTES:
|
||||
if (evalLater)
|
||||
AddLateEval(CurrSection().DataOffset(), CurrSection().GetPC(), scope_address[scope_depth], expression, source_file, LateEval::LET_ABS_REF);
|
||||
else if (error == STATUS_RELATIVE_SECTION) {
|
||||
CurrSection().AddReloc(target_section_offs, CurrSection().DataOffset(),
|
||||
target_section, target_section_type);
|
||||
value = 0;
|
||||
}
|
||||
AddWord(value);
|
||||
break;
|
||||
|
||||
case CA_THREE_BYTES:
|
||||
if (evalLater)
|
||||
AddLateEval(CurrSection().DataOffset(), CurrSection().GetPC(), scope_address[scope_depth], expression, source_file, LateEval::LET_ABS_L_REF);
|
||||
else if (error == STATUS_RELATIVE_SECTION) {
|
||||
CurrSection().AddReloc(target_section_offs, CurrSection().DataOffset(),
|
||||
target_section, target_section_type);
|
||||
value = 0;
|
||||
}
|
||||
AddTriple(value);
|
||||
break;
|
||||
|
||||
case CA_TWO_ARG_BYTES: {
|
||||
if (evalLater)
|
||||
AddLateEval(CurrSection().DataOffset(), CurrSection().GetPC(), scope_address[scope_depth], expression, source_file, LateEval::LET_BYTE);
|
||||
else if (error == STATUS_RELATIVE_SECTION) {
|
||||
CurrSection().AddReloc(target_section_offs, CurrSection().DataOffset(), target_section,
|
||||
target_section_type == Reloc::HI_BYTE ? Reloc::HI_BYTE : Reloc::LO_BYTE);
|
||||
}
|
||||
AddByte(value);
|
||||
struct EvalContext etx(CurrSection().GetPC()-2, scope_address[scope_depth], -1, -1);
|
||||
line.split_token_trim(',');
|
||||
error = EvalExpression(line, etx, value);
|
||||
if (error==STATUS_NOT_READY)
|
||||
AddLateEval(CurrSection().DataOffset(), CurrSection().GetPC(), scope_address[scope_depth], line, source_file, LateEval::LET_BYTE);
|
||||
AddByte(value);
|
||||
break;
|
||||
}
|
||||
case CA_BRANCH:
|
||||
if (evalLater)
|
||||
AddLateEval(CurrSection().DataOffset(), CurrSection().GetPC(), scope_address[scope_depth], expression, source_file, LateEval::LET_BRANCH);
|
||||
else if (((int)value - (int)CurrSection().GetPC()-1) < -128 || ((int)value - (int)CurrSection().GetPC()-1) > 127)
|
||||
error = ERROR_BRANCH_OUT_OF_RANGE;
|
||||
AddByte(evalLater ? 0 : (unsigned char)((int)value - (int)CurrSection().GetPC()) - 1);
|
||||
break;
|
||||
|
||||
case CA_BRANCH_16:
|
||||
if (evalLater)
|
||||
AddLateEval(CurrSection().DataOffset(), CurrSection().GetPC(), scope_address[scope_depth], expression, source_file, LateEval::LET_BRANCH_16);
|
||||
AddWord(evalLater ? 0 : (value-(CurrSection().GetPC()+2)));
|
||||
break;
|
||||
|
||||
case CA_BYTE_BRANCH: {
|
||||
if (evalLater)
|
||||
AddLateEval(CurrSection().DataOffset(), CurrSection().GetPC(), scope_address[scope_depth], expression, source_file, LateEval::LET_BYTE);
|
||||
|
|
@ -4127,62 +4209,6 @@ StatusCode Asm::AddOpcode(strref line, int index, strref source_file)
|
|||
AddByte(error == STATUS_NOT_READY ? 0 : (unsigned char)((int)value - (int)CurrSection().GetPC()) - 1);
|
||||
break;
|
||||
}
|
||||
case CA_BRANCH:
|
||||
if (evalLater)
|
||||
AddLateEval(CurrSection().DataOffset(), CurrSection().GetPC(), scope_address[scope_depth], expression, source_file, LateEval::LET_BRANCH);
|
||||
else if (((int)value - (int)CurrSection().GetPC()-1) < -128 || ((int)value - (int)CurrSection().GetPC()-1) > 127)
|
||||
error = ERROR_BRANCH_OUT_OF_RANGE;
|
||||
AddByte(evalLater ? 0 : (unsigned char)((int)value - (int)CurrSection().GetPC()) - 1);
|
||||
break;
|
||||
case CA_BRANCH_16:
|
||||
if (evalLater)
|
||||
AddLateEval(CurrSection().DataOffset(), CurrSection().GetPC(), scope_address[scope_depth], expression, source_file, LateEval::LET_BRANCH_16);
|
||||
AddWord(evalLater ? 0 : (value-(CurrSection().GetPC()+2)));
|
||||
break;
|
||||
case CA_ONE_BYTE:
|
||||
if (evalLater)
|
||||
AddLateEval(CurrSection().DataOffset(), CurrSection().GetPC(), scope_address[scope_depth], expression, source_file, LateEval::LET_BYTE);
|
||||
else if (error == STATUS_RELATIVE_SECTION)
|
||||
CurrSection().AddReloc(target_section_offs, CurrSection().DataOffset(), target_section,
|
||||
target_section_type == Reloc::HI_BYTE ? Reloc::HI_BYTE : Reloc::LO_BYTE);
|
||||
AddByte(value);
|
||||
break;
|
||||
case CA_TWO_ARG_BYTES: {
|
||||
if (evalLater)
|
||||
AddLateEval(CurrSection().DataOffset(), CurrSection().GetPC(), scope_address[scope_depth], expression, source_file, LateEval::LET_BYTE);
|
||||
else if (error == STATUS_RELATIVE_SECTION) {
|
||||
CurrSection().AddReloc(target_section_offs, CurrSection().DataOffset(), target_section,
|
||||
target_section_type == Reloc::HI_BYTE ? Reloc::HI_BYTE : Reloc::LO_BYTE);
|
||||
}
|
||||
AddByte(value);
|
||||
struct EvalContext etx(CurrSection().GetPC()-2, scope_address[scope_depth], -1, -1);
|
||||
line.split_token_trim(',');
|
||||
error = EvalExpression(line, etx, value);
|
||||
if (error==STATUS_NOT_READY)
|
||||
AddLateEval(CurrSection().DataOffset(), CurrSection().GetPC(), scope_address[scope_depth], line, source_file, LateEval::LET_BYTE);
|
||||
AddByte(value);
|
||||
break;
|
||||
}
|
||||
case CA_TWO_BYTES:
|
||||
if (evalLater)
|
||||
AddLateEval(CurrSection().DataOffset(), CurrSection().GetPC(), scope_address[scope_depth], expression, source_file, LateEval::LET_ABS_REF);
|
||||
else if (error == STATUS_RELATIVE_SECTION) {
|
||||
CurrSection().AddReloc(target_section_offs, CurrSection().DataOffset(),
|
||||
target_section, target_section_type);
|
||||
value = 0;
|
||||
}
|
||||
AddWord(value);
|
||||
break;
|
||||
case CA_THREE_BYTES:
|
||||
if (evalLater)
|
||||
AddLateEval(CurrSection().DataOffset(), CurrSection().GetPC(), scope_address[scope_depth], expression, source_file, LateEval::LET_ABS_L_REF);
|
||||
else if (error == STATUS_RELATIVE_SECTION) {
|
||||
CurrSection().AddReloc(target_section_offs, CurrSection().DataOffset(),
|
||||
target_section, target_section_type);
|
||||
value = 0;
|
||||
}
|
||||
AddTriple(value);
|
||||
break;
|
||||
case CA_NONE:
|
||||
break;
|
||||
}
|
||||
|
|
@ -4583,7 +4609,7 @@ bool Asm::AllOpcodes(strref filename)
|
|||
// create an instruction table (mnemonic hash lookup + directives)
|
||||
void Asm::Assemble(strref source, strref filename, bool obj_target)
|
||||
{
|
||||
num_instructions = BuildInstructionTable(aInstructions, MAX_OPCODES_DIRECTIVES, opcode_table, opcode_count);
|
||||
SetCPU(cpu);
|
||||
|
||||
StatusCode error = STATUS_OK;
|
||||
contextStack.push(filename, source, source);
|
||||
|
|
@ -4710,25 +4736,29 @@ static int _AddStrPool(const strref str, pairArray<unsigned int, int> *pLookup,
|
|||
if (index<pLookup->count() && str.same_str_case(*strPool + pLookup->getValue(index)))
|
||||
return pLookup->getValue(index);
|
||||
|
||||
if ((strPoolSize + str.get_len() + 1) > strPoolCap) {
|
||||
int strOffs = strPoolSize;
|
||||
if ((strOffs + str.get_len() + 1) > strPoolCap) {
|
||||
strPoolCap += 4096;
|
||||
char *strPoolGrow = (char*)malloc(strPoolCap);
|
||||
if (*strPool && strPoolGrow) {
|
||||
memcpy(strPoolGrow, *strPool, strPoolSize);
|
||||
free(*strPool);
|
||||
}
|
||||
*strPool = strPoolGrow;
|
||||
if (strPoolGrow) {
|
||||
if (*strPool) {
|
||||
memcpy(strPoolGrow, *strPool, strPoolSize);
|
||||
free(*strPool);
|
||||
}
|
||||
*strPool = strPoolGrow;
|
||||
} else
|
||||
return -1;
|
||||
}
|
||||
int ret = strPoolSize;
|
||||
|
||||
if (*strPool) {
|
||||
char *dest = *strPool + strPoolSize;
|
||||
memcpy(dest, str.get(), str.get_len());
|
||||
dest[str.get_len()] = 0;
|
||||
strPoolSize += str.get_len()+1;
|
||||
pLookup->insert(index, hash);
|
||||
pLookup->getValues()[index] = ret;
|
||||
pLookup->getValues()[index] = strOffs;
|
||||
}
|
||||
return ret;
|
||||
return strOffs;
|
||||
}
|
||||
|
||||
StatusCode Asm::WriteObjectFile(strref filename)
|
||||
|
|
@ -5115,7 +5145,7 @@ int main(int argc, char **argv)
|
|||
" x65 filename.s code.prg [options]\n"
|
||||
" * -i(path) : Add include path\n"
|
||||
" * -D(label)[=<value>] : Define a label with an optional value(otherwise defined as 1)\n"
|
||||
" * -cpu=6502/65c02: assemble with opcodes for a different cpu\n"
|
||||
" * -cpu=6502/65c02/65c02wdc/65816: assemble with opcodes for a different cpu\n"
|
||||
" * -obj(file.x65) : generate object file for later linking\n"
|
||||
" * -bin : Raw binary\n"
|
||||
" * -c64 : Include load address(default)\n"
|
||||
|
|
@ -5125,7 +5155,7 @@ int main(int argc, char **argv)
|
|||
" * -opcodes / -opcodes = (file.s) : dump all available opcodes(file or stdout)\n"
|
||||
" * -sect: display sections loaded and built\n"
|
||||
" * -vice(file.vs) : export a vice symbol file\n"
|
||||
" * -nerlin: use Merlin syntax\n"
|
||||
" * -merlin: use Merlin syntax\n"
|
||||
" * -endm : macros end with endm or endmacro instead of scoped('{' - '}')\n");
|
||||
return 0;
|
||||
}
|
||||
|
|
|
|||
Loading…
Reference in New Issue
Block a user