45 lines
760 B
Plaintext
45 lines
760 B
Plaintext
[Device]
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Family=machxo2
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PartType=LCMXO2-7000HC
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PartName=LCMXO2-7000HC-4TG144C
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SpeedGrade=4
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Package=TQFP144
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OperatingCondition=COM
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Status=S
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[IP]
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VendorName=Lattice Semiconductor Corporation
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CoreType=LPM
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CoreStatus=Demo
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CoreName=RAM_Based_Shift_Register
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CoreRevision=5.2
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ModuleName=ScreenRam
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SourceFormat=VHDL
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ParameterFileVersion=1.0
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Date=08/08/2019
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Time=17:25:32
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[Parameters]
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Verilog=0
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VHDL=1
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EDIF=1
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Destination=Synplicity
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Expression=BusA(0 to 7)
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Order=Big Endian [MSB:LSB]
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IO=0
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DataWidth=6
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Type=Fixed
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NoOfShifts=1024
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MaxLossyShifts=16
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MaxLosslessShifts=16
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EOR=0
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MemFile=
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MemFormat=bin
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RamType=bram
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[FilesGenerated]
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=mem
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[Command]
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cmd_line= -w -n ScreenRam -lang vhdl -synth synplify -bus_exp 7 -bb -arch xo2c00 -type shiftreg -width 6 -depth 1024 -mode 8
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