mirror of
https://github.com/Myndale/Apple1Display.git
synced 2024-08-31 16:29:08 +00:00
704 lines
25 KiB
Clojure
704 lines
25 KiB
Clojure
(edif ShiftReg40
|
|
(edifVersion 2 0 0)
|
|
(edifLevel 0)
|
|
(keywordMap (keywordLevel 0))
|
|
(status
|
|
(written
|
|
(timestamp 2019 8 5 13 43 30)
|
|
(program "SCUBA" (version "Diamond (64-bit) 3.10.2.115"))))
|
|
(comment "C:\lscc\diamond\3.10_x64\ispfpga\bin\nt64\scuba.exe -w -n ShiftReg40 -lang vhdl -synth synplify -bus_exp 7 -bb -arch xo2c00 -type shiftreg -width 6 -depth 40 -mode 8 -memfile c:/dev/apple1display/docs/lut_2519.mem -memformat bin ")
|
|
(library ORCLIB
|
|
(edifLevel 0)
|
|
(technology
|
|
(numberDefinition))
|
|
(cell CU2
|
|
(cellType GENERIC)
|
|
(view view1
|
|
(viewType NETLIST)
|
|
(interface
|
|
(port CI
|
|
(direction INPUT))
|
|
(port PC0
|
|
(direction INPUT))
|
|
(port PC1
|
|
(direction INPUT))
|
|
(port CO
|
|
(direction OUTPUT))
|
|
(port NC0
|
|
(direction OUTPUT))
|
|
(port NC1
|
|
(direction OUTPUT)))))
|
|
(cell FADD2B
|
|
(cellType GENERIC)
|
|
(view view1
|
|
(viewType NETLIST)
|
|
(interface
|
|
(port A0
|
|
(direction INPUT))
|
|
(port A1
|
|
(direction INPUT))
|
|
(port B0
|
|
(direction INPUT))
|
|
(port B1
|
|
(direction INPUT))
|
|
(port CI
|
|
(direction INPUT))
|
|
(port COUT
|
|
(direction OUTPUT))
|
|
(port S0
|
|
(direction OUTPUT))
|
|
(port S1
|
|
(direction OUTPUT)))))
|
|
(cell FD1P3IX
|
|
(cellType GENERIC)
|
|
(view view1
|
|
(viewType NETLIST)
|
|
(interface
|
|
(port D
|
|
(direction INPUT))
|
|
(port SP
|
|
(direction INPUT))
|
|
(port CK
|
|
(direction INPUT))
|
|
(port CD
|
|
(direction INPUT))
|
|
(port Q
|
|
(direction OUTPUT)))))
|
|
(cell INV
|
|
(cellType GENERIC)
|
|
(view view1
|
|
(viewType NETLIST)
|
|
(interface
|
|
(port A
|
|
(direction INPUT))
|
|
(port Z
|
|
(direction OUTPUT)))))
|
|
(cell OR2
|
|
(cellType GENERIC)
|
|
(view view1
|
|
(viewType NETLIST)
|
|
(interface
|
|
(port A
|
|
(direction INPUT))
|
|
(port B
|
|
(direction INPUT))
|
|
(port Z
|
|
(direction OUTPUT)))))
|
|
(cell ROM16X1A
|
|
(cellType GENERIC)
|
|
(view view1
|
|
(viewType NETLIST)
|
|
(interface
|
|
(port AD3
|
|
(direction INPUT))
|
|
(port AD2
|
|
(direction INPUT))
|
|
(port AD1
|
|
(direction INPUT))
|
|
(port AD0
|
|
(direction INPUT))
|
|
(port DO0
|
|
(direction OUTPUT)))))
|
|
(cell VHI
|
|
(cellType GENERIC)
|
|
(view view1
|
|
(viewType NETLIST)
|
|
(interface
|
|
(port Z
|
|
(direction OUTPUT)))))
|
|
(cell VLO
|
|
(cellType GENERIC)
|
|
(view view1
|
|
(viewType NETLIST)
|
|
(interface
|
|
(port Z
|
|
(direction OUTPUT)))))
|
|
(cell DP8KC
|
|
(cellType GENERIC)
|
|
(view view1
|
|
(viewType NETLIST)
|
|
(interface
|
|
(port DIA8
|
|
(direction INPUT))
|
|
(port DIA7
|
|
(direction INPUT))
|
|
(port DIA6
|
|
(direction INPUT))
|
|
(port DIA5
|
|
(direction INPUT))
|
|
(port DIA4
|
|
(direction INPUT))
|
|
(port DIA3
|
|
(direction INPUT))
|
|
(port DIA2
|
|
(direction INPUT))
|
|
(port DIA1
|
|
(direction INPUT))
|
|
(port DIA0
|
|
(direction INPUT))
|
|
(port ADA12
|
|
(direction INPUT))
|
|
(port ADA11
|
|
(direction INPUT))
|
|
(port ADA10
|
|
(direction INPUT))
|
|
(port ADA9
|
|
(direction INPUT))
|
|
(port ADA8
|
|
(direction INPUT))
|
|
(port ADA7
|
|
(direction INPUT))
|
|
(port ADA6
|
|
(direction INPUT))
|
|
(port ADA5
|
|
(direction INPUT))
|
|
(port ADA4
|
|
(direction INPUT))
|
|
(port ADA3
|
|
(direction INPUT))
|
|
(port ADA2
|
|
(direction INPUT))
|
|
(port ADA1
|
|
(direction INPUT))
|
|
(port ADA0
|
|
(direction INPUT))
|
|
(port CEA
|
|
(direction INPUT))
|
|
(port OCEA
|
|
(direction INPUT))
|
|
(port CLKA
|
|
(direction INPUT))
|
|
(port WEA
|
|
(direction INPUT))
|
|
(port CSA2
|
|
(direction INPUT))
|
|
(port CSA1
|
|
(direction INPUT))
|
|
(port CSA0
|
|
(direction INPUT))
|
|
(port RSTA
|
|
(direction INPUT))
|
|
(port DIB8
|
|
(direction INPUT))
|
|
(port DIB7
|
|
(direction INPUT))
|
|
(port DIB6
|
|
(direction INPUT))
|
|
(port DIB5
|
|
(direction INPUT))
|
|
(port DIB4
|
|
(direction INPUT))
|
|
(port DIB3
|
|
(direction INPUT))
|
|
(port DIB2
|
|
(direction INPUT))
|
|
(port DIB1
|
|
(direction INPUT))
|
|
(port DIB0
|
|
(direction INPUT))
|
|
(port ADB12
|
|
(direction INPUT))
|
|
(port ADB11
|
|
(direction INPUT))
|
|
(port ADB10
|
|
(direction INPUT))
|
|
(port ADB9
|
|
(direction INPUT))
|
|
(port ADB8
|
|
(direction INPUT))
|
|
(port ADB7
|
|
(direction INPUT))
|
|
(port ADB6
|
|
(direction INPUT))
|
|
(port ADB5
|
|
(direction INPUT))
|
|
(port ADB4
|
|
(direction INPUT))
|
|
(port ADB3
|
|
(direction INPUT))
|
|
(port ADB2
|
|
(direction INPUT))
|
|
(port ADB1
|
|
(direction INPUT))
|
|
(port ADB0
|
|
(direction INPUT))
|
|
(port CEB
|
|
(direction INPUT))
|
|
(port OCEB
|
|
(direction INPUT))
|
|
(port CLKB
|
|
(direction INPUT))
|
|
(port WEB
|
|
(direction INPUT))
|
|
(port CSB2
|
|
(direction INPUT))
|
|
(port CSB1
|
|
(direction INPUT))
|
|
(port CSB0
|
|
(direction INPUT))
|
|
(port RSTB
|
|
(direction INPUT))
|
|
(port DOA8
|
|
(direction OUTPUT))
|
|
(port DOA7
|
|
(direction OUTPUT))
|
|
(port DOA6
|
|
(direction OUTPUT))
|
|
(port DOA5
|
|
(direction OUTPUT))
|
|
(port DOA4
|
|
(direction OUTPUT))
|
|
(port DOA3
|
|
(direction OUTPUT))
|
|
(port DOA2
|
|
(direction OUTPUT))
|
|
(port DOA1
|
|
(direction OUTPUT))
|
|
(port DOA0
|
|
(direction OUTPUT))
|
|
(port DOB8
|
|
(direction OUTPUT))
|
|
(port DOB7
|
|
(direction OUTPUT))
|
|
(port DOB6
|
|
(direction OUTPUT))
|
|
(port DOB5
|
|
(direction OUTPUT))
|
|
(port DOB4
|
|
(direction OUTPUT))
|
|
(port DOB3
|
|
(direction OUTPUT))
|
|
(port DOB2
|
|
(direction OUTPUT))
|
|
(port DOB1
|
|
(direction OUTPUT))
|
|
(port DOB0
|
|
(direction OUTPUT)))))
|
|
(cell ShiftReg40
|
|
(cellType GENERIC)
|
|
(view view1
|
|
(viewType NETLIST)
|
|
(interface
|
|
(port (array (rename Din "Din(5:0)") 6)
|
|
(direction INPUT))
|
|
(port Clock
|
|
(direction INPUT))
|
|
(port ClockEn
|
|
(direction INPUT))
|
|
(port Reset
|
|
(direction INPUT))
|
|
(port (array (rename Q "Q(5:0)") 6)
|
|
(direction OUTPUT)))
|
|
(property NGD_DRC_MASK (integer 1))
|
|
(contents
|
|
(instance INV_3
|
|
(viewRef view1
|
|
(cellRef INV)))
|
|
(instance INV_2
|
|
(viewRef view1
|
|
(cellRef INV)))
|
|
(instance INV_1
|
|
(viewRef view1
|
|
(cellRef INV)))
|
|
(instance LUT4_1
|
|
(viewRef view1
|
|
(cellRef ROM16X1A))
|
|
(property initval
|
|
(string "0x8000")))
|
|
(instance LUT4_0
|
|
(viewRef view1
|
|
(cellRef ROM16X1A))
|
|
(property initval
|
|
(string "0x8000")))
|
|
(instance OR2_t0
|
|
(viewRef view1
|
|
(cellRef OR2)))
|
|
(instance INV_0
|
|
(viewRef view1
|
|
(cellRef INV)))
|
|
(instance sram_1_0_0_0
|
|
(viewRef view1
|
|
(cellRef DP8KC))
|
|
(property INIT_DATA
|
|
(string "STATIC"))
|
|
(property ASYNC_RESET_RELEASE
|
|
(string "SYNC"))
|
|
(property MEM_LPC_FILE
|
|
(string "ShiftReg40.lpc"))
|
|
(property MEM_INIT_FILE
|
|
(string "lut_2519.mem"))
|
|
(property INITVAL_1F
|
|
(string "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000"))
|
|
(property INITVAL_1E
|
|
(string "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000"))
|
|
(property INITVAL_1D
|
|
(string "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000"))
|
|
(property INITVAL_1C
|
|
(string "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000"))
|
|
(property INITVAL_1B
|
|
(string "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000"))
|
|
(property INITVAL_1A
|
|
(string "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000"))
|
|
(property INITVAL_19
|
|
(string "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000"))
|
|
(property INITVAL_18
|
|
(string "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000"))
|
|
(property INITVAL_17
|
|
(string "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000"))
|
|
(property INITVAL_16
|
|
(string "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000"))
|
|
(property INITVAL_15
|
|
(string "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000"))
|
|
(property INITVAL_14
|
|
(string "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000"))
|
|
(property INITVAL_13
|
|
(string "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000"))
|
|
(property INITVAL_12
|
|
(string "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000"))
|
|
(property INITVAL_11
|
|
(string "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000"))
|
|
(property INITVAL_10
|
|
(string "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000"))
|
|
(property INITVAL_0F
|
|
(string "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000"))
|
|
(property INITVAL_0E
|
|
(string "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000"))
|
|
(property INITVAL_0D
|
|
(string "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000"))
|
|
(property INITVAL_0C
|
|
(string "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000"))
|
|
(property INITVAL_0B
|
|
(string "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000"))
|
|
(property INITVAL_0A
|
|
(string "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000"))
|
|
(property INITVAL_09
|
|
(string "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000"))
|
|
(property INITVAL_08
|
|
(string "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000"))
|
|
(property INITVAL_07
|
|
(string "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000"))
|
|
(property INITVAL_06
|
|
(string "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000"))
|
|
(property INITVAL_05
|
|
(string "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000"))
|
|
(property INITVAL_04
|
|
(string "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000"))
|
|
(property INITVAL_03
|
|
(string "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000"))
|
|
(property INITVAL_02
|
|
(string "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000"))
|
|
(property INITVAL_01
|
|
(string "0x0000000000000000000000000000000000000000000000000000000000000002704C250482304421"))
|
|
(property INITVAL_00
|
|
(string "0x0401F03C1D0381B034190301702C1502813024110200F01C0D0180B014090100700C050080300401"))
|
|
(property CSDECODE_B
|
|
(string "0b111"))
|
|
(property CSDECODE_A
|
|
(string "0b000"))
|
|
(property WRITEMODE_B
|
|
(string "NORMAL"))
|
|
(property WRITEMODE_A
|
|
(string "READBEFOREWRITE"))
|
|
(property GSR
|
|
(string "ENABLED"))
|
|
(property RESETMODE
|
|
(string "ASYNC"))
|
|
(property REGMODE_B
|
|
(string "NOREG"))
|
|
(property REGMODE_A
|
|
(string "NOREG"))
|
|
(property DATA_WIDTH_B
|
|
(string "9"))
|
|
(property DATA_WIDTH_A
|
|
(string "9")))
|
|
(instance FF_5
|
|
(viewRef view1
|
|
(cellRef FD1P3IX))
|
|
(property GSR
|
|
(string "ENABLED")))
|
|
(instance FF_4
|
|
(viewRef view1
|
|
(cellRef FD1P3IX))
|
|
(property GSR
|
|
(string "ENABLED")))
|
|
(instance FF_3
|
|
(viewRef view1
|
|
(cellRef FD1P3IX))
|
|
(property GSR
|
|
(string "ENABLED")))
|
|
(instance FF_2
|
|
(viewRef view1
|
|
(cellRef FD1P3IX))
|
|
(property GSR
|
|
(string "ENABLED")))
|
|
(instance FF_1
|
|
(viewRef view1
|
|
(cellRef FD1P3IX))
|
|
(property GSR
|
|
(string "ENABLED")))
|
|
(instance FF_0
|
|
(viewRef view1
|
|
(cellRef FD1P3IX))
|
|
(property GSR
|
|
(string "ENABLED")))
|
|
(instance scuba_vlo_inst
|
|
(viewRef view1
|
|
(cellRef VLO)))
|
|
(instance scuba_vhi_inst
|
|
(viewRef view1
|
|
(cellRef VHI)))
|
|
(instance sreg_0_ctr_1_cia
|
|
(viewRef view1
|
|
(cellRef FADD2B)))
|
|
(instance sreg_0_ctr_1_0
|
|
(viewRef view1
|
|
(cellRef CU2)))
|
|
(instance sreg_0_ctr_1_1
|
|
(viewRef view1
|
|
(cellRef CU2)))
|
|
(instance sreg_0_ctr_1_2
|
|
(viewRef view1
|
|
(cellRef CU2)))
|
|
(net shreg_addr_w3_inv
|
|
(joined
|
|
(portRef AD0 (instanceRef LUT4_1))
|
|
(portRef Z (instanceRef INV_2))))
|
|
(net shreg_addr_w0_inv
|
|
(joined
|
|
(portRef AD3 (instanceRef LUT4_1))
|
|
(portRef Z (instanceRef INV_3))))
|
|
(net shreg_addr_w4_inv
|
|
(joined
|
|
(portRef AD2 (instanceRef LUT4_0))
|
|
(portRef Z (instanceRef INV_1))))
|
|
(net func_and_inet
|
|
(joined
|
|
(portRef AD3 (instanceRef LUT4_0))
|
|
(portRef DO0 (instanceRef LUT4_1))))
|
|
(net dec0_r102
|
|
(joined
|
|
(portRef B (instanceRef OR2_t0))
|
|
(portRef DO0 (instanceRef LUT4_0))))
|
|
(net Reset_inv
|
|
(joined
|
|
(portRef WEA (instanceRef sram_1_0_0_0))
|
|
(portRef Z (instanceRef INV_0))))
|
|
(net srrst_ctr
|
|
(joined
|
|
(portRef CD (instanceRef FF_0))
|
|
(portRef Z (instanceRef OR2_t0))
|
|
(portRef CD (instanceRef FF_5))
|
|
(portRef CD (instanceRef FF_4))
|
|
(portRef CD (instanceRef FF_3))
|
|
(portRef CD (instanceRef FF_2))
|
|
(portRef CD (instanceRef FF_1))))
|
|
(net scuba_vlo
|
|
(joined
|
|
(portRef Z (instanceRef scuba_vlo_inst))
|
|
(portRef CSB2 (instanceRef sram_1_0_0_0))
|
|
(portRef CSA2 (instanceRef sram_1_0_0_0))
|
|
(portRef CSB1 (instanceRef sram_1_0_0_0))
|
|
(portRef CSA1 (instanceRef sram_1_0_0_0))
|
|
(portRef CSB0 (instanceRef sram_1_0_0_0))
|
|
(portRef CSA0 (instanceRef sram_1_0_0_0))
|
|
(portRef RSTB (instanceRef sram_1_0_0_0))
|
|
(portRef WEB (instanceRef sram_1_0_0_0))
|
|
(portRef CLKB (instanceRef sram_1_0_0_0))
|
|
(portRef ADB12 (instanceRef sram_1_0_0_0))
|
|
(portRef ADA12 (instanceRef sram_1_0_0_0))
|
|
(portRef ADB11 (instanceRef sram_1_0_0_0))
|
|
(portRef ADA11 (instanceRef sram_1_0_0_0))
|
|
(portRef ADB10 (instanceRef sram_1_0_0_0))
|
|
(portRef ADA10 (instanceRef sram_1_0_0_0))
|
|
(portRef ADB9 (instanceRef sram_1_0_0_0))
|
|
(portRef ADA9 (instanceRef sram_1_0_0_0))
|
|
(portRef ADB8 (instanceRef sram_1_0_0_0))
|
|
(portRef ADB7 (instanceRef sram_1_0_0_0))
|
|
(portRef ADB6 (instanceRef sram_1_0_0_0))
|
|
(portRef ADB5 (instanceRef sram_1_0_0_0))
|
|
(portRef ADB4 (instanceRef sram_1_0_0_0))
|
|
(portRef ADB3 (instanceRef sram_1_0_0_0))
|
|
(portRef ADB2 (instanceRef sram_1_0_0_0))
|
|
(portRef ADA2 (instanceRef sram_1_0_0_0))
|
|
(portRef ADB1 (instanceRef sram_1_0_0_0))
|
|
(portRef ADA1 (instanceRef sram_1_0_0_0))
|
|
(portRef ADB0 (instanceRef sram_1_0_0_0))
|
|
(portRef DIB8 (instanceRef sram_1_0_0_0))
|
|
(portRef DIA8 (instanceRef sram_1_0_0_0))
|
|
(portRef DIB7 (instanceRef sram_1_0_0_0))
|
|
(portRef DIA7 (instanceRef sram_1_0_0_0))
|
|
(portRef DIB6 (instanceRef sram_1_0_0_0))
|
|
(portRef DIA6 (instanceRef sram_1_0_0_0))
|
|
(portRef DIB5 (instanceRef sram_1_0_0_0))
|
|
(portRef DIB4 (instanceRef sram_1_0_0_0))
|
|
(portRef DIB3 (instanceRef sram_1_0_0_0))
|
|
(portRef DIB2 (instanceRef sram_1_0_0_0))
|
|
(portRef DIB1 (instanceRef sram_1_0_0_0))
|
|
(portRef DIB0 (instanceRef sram_1_0_0_0))
|
|
(portRef CI (instanceRef sreg_0_ctr_1_cia))
|
|
(portRef B0 (instanceRef sreg_0_ctr_1_cia))
|
|
(portRef A0 (instanceRef sreg_0_ctr_1_cia))))
|
|
(net scuba_vhi
|
|
(joined
|
|
(portRef Z (instanceRef scuba_vhi_inst))
|
|
(portRef OCEB (instanceRef sram_1_0_0_0))
|
|
(portRef CEB (instanceRef sram_1_0_0_0))
|
|
(portRef ADA0 (instanceRef sram_1_0_0_0))
|
|
(portRef B1 (instanceRef sreg_0_ctr_1_cia))
|
|
(portRef A1 (instanceRef sreg_0_ctr_1_cia))))
|
|
(net ishreg_addr_w0
|
|
(joined
|
|
(portRef NC0 (instanceRef sreg_0_ctr_1_0))
|
|
(portRef D (instanceRef FF_5))))
|
|
(net ishreg_addr_w1
|
|
(joined
|
|
(portRef NC1 (instanceRef sreg_0_ctr_1_0))
|
|
(portRef D (instanceRef FF_4))))
|
|
(net sreg_0_ctr_1_ci
|
|
(joined
|
|
(portRef CI (instanceRef sreg_0_ctr_1_0))
|
|
(portRef COUT (instanceRef sreg_0_ctr_1_cia))))
|
|
(net shreg_addr_w0
|
|
(joined
|
|
(portRef PC0 (instanceRef sreg_0_ctr_1_0))
|
|
(portRef A (instanceRef INV_3))
|
|
(portRef ADA3 (instanceRef sram_1_0_0_0))
|
|
(portRef Q (instanceRef FF_5))))
|
|
(net shreg_addr_w1
|
|
(joined
|
|
(portRef PC1 (instanceRef sreg_0_ctr_1_0))
|
|
(portRef AD2 (instanceRef LUT4_1))
|
|
(portRef ADA4 (instanceRef sram_1_0_0_0))
|
|
(portRef Q (instanceRef FF_4))))
|
|
(net ishreg_addr_w2
|
|
(joined
|
|
(portRef NC0 (instanceRef sreg_0_ctr_1_1))
|
|
(portRef D (instanceRef FF_3))))
|
|
(net ishreg_addr_w3
|
|
(joined
|
|
(portRef NC1 (instanceRef sreg_0_ctr_1_1))
|
|
(portRef D (instanceRef FF_2))))
|
|
(net co0
|
|
(joined
|
|
(portRef CI (instanceRef sreg_0_ctr_1_1))
|
|
(portRef CO (instanceRef sreg_0_ctr_1_0))))
|
|
(net shreg_addr_w2
|
|
(joined
|
|
(portRef PC0 (instanceRef sreg_0_ctr_1_1))
|
|
(portRef AD1 (instanceRef LUT4_1))
|
|
(portRef ADA5 (instanceRef sram_1_0_0_0))
|
|
(portRef Q (instanceRef FF_3))))
|
|
(net shreg_addr_w3
|
|
(joined
|
|
(portRef PC1 (instanceRef sreg_0_ctr_1_1))
|
|
(portRef A (instanceRef INV_2))
|
|
(portRef ADA6 (instanceRef sram_1_0_0_0))
|
|
(portRef Q (instanceRef FF_2))))
|
|
(net ishreg_addr_w4
|
|
(joined
|
|
(portRef NC0 (instanceRef sreg_0_ctr_1_2))
|
|
(portRef D (instanceRef FF_1))))
|
|
(net ishreg_addr_w5
|
|
(joined
|
|
(portRef NC1 (instanceRef sreg_0_ctr_1_2))
|
|
(portRef D (instanceRef FF_0))))
|
|
(net co2
|
|
(joined
|
|
(portRef CO (instanceRef sreg_0_ctr_1_2))))
|
|
(net co1
|
|
(joined
|
|
(portRef CI (instanceRef sreg_0_ctr_1_2))
|
|
(portRef CO (instanceRef sreg_0_ctr_1_1))))
|
|
(net shreg_addr_w4
|
|
(joined
|
|
(portRef PC0 (instanceRef sreg_0_ctr_1_2))
|
|
(portRef A (instanceRef INV_1))
|
|
(portRef ADA7 (instanceRef sram_1_0_0_0))
|
|
(portRef Q (instanceRef FF_1))))
|
|
(net shreg_addr_w5
|
|
(joined
|
|
(portRef PC1 (instanceRef sreg_0_ctr_1_2))
|
|
(portRef AD1 (instanceRef LUT4_0))
|
|
(portRef ADA8 (instanceRef sram_1_0_0_0))
|
|
(portRef Q (instanceRef FF_0))))
|
|
(net Q5
|
|
(joined
|
|
(portRef (member Q 0))
|
|
(portRef DOA5 (instanceRef sram_1_0_0_0))))
|
|
(net Q4
|
|
(joined
|
|
(portRef (member Q 1))
|
|
(portRef DOA4 (instanceRef sram_1_0_0_0))))
|
|
(net Q3
|
|
(joined
|
|
(portRef (member Q 2))
|
|
(portRef DOA3 (instanceRef sram_1_0_0_0))))
|
|
(net Q2
|
|
(joined
|
|
(portRef (member Q 3))
|
|
(portRef DOA2 (instanceRef sram_1_0_0_0))))
|
|
(net Q1
|
|
(joined
|
|
(portRef (member Q 4))
|
|
(portRef DOA1 (instanceRef sram_1_0_0_0))))
|
|
(net Q0
|
|
(joined
|
|
(portRef (member Q 5))
|
|
(portRef DOA0 (instanceRef sram_1_0_0_0))))
|
|
(net Reset
|
|
(joined
|
|
(portRef Reset)
|
|
(portRef A (instanceRef OR2_t0))
|
|
(portRef A (instanceRef INV_0))
|
|
(portRef RSTA (instanceRef sram_1_0_0_0))))
|
|
(net ClockEn
|
|
(joined
|
|
(portRef ClockEn)
|
|
(portRef AD0 (instanceRef LUT4_0))
|
|
(portRef OCEA (instanceRef sram_1_0_0_0))
|
|
(portRef CEA (instanceRef sram_1_0_0_0))
|
|
(portRef SP (instanceRef FF_5))
|
|
(portRef SP (instanceRef FF_4))
|
|
(portRef SP (instanceRef FF_3))
|
|
(portRef SP (instanceRef FF_2))
|
|
(portRef SP (instanceRef FF_1))
|
|
(portRef SP (instanceRef FF_0))))
|
|
(net Clock
|
|
(joined
|
|
(portRef Clock)
|
|
(portRef CLKA (instanceRef sram_1_0_0_0))
|
|
(portRef CK (instanceRef FF_5))
|
|
(portRef CK (instanceRef FF_4))
|
|
(portRef CK (instanceRef FF_3))
|
|
(portRef CK (instanceRef FF_2))
|
|
(portRef CK (instanceRef FF_1))
|
|
(portRef CK (instanceRef FF_0))))
|
|
(net Din5
|
|
(joined
|
|
(portRef (member Din 0))
|
|
(portRef DIA5 (instanceRef sram_1_0_0_0))))
|
|
(net Din4
|
|
(joined
|
|
(portRef (member Din 1))
|
|
(portRef DIA4 (instanceRef sram_1_0_0_0))))
|
|
(net Din3
|
|
(joined
|
|
(portRef (member Din 2))
|
|
(portRef DIA3 (instanceRef sram_1_0_0_0))))
|
|
(net Din2
|
|
(joined
|
|
(portRef (member Din 3))
|
|
(portRef DIA2 (instanceRef sram_1_0_0_0))))
|
|
(net Din1
|
|
(joined
|
|
(portRef (member Din 4))
|
|
(portRef DIA1 (instanceRef sram_1_0_0_0))))
|
|
(net Din0
|
|
(joined
|
|
(portRef (member Din 5))
|
|
(portRef DIA0 (instanceRef sram_1_0_0_0))))))))
|
|
(design ShiftReg40
|
|
(cellRef ShiftReg40
|
|
(libraryRef ORCLIB)))
|
|
)
|