91 lines
2.6 KiB
Groff
91 lines
2.6 KiB
Groff
Running in Lattice mode
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Starting: C:\lscc\diamond\3.10_x64\synpbase\bin64\mbin\synbatch.exe
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Install: C:\lscc\diamond\3.10_x64\synpbase
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Hostname: MARKF-PRO
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Date: Thu Aug 8 18:32:42 2019
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Version: M-2017.03L-SP1-1
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Arguments: -product synplify_pro -batch Apple1Display_impl1_synplify.tcl
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ProductType: synplify_pro
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log file: "C:\Dev\Apple1Display\impl1\Apple1Display_impl1.srr"
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Running: hdl_info_gen in foreground
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Generating HDL info...
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hdl_info_gen completed
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# Thu Aug 8 18:32:43 2019
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Return Code: 0
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Run Time:00h:00m:01s
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Copied C:\Dev\Apple1Display\impl1\Apple1Display_impl1.srr to C:\Dev\Apple1Display\impl1\Apple1Display_impl1.srf
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log file: "C:\Dev\Apple1Display\impl1\Apple1Display_impl1.srr"
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Running: impl1 in foreground
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Running proj_1|impl1
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Running: compile (Compile) on proj_1|impl1
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# Thu Aug 8 18:32:43 2019
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Running: compile_flow (Compile Process) on proj_1|impl1
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# Thu Aug 8 18:32:43 2019
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Running: compiler (Compile Input) on proj_1|impl1
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# Thu Aug 8 18:32:43 2019
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Copied C:\Dev\Apple1Display\impl1\synwork\Apple1Display_impl1_comp.srs to C:\Dev\Apple1Display\impl1\Apple1Display_impl1.srs
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compiler completed
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# Thu Aug 8 18:32:45 2019
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Return Code: 0
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Run Time:00h:00m:02s
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Running: multi_srs_gen (Multi-srs Generator) on proj_1|impl1
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# Thu Aug 8 18:32:45 2019
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multi_srs_gen completed
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# Thu Aug 8 18:32:45 2019
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Return Code: 0
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Run Time:00h:00m:00s
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Copied C:\Dev\Apple1Display\impl1\synwork\Apple1Display_impl1_mult.srs to C:\Dev\Apple1Display\impl1\Apple1Display_impl1.srs
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Copied C:\Dev\Apple1Display\impl1\Apple1Display_impl1.srr to C:\Dev\Apple1Display\impl1\Apple1Display_impl1.srf
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Complete: Compile Process on proj_1|impl1
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Running: premap (Pre-mapping) on proj_1|impl1
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# Thu Aug 8 18:32:46 2019
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premap completed with warnings
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# Thu Aug 8 18:32:46 2019
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Return Code: 1
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Run Time:00h:00m:00s
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Complete: Compile on proj_1|impl1
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Running: map (Map) on proj_1|impl1
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# Thu Aug 8 18:32:46 2019
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License granted for 4 parallel jobs
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Running: fpga_mapper (Map & Optimize) on proj_1|impl1
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# Thu Aug 8 18:32:46 2019
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Copied C:\Dev\Apple1Display\impl1\synwork\Apple1Display_impl1_m.srm to C:\Dev\Apple1Display\impl1\Apple1Display_impl1.srm
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fpga_mapper completed with warnings
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# Thu Aug 8 18:32:49 2019
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Return Code: 1
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Run Time:00h:00m:03s
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Complete: Map on proj_1|impl1
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Copied C:\Dev\Apple1Display\impl1\Apple1Display_impl1.srr to C:\Dev\Apple1Display\impl1\Apple1Display_impl1.srf
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Complete: Logic Synthesis on proj_1|impl1
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TCL script complete: "Apple1Display_impl1_synplify.tcl"
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exit status=0
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exit status=0
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Save changes for project:
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C:\Dev\Apple1Display\impl1\proj_1.prj
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batch mode default:no
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