16 lines
428 B
Markdown
16 lines
428 B
Markdown
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# Apple1_MIST
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Apple1 implementation for the MiST FPGA.
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This was forked from [Gehstock's project](https://github.com/Gehstock/Mist_FPGA).
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## CHANGELOG
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2021-12-28
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- 15 kHz video output (NTSC) and use of MiST scandoubler/video pipeline
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- more accurate 7x8 character matrix (5x7 + hardware spacing)
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- clock is now derived from 14.31818 instead of 25 MHz (more accurate)
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- serial port communication feature is disabled/removed
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