Apple1_MiST/rtl/arlet_6502/chip_6502_mux.v

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2021-12-29 15:18:10 +00:00
module MUX #(
parameter N=1
) (
output wire o,
input wire i,
input wire [N-1:0] s,
input wire [N-1:0] d);
assign o = (|s) ? &(d|(~s)) : i;
endmodule