From 68846df5d05ff6ef2eb17d2be5f6e7a0f71e93eb Mon Sep 17 00:00:00 2001
From: nino-porcino <nino.porcino@gmail.com>
Date: Thu, 30 Dec 2021 20:07:37 +0100
Subject: [PATCH] take ram out of apple1 module

---
 rtl/apple1.v       | 22 ++++++++++++----------
 rtl/apple1_mist.sv | 23 +++++++++++++++++++++++
 2 files changed, 35 insertions(+), 10 deletions(-)

diff --git a/rtl/apple1.v b/rtl/apple1.v
index ce06c26..a7a4f6a 100644
--- a/rtl/apple1.v
+++ b/rtl/apple1.v
@@ -30,6 +30,12 @@ module apple1(
     input  uart_rx,             // asynchronous serial data input from computer
     output uart_tx,             // asynchronous serial data output to computer
     output uart_cts,            // clear to send flag to computer
+	 // RAM interface
+	 output [15:0] ram_addr,
+	 output  [7:0] ram_din,
+	 input   [7:0] ram_dout,
+	 output        ram_rd,
+ 	 output        ram_wr,
 
     // I/O interface to keyboard
     input ps2_clk,              // PS/2 keyboard serial clock input
@@ -43,6 +49,12 @@ module apple1(
     output vga_blu,             // blue VGA signal
     input vga_cls               // clear screen button
 );
+
+assign ram_addr = addr;
+assign ram_din  = cpu_dout;
+assign ram_rd   = ram_cs;
+assign ram_wr   = we & ram_cs;  
+
     //////////////////////////////////////////////////////////////////////////
     // Registers and Wires
 
@@ -102,16 +114,6 @@ module apple1(
     //////////////////////////////////////////////////////////////////////////
     // RAM and ROM
 
-    // RAM
-    wire [7:0] ram_dout;
-    ram ram(
-        .clk(clk14),
-        .address(addr[12:0]),
-        .w_en(we & ram_cs),
-        .din(cpu_dout),
-        .dout(ram_dout)
-    );
-
     // WozMon ROM
     wire [7:0] rom_dout;
     rom_wozmon rom_wozmon(
diff --git a/rtl/apple1_mist.sv b/rtl/apple1_mist.sv
index 8056216..2876206 100644
--- a/rtl/apple1_mist.sv
+++ b/rtl/apple1_mist.sv
@@ -126,6 +126,22 @@ pll pll
 /******************************************************************************************/
 /******************************************************************************************/
 
+// RAM
+wire [7:0] ram_dout;
+ram ram(
+  .clk(clk14),
+  .address(cpu_addr[12:0]),
+  .w_en(cpu_wr),
+  .din(cpu_dout),
+  .dout(ram_dout)
+);
+
+// ram interface
+wire [15:0] cpu_addr;
+wire [7:0]  cpu_dout;
+wire        cpu_rd;
+wire        cpu_wr;
+
 apple1 apple1 
 (
 	.clk14(clk14),
@@ -135,6 +151,13 @@ apple1 apple1
 	.uart_tx(),             // uart not connected
 	.uart_cts(),            // uart not connected
 	
+	// RAM interface
+	.ram_addr (cpu_addr),
+	.ram_din  (cpu_dout),
+	.ram_dout (ram_dout),
+	.ram_rd   (cpu_rd),
+	.ram_wr   (cpu_wr),
+		
 	.ps2_clk(ps2_kbd_clk),
 	.ps2_din(ps2_kbd_data),