diff --git a/rtl/apple1_mist.sv b/rtl/apple1_mist.sv
index 3363314..defe01c 100644
--- a/rtl/apple1_mist.sv
+++ b/rtl/apple1_mist.sv
@@ -20,6 +20,7 @@
 // TODO special expansion boards: TMS9918, SID
 // TODO ascii keyboard
 // TODO check diff with updated data_io.v
+// TODO ram + display powerup initial values
 
 module apple1_mist(
    input         CLOCK_27,
@@ -172,7 +173,7 @@ downloader
 // RAM
 ram ram(
   .clk    (clk14     ),
-  .address(sdram_addr[12:0]),
+  .address(sdram_addr[15:0]),
   .w_en   (sdram_wr  ),
   .din    (sdram_din ),
   .dout   (sdram_dout)
@@ -205,7 +206,7 @@ always @(*) begin
 	end	
 	*/
 	else begin
-		sdram_addr   <= { 12'b0, cpu_addr[12:0] };
+		sdram_addr   <= { 9'b0, cpu_addr[15:0] };
 		sdram_din    <= cpu_dout;		
 		sdram_wr     <= cpu_wr;
 		sdram_rd     <= cpu_rd;		
@@ -236,9 +237,9 @@ wire [7:0]  cpu_dout;
 wire        cpu_rd;
 wire        cpu_wr;
 
-wire ram_cs   = (cpu_addr[15:13] ==  3'b000);       // 0x0000 -> 0x1FFF
-wire basic_cs = (cpu_addr[15:12] ==  4'b1110);      // 0xE000 -> 0xEFFF
-wire rom_cs   = (cpu_addr[15:8]  ==  8'b11111111);  // 0xFF00 -> 0xFFFF
+wire ram_cs   = cpu_addr < 16'hc000;                          //  (cpu_addr[15:13] ==  3'b000);       // 0x0000 -> 0x1FFF
+wire basic_cs = cpu_addr >= 16'hE000 && cpu_addr <= 16'hEFFF; //  (cpu_addr[15:12] ==  4'b1110);      // 0xE000 -> 0xEFFF
+wire rom_cs   = cpu_addr >= 16'hFF00 && cpu_addr <= 16'hFFFF; //  (cpu_addr[15:8]  ==  8'b11111111);  // 0xFF00 -> 0xFFFF
 
 wire [7:0] bus_dout = basic_cs ? basic_dout :
                       rom_cs   ? rom_dout   :
diff --git a/rtl/ram.v b/rtl/ram.v
index b8d9ad9..2192f48 100644
--- a/rtl/ram.v
+++ b/rtl/ram.v
@@ -24,16 +24,16 @@
 
 module ram (
     input clk,              // clock signal
-    input [12:0] address,   // address bus
+    input [15:0] address,   // address bus
     input w_en,             // active high write enable strobe
     input [7:0] din,        // 8-bit data bus (input)
     output reg [7:0] dout   // 8-bit data bus (output)
 );
 
-    reg [7:0] ram_data[0:8191];
+    reg [7:0] ram_data[0:49151];
 
-    initial
-        $readmemh("roms/ram.hex", ram_data, 0, 8191);
+    //initial
+    //    $readmemh("roms/ram.hex", ram_data, 0, 8191);
 
     always @(posedge clk)
     begin