From a41bb356466aacb3b7ef6acc7ced6f0b9beb85f3 Mon Sep 17 00:00:00 2001 From: nino-porcino Date: Sat, 7 May 2022 11:39:28 +0200 Subject: [PATCH] do not use system reset for display --- rtl/apple1.v | 5 +++-- rtl/apple1_mist.sv | 3 ++- 2 files changed, 5 insertions(+), 3 deletions(-) diff --git a/rtl/apple1.v b/rtl/apple1.v index 190f39c..f6eb960 100644 --- a/rtl/apple1.v +++ b/rtl/apple1.v @@ -24,6 +24,7 @@ module apple1( input reset, // reset + input fpga_reset, // fpga reset for one-time reset of display and keyboard input sys_clock, // system clock input pixel_clken, // 7 MHz pixel clock @@ -125,7 +126,7 @@ module apple1( wire cls_key; ps2keyboard keyboard( .clk(sys_clock), - .rst(reset), + .rst(fpga_reset), .key_clk(ps2_clk), .key_din(ps2_din), .cs(keyboard_cs), @@ -138,7 +139,7 @@ module apple1( wire PB7; // (negated) display ready (PB7 of CIA) display display( - .reset(reset), + .reset(fpga_reset), .sys_clock(sys_clock), .pixel_clken(pixel_clken), diff --git a/rtl/apple1_mist.sv b/rtl/apple1_mist.sv index 76d2679..870098b 100644 --- a/rtl/apple1_mist.sv +++ b/rtl/apple1_mist.sv @@ -350,6 +350,7 @@ end apple1 apple1 ( .reset(reset_button), + .fpga_reset(fpga_reset), .sys_clock ( sys_clock ), // system clock .cpu_clken ( cpu_clken & ~is_downloading ), // CPU clock enable @@ -585,7 +586,7 @@ wire cpu_clock; // cpu clock for the sdram controller sync clock clock( .sys_clock ( sys_clock ), // input: main clock - .reset ( reset_button ), // input: reset signal + .reset ( fpga_reset ), // input: reset signal .cpu_clock ( cpu_clock ), .cpu_clken ( cpu_clken ), // output: cpu clock enable (phi2)