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Apple1_MiST
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improve display accuracy

This commit is contained in:
nino-porcino 2022-03-19 11:03:38 +01:00
parent b4d78e99e7
commit e9e60a5fb5
1 changed files with 22 additions and 35 deletions
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57
rtl/display.v
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@ -184,7 +184,7 @@ module display (
assign cursor = {v_cursor, h_cursor};
assign vram_r_addr = {vram_v_addr, vram_h_addr};
wire [5:0] cursor_character = cursor_on ? 6'd0 : 6'd32;
wire [5:0] cursor_character = cursor_on ? 6'd0 : 6'd32; // "@" or space
assign font_char = (vram_r_addr != cursor) ? vram_dout : cursor_character;
assign font_pixel = h_dot;
@ -220,11 +220,12 @@ module display (
else
if(pixel_clken) begin
vram_w_en <= 0;
// accepts a new character only at the start of each frame
if(v_cnt == 0 && h_cnt == 0)
ready <= 1;
if (clr_screen)
begin
if(clr_screen) begin
// return to top of screen
h_cursor <= 6'd0;
v_cursor <= 5'd0;
@ -237,55 +238,41 @@ module display (
vram_din <= 6'd32;
vram_w_en <= 1;
end
else
begin
else begin
// cursor overflow handling
if (h_cursor == 6'd40)
begin
if (h_cursor == 6'd40) begin
h_cursor <= 6'd0;
v_cursor <= v_cursor + 'd1;
end
if (v_cursor == vram_end_addr)
begin
if (v_cursor == vram_end_addr) begin
vram_start_addr <= vram_start_addr + 'd1;
vram_end_addr <= vram_end_addr + 'd1;
end
if (address == 1'b0) // address low == TX register
begin
if (cpu_clken & w_en & ready)
begin
// address low == TX register
if (address == 1'b0) begin
if (cpu_clken & w_en & ready) begin
// incoming character
ready <= 0;
case(din)
8'h0D,
8'h8D: begin
// handle carriage return
h_cursor <= 0;
v_cursor <= v_cursor + 'd1;
end
8'h00,
8'h0A,
8'h9B,
8'h7F: begin
// ignore the escape key
h_cursor <= 0;
end
default: begin
if(din[6:0]=='h0D) begin
// handle carriage return
h_cursor <= 0;
v_cursor <= v_cursor + 'd1;
end
else if(din[6:0] < 32) begin
// 0-31 non printable characters, do nothing
end
else begin
vram_w_addr <= cursor;
vram_din <= {~din[6], din[4:0]};
vram_w_en <= 1;
h_cursor <= h_cursor + 1;
end
endcase
end
end
end
else
begin
else begin
vram_w_addr <= {vram_clr_addr, vram_h_addr};
vram_din <= 6'd32;
vram_w_en <= 1;