mirror of
https://github.com/tebl/RC-Project-Board.git
synced 2024-11-25 13:31:22 +00:00
935 lines
59 KiB
Plaintext
935 lines
59 KiB
Plaintext
(kicad_pcb (version 4) (host pcbnew 4.0.7)
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(general
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(links 41)
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(no_connects 0)
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(area 97.714999 95.074999 196.925001 118.185001)
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(thickness 1.6)
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(drawings 55)
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(tracks 41)
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(zones 0)
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(modules 7)
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(nets 40)
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)
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(page A4)
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(layers
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(0 F.Cu signal)
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(31 B.Cu signal hide)
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(32 B.Adhes user)
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(33 F.Adhes user)
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(34 B.Paste user)
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(35 F.Paste user)
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(36 B.SilkS user hide)
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(37 F.SilkS user)
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(38 B.Mask user)
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(39 F.Mask user)
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(40 Dwgs.User user)
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(41 Cmts.User user)
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(42 Eco1.User user)
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(43 Eco2.User user)
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(44 Edge.Cuts user)
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(45 Margin user)
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(46 B.CrtYd user)
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(47 F.CrtYd user)
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(48 B.Fab user)
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(49 F.Fab user)
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)
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(setup
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(last_trace_width 0.25)
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(user_trace_width 0.1)
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(trace_clearance 0.2)
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(zone_clearance 0.508)
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(zone_45_only no)
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(trace_min 0.01)
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(segment_width 0.2)
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(edge_width 0.15)
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(via_size 0.6)
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(via_drill 0.4)
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(via_min_size 0.4)
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(via_min_drill 0.3)
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(uvia_size 0.3)
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(uvia_drill 0.1)
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(uvias_allowed no)
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(uvia_min_size 0.2)
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(uvia_min_drill 0.1)
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(pcb_text_width 0.3)
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(pcb_text_size 1.5 1.5)
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(mod_edge_width 0.15)
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(mod_text_size 1 1)
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(mod_text_width 0.15)
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(pad_size 5 5)
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(pad_drill 3.048)
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(pad_to_mask_clearance 0.2)
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(aux_axis_origin 104.14 52.07)
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(visible_elements 7FFFFFFF)
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(pcbplotparams
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(layerselection 0x011fc_80000001)
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(usegerberextensions true)
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(excludeedgelayer true)
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(linewidth 0.100000)
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(plotframeref false)
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(viasonmask false)
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(mode 1)
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(useauxorigin false)
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(hpglpennumber 1)
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(hpglpenspeed 20)
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(hpglpendiameter 15)
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(hpglpenoverlay 2)
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(psnegative false)
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(psa4output false)
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(plotreference true)
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(plotvalue true)
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(plotinvisibletext false)
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(padsonsilk false)
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(subtractmaskfromsilk false)
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(outputformat 1)
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(mirror false)
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(drillshape 0)
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(scaleselection 1)
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(outputdirectory export/))
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)
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(net 0 "")
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(net 1 GND)
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(net 2 VCC)
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(net 3 /A15)
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(net 4 /A14)
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(net 5 /A13)
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(net 6 /A12)
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(net 7 /A11)
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(net 8 /A10)
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(net 9 /A9)
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(net 10 /A8)
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(net 11 /A7)
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(net 12 /A6)
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(net 13 /A5)
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(net 14 /A4)
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(net 15 /A3)
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(net 16 /A2)
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(net 17 /A1)
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(net 18 /A0)
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(net 19 /~IRQ)
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(net 20 /~NMI)
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(net 21 /R/~W)
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(net 22 /~RDY)
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(net 23 /SYNC)
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(net 24 /D0)
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(net 25 /D1)
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(net 26 /D2)
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(net 27 /D3)
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(net 28 /D4)
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(net 29 /D5)
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(net 30 /D6)
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(net 31 /D7)
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(net 32 /~RESET)
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(net 33 /PIN35)
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(net 34 /PIN36)
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(net 35 /PIN37)
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(net 36 /PIN39)
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(net 37 /PHI2)
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(net 38 /PHI0)
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(net 39 /~IO3)
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(net_class Default "This is the default net class."
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(clearance 0.2)
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(trace_width 0.25)
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(via_dia 0.6)
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(via_drill 0.4)
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(uvia_dia 0.3)
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(uvia_drill 0.1)
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(add_net /A0)
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(add_net /A1)
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(add_net /A10)
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(add_net /A11)
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(add_net /A12)
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(add_net /A13)
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(add_net /A14)
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(add_net /A15)
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(add_net /A2)
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(add_net /A3)
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(add_net /A4)
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(add_net /A5)
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(add_net /A6)
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(add_net /A7)
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(add_net /A8)
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(add_net /A9)
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(add_net /D0)
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(add_net /D1)
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(add_net /D2)
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(add_net /D3)
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(add_net /D4)
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(add_net /D5)
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(add_net /D6)
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(add_net /D7)
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(add_net /PHI0)
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(add_net /PHI2)
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(add_net /PIN35)
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(add_net /PIN36)
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(add_net /PIN37)
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(add_net /PIN39)
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(add_net /R/~W)
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(add_net /SYNC)
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(add_net /~IO3)
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(add_net /~IRQ)
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(add_net /~NMI)
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(add_net /~RDY)
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(add_net /~RESET)
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(add_net GND)
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(add_net VCC)
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)
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(net_class VCC ""
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(clearance 0.2)
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(trace_width 0.75)
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(via_dia 0.6)
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(via_drill 0.4)
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(uvia_dia 0.3)
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(uvia_drill 0.1)
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)
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(module mounting:1pin (layer F.Cu) (tedit 5D61810C) (tstamp 5D63F39B)
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(at 101.6 98.96 90)
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(descr "module 1 pin (ou trou mecanique de percage)")
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(tags DEV)
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(path /5D63FD8B)
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(fp_text reference M1 (at 0 -3.048 90) (layer F.Fab) hide
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(effects (font (size 1 1) (thickness 0.15)))
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)
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(fp_text value Mounting (at 0 3 90) (layer F.Fab) hide
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(effects (font (size 1 1) (thickness 0.15)))
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)
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(fp_circle (center 0 0) (end 2 0.8) (layer F.Fab) (width 0.1))
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(fp_circle (center 0 0) (end 2.6 0) (layer F.CrtYd) (width 0.05))
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(fp_circle (center 0 0) (end 0 -2.286) (layer F.SilkS) (width 0.12))
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(pad 1 thru_hole circle (at 0 0 90) (size 5 5) (drill 3.048) (layers *.Cu *.Mask))
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)
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(module mounting:1pin (layer F.Cu) (tedit 5D61810C) (tstamp 5D63F3A3)
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(at 193.04 98.96)
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(descr "module 1 pin (ou trou mecanique de percage)")
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(tags DEV)
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(path /5D63FDB2)
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(fp_text reference M2 (at 0 -3.048) (layer F.Fab) hide
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(effects (font (size 1 1) (thickness 0.15)))
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)
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(fp_text value Mounting (at 0 3) (layer F.Fab) hide
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(effects (font (size 1 1) (thickness 0.15)))
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)
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(fp_circle (center 0 0) (end 2 0.8) (layer F.Fab) (width 0.1))
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(fp_circle (center 0 0) (end 2.6 0) (layer F.CrtYd) (width 0.05))
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(fp_circle (center 0 0) (end 0 -2.286) (layer F.SilkS) (width 0.12))
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(pad 1 thru_hole circle (at 0 0) (size 5 5) (drill 3.048) (layers *.Cu *.Mask))
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)
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(module mounting:1pin locked (layer F.Cu) (tedit 5D61810C) (tstamp 5D63F3AB)
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(at 193.04 114.3)
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(descr "module 1 pin (ou trou mecanique de percage)")
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(tags DEV)
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(path /5D63FDD2)
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(fp_text reference M3 (at 0 -3.048) (layer F.Fab) hide
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(effects (font (size 1 1) (thickness 0.15)))
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)
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(fp_text value Mounting (at 0 3) (layer F.Fab) hide
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(effects (font (size 1 1) (thickness 0.15)))
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)
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(fp_circle (center 0 0) (end 2 0.8) (layer F.Fab) (width 0.1))
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(fp_circle (center 0 0) (end 2.6 0) (layer F.CrtYd) (width 0.05))
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(fp_circle (center 0 0) (end 0 -2.286) (layer F.SilkS) (width 0.12))
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(pad 1 thru_hole circle (at 0 0) (size 5 5) (drill 3.048) (layers *.Cu *.Mask))
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)
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(module mounting:1pin locked (layer F.Cu) (tedit 5D61810C) (tstamp 5D63F3B3)
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(at 101.6 114.3)
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(descr "module 1 pin (ou trou mecanique de percage)")
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(tags DEV)
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(path /5D63FDF2)
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(fp_text reference M4 (at 0 -3.048) (layer F.Fab) hide
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(effects (font (size 1 1) (thickness 0.15)))
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)
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(fp_text value Mounting (at 0 3) (layer F.Fab) hide
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(effects (font (size 1 1) (thickness 0.15)))
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)
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(fp_circle (center 0 0) (end 2 0.8) (layer F.Fab) (width 0.1))
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(fp_circle (center 0 0) (end 2.6 0) (layer F.CrtYd) (width 0.05))
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(fp_circle (center 0 0) (end 0 -2.286) (layer F.SilkS) (width 0.12))
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(pad 1 thru_hole circle (at 0 0) (size 5 5) (drill 3.048) (layers *.Cu *.Mask))
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)
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(module Pin_Headers:Pin_Header_Straight_1x39_Pitch2.54mm (layer B.Cu) (tedit 5E2DEE07) (tstamp 5DD08C54)
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(at 195.58 109.22 90)
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(descr "Through hole straight pin header, 1x39, 2.54mm pitch, single row")
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(tags "Through hole pin header THT 1x39 2.54mm single row")
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(path /5DD0D32D)
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(fp_text reference J2 (at 0 2.33 90) (layer B.SilkS)
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(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
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)
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(fp_text value "Project Platform" (at -2.54 -81.28 180) (layer B.Fab)
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(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
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)
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(fp_line (start -0.635 1.27) (end 1.27 1.27) (layer B.Fab) (width 0.1))
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(fp_line (start 1.27 1.27) (end 1.27 -97.79) (layer B.Fab) (width 0.1))
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(fp_line (start 1.27 -97.79) (end -1.27 -97.79) (layer B.Fab) (width 0.1))
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(fp_line (start -1.27 -97.79) (end -1.27 0.635) (layer B.Fab) (width 0.1))
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(fp_line (start -1.27 0.635) (end -0.635 1.27) (layer B.Fab) (width 0.1))
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(fp_line (start -1.33 -97.85) (end 1.33 -97.85) (layer B.SilkS) (width 0.12))
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(fp_line (start -1.33 -1.27) (end -1.33 -97.85) (layer B.SilkS) (width 0.12))
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(fp_line (start 1.33 -1.27) (end 1.33 -97.85) (layer B.SilkS) (width 0.12))
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(fp_line (start -1.33 -1.27) (end 1.33 -1.27) (layer B.SilkS) (width 0.12))
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(fp_line (start -1.33 0) (end -1.33 1.33) (layer B.SilkS) (width 0.12))
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(fp_line (start -1.33 1.33) (end 0 1.33) (layer B.SilkS) (width 0.12))
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(fp_line (start -1.8 1.8) (end -1.8 -98.3) (layer B.CrtYd) (width 0.05))
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(fp_line (start -1.8 -98.3) (end 1.8 -98.3) (layer B.CrtYd) (width 0.05))
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(fp_line (start 1.8 -98.3) (end 1.8 1.8) (layer B.CrtYd) (width 0.05))
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(fp_line (start 1.8 1.8) (end -1.8 1.8) (layer B.CrtYd) (width 0.05))
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(fp_text user %R (at 0 -48.26 360) (layer B.Fab)
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(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
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)
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(pad 1 thru_hole rect (at 0 0 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
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(net 3 /A15))
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(pad 2 thru_hole oval (at 0 -2.54 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
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(net 4 /A14))
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(pad 3 thru_hole oval (at 0 -5.08 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
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(net 5 /A13))
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(pad 4 thru_hole oval (at 0 -7.62 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
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(net 6 /A12))
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(pad 5 thru_hole oval (at 0 -10.16 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
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(net 7 /A11))
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(pad 6 thru_hole oval (at 0 -12.7 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
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(net 8 /A10))
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(pad 7 thru_hole oval (at 0 -15.24 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
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(net 9 /A9))
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(pad 8 thru_hole oval (at 0 -17.78 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
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(net 10 /A8))
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(pad 9 thru_hole oval (at 0 -20.32 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
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(net 11 /A7))
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(pad 10 thru_hole oval (at 0 -22.86 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
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(net 12 /A6))
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(pad 11 thru_hole oval (at 0 -25.4 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
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(net 13 /A5))
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(pad 12 thru_hole oval (at 0 -27.94 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
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(net 14 /A4))
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(pad 13 thru_hole oval (at 0 -30.48 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
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(net 15 /A3))
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(pad 14 thru_hole oval (at 0 -33.02 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
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(net 16 /A2))
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(pad 15 thru_hole oval (at 0 -35.56 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
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(net 17 /A1))
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(pad 16 thru_hole oval (at 0 -38.1 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
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(net 18 /A0))
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(pad 17 thru_hole oval (at 0 -40.64 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
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(net 1 GND))
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(pad 18 thru_hole oval (at 0 -43.18 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
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(net 2 VCC))
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(pad 19 thru_hole oval (at 0 -45.72 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
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(net 37 /PHI2))
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(pad 20 thru_hole oval (at 0 -48.26 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
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(net 32 /~RESET))
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(pad 21 thru_hole oval (at 0 -50.8 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
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(net 38 /PHI0))
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(pad 22 thru_hole oval (at 0 -53.34 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
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(net 19 /~IRQ))
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(pad 23 thru_hole oval (at 0 -55.88 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
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(net 20 /~NMI))
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(pad 24 thru_hole oval (at 0 -58.42 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
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(net 21 /R/~W))
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(pad 25 thru_hole oval (at 0 -60.96 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
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(net 22 /~RDY))
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(pad 26 thru_hole oval (at 0 -63.5 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
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|
(net 23 /SYNC))
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(pad 27 thru_hole oval (at 0 -66.04 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
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(net 24 /D0))
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(pad 28 thru_hole oval (at 0 -68.58 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
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(net 25 /D1))
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(pad 29 thru_hole oval (at 0 -71.12 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
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(net 26 /D2))
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(pad 30 thru_hole oval (at 0 -73.66 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
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(net 27 /D3))
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(pad 31 thru_hole oval (at 0 -76.2 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
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(net 28 /D4))
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(pad 32 thru_hole oval (at 0 -78.74 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
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(net 29 /D5))
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(pad 33 thru_hole oval (at 0 -81.28 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
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(net 30 /D6))
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(pad 34 thru_hole oval (at 0 -83.82 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
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(net 31 /D7))
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(pad 35 thru_hole oval (at 0 -86.36 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
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(net 33 /PIN35))
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(pad 36 thru_hole oval (at 0 -88.9 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
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(net 34 /PIN36))
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(pad 37 thru_hole oval (at 0 -91.44 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
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(net 35 /PIN37))
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(pad 38 thru_hole oval (at 0 -93.98 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
|
|
(net 39 /~IO3))
|
|
(pad 39 thru_hole oval (at 0 -96.52 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
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|
(net 36 /PIN39))
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|
(model ${KISYS3DMOD}/Pin_Headers.3dshapes/Pin_Header_Straight_1x39_Pitch2.54mm.wrl
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|
(at (xyz 0 0 0))
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(scale (xyz 1 1 1))
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(rotate (xyz 0 0 0))
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|
)
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|
)
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|
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(module Capacitors_THT:C_Disc_D4.7mm_W2.5mm_P5.00mm (layer B.Cu) (tedit 5DD0871F) (tstamp 5DD08DB8)
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|
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