RC-Project-Board/platforms/PP Backplane Extension/PP Backplane Extension.kicad_pcb
Tor-Eirik Bakke Lunde 17020442b2 Backplane extension
2020-01-27 16:34:13 +01:00

935 lines
59 KiB
Plaintext

(kicad_pcb (version 4) (host pcbnew 4.0.7)
(general
(links 41)
(no_connects 0)
(area 97.714999 95.074999 196.925001 118.185001)
(thickness 1.6)
(drawings 55)
(tracks 41)
(zones 0)
(modules 7)
(nets 40)
)
(page A4)
(layers
(0 F.Cu signal)
(31 B.Cu signal hide)
(32 B.Adhes user)
(33 F.Adhes user)
(34 B.Paste user)
(35 F.Paste user)
(36 B.SilkS user hide)
(37 F.SilkS user)
(38 B.Mask user)
(39 F.Mask user)
(40 Dwgs.User user)
(41 Cmts.User user)
(42 Eco1.User user)
(43 Eco2.User user)
(44 Edge.Cuts user)
(45 Margin user)
(46 B.CrtYd user)
(47 F.CrtYd user)
(48 B.Fab user)
(49 F.Fab user)
)
(setup
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(zone_45_only no)
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(uvia_size 0.3)
(uvia_drill 0.1)
(uvias_allowed no)
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(pcb_text_width 0.3)
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(pad_to_mask_clearance 0.2)
(aux_axis_origin 104.14 52.07)
(visible_elements 7FFFFFFF)
(pcbplotparams
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(mode 1)
(useauxorigin false)
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(subtractmaskfromsilk false)
(outputformat 1)
(mirror false)
(drillshape 0)
(scaleselection 1)
(outputdirectory export/))
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(net 0 "")
(net 1 GND)
(net 2 VCC)
(net 3 /A15)
(net 4 /A14)
(net 5 /A13)
(net 6 /A12)
(net 7 /A11)
(net 8 /A10)
(net 9 /A9)
(net 10 /A8)
(net 11 /A7)
(net 12 /A6)
(net 13 /A5)
(net 14 /A4)
(net 15 /A3)
(net 16 /A2)
(net 17 /A1)
(net 18 /A0)
(net 19 /~IRQ)
(net 20 /~NMI)
(net 21 /R/~W)
(net 22 /~RDY)
(net 23 /SYNC)
(net 24 /D0)
(net 25 /D1)
(net 26 /D2)
(net 27 /D3)
(net 28 /D4)
(net 29 /D5)
(net 30 /D6)
(net 31 /D7)
(net 32 /~RESET)
(net 33 /PIN35)
(net 34 /PIN36)
(net 35 /PIN37)
(net 36 /PIN39)
(net 37 /PHI2)
(net 38 /PHI0)
(net 39 /~IO3)
(net_class Default "This is the default net class."
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(trace_width 0.25)
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(add_net /A1)
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(add_net /D3)
(add_net /D4)
(add_net /D5)
(add_net /D6)
(add_net /D7)
(add_net /PHI0)
(add_net /PHI2)
(add_net /PIN35)
(add_net /PIN36)
(add_net /PIN37)
(add_net /PIN39)
(add_net /R/~W)
(add_net /SYNC)
(add_net /~IO3)
(add_net /~IRQ)
(add_net /~NMI)
(add_net /~RDY)
(add_net /~RESET)
(add_net GND)
(add_net VCC)
)
(net_class VCC ""
(clearance 0.2)
(trace_width 0.75)
(via_dia 0.6)
(via_drill 0.4)
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(module mounting:1pin (layer F.Cu) (tedit 5D61810C) (tstamp 5D63F39B)
(at 101.6 98.96 90)
(descr "module 1 pin (ou trou mecanique de percage)")
(tags DEV)
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(module mounting:1pin (layer F.Cu) (tedit 5D61810C) (tstamp 5D63F3A3)
(at 193.04 98.96)
(descr "module 1 pin (ou trou mecanique de percage)")
(tags DEV)
(path /5D63FDB2)
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(module mounting:1pin locked (layer F.Cu) (tedit 5D61810C) (tstamp 5D63F3AB)
(at 193.04 114.3)
(descr "module 1 pin (ou trou mecanique de percage)")
(tags DEV)
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(module mounting:1pin locked (layer F.Cu) (tedit 5D61810C) (tstamp 5D63F3B3)
(at 101.6 114.3)
(descr "module 1 pin (ou trou mecanique de percage)")
(tags DEV)
(path /5D63FDF2)
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(module Pin_Headers:Pin_Header_Straight_1x39_Pitch2.54mm (layer B.Cu) (tedit 5E2DEE07) (tstamp 5DD08C54)
(at 195.58 109.22 90)
(descr "Through hole straight pin header, 1x39, 2.54mm pitch, single row")
(tags "Through hole pin header THT 1x39 2.54mm single row")
(path /5DD0D32D)
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(pad 1 thru_hole rect (at 0 0 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 3 /A15))
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(net 2 VCC))
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(net 37 /PHI2))
(pad 20 thru_hole oval (at 0 -48.26 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 32 /~RESET))
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(net 38 /PHI0))
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(net 19 /~IRQ))
(pad 23 thru_hole oval (at 0 -55.88 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 20 /~NMI))
(pad 24 thru_hole oval (at 0 -58.42 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 21 /R/~W))
(pad 25 thru_hole oval (at 0 -60.96 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 22 /~RDY))
(pad 26 thru_hole oval (at 0 -63.5 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 23 /SYNC))
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(pad 28 thru_hole oval (at 0 -68.58 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
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(pad 33 thru_hole oval (at 0 -81.28 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
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(net 31 /D7))
(pad 35 thru_hole oval (at 0 -86.36 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 33 /PIN35))
(pad 36 thru_hole oval (at 0 -88.9 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 34 /PIN36))
(pad 37 thru_hole oval (at 0 -91.44 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
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(pad 38 thru_hole oval (at 0 -93.98 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 39 /~IO3))
(pad 39 thru_hole oval (at 0 -96.52 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 36 /PIN39))
(model ${KISYS3DMOD}/Pin_Headers.3dshapes/Pin_Header_Straight_1x39_Pitch2.54mm.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module Capacitors_THT:C_Disc_D4.7mm_W2.5mm_P5.00mm (layer B.Cu) (tedit 5DD0871F) (tstamp 5DD08DB8)
(at 149.86 113.03 180)
(descr "C, Disc series, Radial, pin pitch=5.00mm, , diameter*width=4.7*2.5mm^2, Capacitor, http://www.vishay.com/docs/45233/krseries.pdf")
(tags "C Disc series Radial pin pitch 5.00mm diameter 4.7mm width 2.5mm Capacitor")
(path /5DD0E0B6)
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(net 2 VCC))
(pad 2 thru_hole circle (at 5 0 180) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
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(model ${KISYS3DMOD}/Capacitors_THT.3dshapes/C_Disc_D4.7mm_W2.5mm_P5.00mm.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
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)
(module Pin_Headers:Pin_Header_Straight_1x39_Pitch2.54mm (layer B.Cu) (tedit 5E2DEE10) (tstamp 5E2DDD17)
(at 195.58 104.04 90)
(descr "Through hole straight pin header, 1x39, 2.54mm pitch, single row")
(tags "Through hole pin header THT 1x39 2.54mm single row")
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