45 lines
1.6 KiB
Markdown
45 lines
1.6 KiB
Markdown
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RC6502 Bus
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==========
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The RC6502 system uses a 39-pin bus; the physical layout is a single
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row of 0.05" square header pins on 0.1" centers. Conventionally the
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boards have a male right-angle connector on one edge and these are
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plugged into a [backplane] with female connectors.
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The pinout is as follows. The signal directions (input or output from
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the point of view of CPU and peripheral boards, respectively) are
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guidelines, and a specific board might have a different direction. For
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signals where both are marked `in`, both CPU and peripheral boards are
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usually capable of using the signal as an input, but it's expected
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that one board in the system will be generating the signal.
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Signal Pin CPU Periph
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Name No. Dir. Dir. Notes
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--------------------------------------------------------------
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A15 1 out in
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… …
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A0 16 out in
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GND 17 in in
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Vcc 18 in in
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Φ2out 19 in in
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/RESET 20 in in Must be actively controlled by one board
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Φ0in 21 in in
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/IRQ 22 in in Pull-up req'd; usually provided by CPU board
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Φ1out 23 in in Sometimes called EX0
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R/W̅ 24 out in
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RDY 25 in out
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SYNC 26 out in
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D0 27 ↔ ↔
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… …
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D7 34 ↔ ↔
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TX 35 ? ?
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RX 36 ? ?
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/NMI 37 in out Pull-up req'd; usually provided by CPU board
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× 38 Also known as EX1
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× 39 Also known as EX2
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<!-------------------------------------------------------------------->
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[Backplane]: ./RC6502%20Backplane/
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