2017-05-14 19:08:06 +00:00
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(kicad_pcb (version 4) (host pcbnew 4.0.6)
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(general
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2017-05-29 20:18:40 +00:00
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(links 65)
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2017-05-14 19:08:06 +00:00
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(no_connects 0)
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2017-05-29 20:18:40 +00:00
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(area 109.144999 90.094999 208.355001 144.855001)
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2017-05-14 19:08:06 +00:00
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(thickness 1.6)
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2017-06-09 17:10:10 +00:00
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(drawings 54)
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(tracks 410)
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2017-05-14 19:08:06 +00:00
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(zones 0)
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2017-05-29 20:18:40 +00:00
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(modules 14)
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(nets 40)
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2017-05-14 19:08:06 +00:00
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)
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(page A4)
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(layers
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(0 F.Cu signal)
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(31 B.Cu signal)
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(32 B.Adhes user)
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(33 F.Adhes user)
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(34 B.Paste user)
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(35 F.Paste user)
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(36 B.SilkS user)
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(37 F.SilkS user)
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(38 B.Mask user)
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(39 F.Mask user)
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(40 Dwgs.User user)
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(41 Cmts.User user)
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(42 Eco1.User user)
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(43 Eco2.User user)
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(44 Edge.Cuts user)
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(45 Margin user)
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(46 B.CrtYd user)
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(47 F.CrtYd user)
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(48 B.Fab user)
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(49 F.Fab user)
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)
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(setup
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(last_trace_width 0.25)
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(trace_clearance 0.2)
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(zone_clearance 0.508)
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(zone_45_only no)
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(trace_min 0.2)
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(segment_width 0.2)
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(edge_width 0.15)
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(via_size 0.6)
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(via_drill 0.4)
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(via_min_size 0.4)
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(via_min_drill 0.3)
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(uvia_size 0.3)
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(uvia_drill 0.1)
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(uvias_allowed no)
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(uvia_min_size 0.2)
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(uvia_min_drill 0.1)
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(pcb_text_width 0.3)
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(pcb_text_size 1.5 1.5)
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(mod_edge_width 0.15)
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(mod_text_size 1 1)
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(mod_text_width 0.15)
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(pad_size 1.524 1.524)
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(pad_drill 0.762)
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(pad_to_mask_clearance 0.2)
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(aux_axis_origin 0 0)
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2017-05-15 18:37:39 +00:00
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(visible_elements 7FFFFFFF)
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2017-05-14 19:08:06 +00:00
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(pcbplotparams
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2017-05-15 20:54:58 +00:00
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(layerselection 0x011fc_80000001)
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(usegerberextensions true)
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2017-05-14 19:08:06 +00:00
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(excludeedgelayer true)
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(linewidth 0.100000)
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(plotframeref false)
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(viasonmask false)
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(mode 1)
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(useauxorigin false)
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(hpglpennumber 1)
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(hpglpenspeed 20)
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(hpglpendiameter 15)
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(hpglpenoverlay 2)
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(psnegative false)
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(psa4output false)
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(plotreference true)
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(plotvalue true)
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(plotinvisibletext false)
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(padsonsilk false)
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(subtractmaskfromsilk false)
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(outputformat 1)
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(mirror false)
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2017-05-15 20:54:58 +00:00
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(drillshape 0)
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2017-05-14 19:08:06 +00:00
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(scaleselection 1)
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2017-05-15 20:54:58 +00:00
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(outputdirectory "D:/ownCloud/Documents/Projects/RC6502/RC6502 ROM/export/"))
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2017-05-14 19:08:06 +00:00
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)
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(net 0 "")
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(net 1 VCC)
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(net 2 GND)
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(net 3 A15)
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(net 4 A14)
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(net 5 A13)
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(net 6 A12)
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(net 7 A11)
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(net 8 A10)
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(net 9 A9)
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(net 10 A8)
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(net 11 A7)
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(net 12 A6)
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(net 13 A5)
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(net 14 A4)
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(net 15 A3)
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(net 16 A2)
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(net 17 A1)
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(net 18 A0)
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(net 19 D0)
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(net 20 D1)
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(net 21 D2)
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(net 22 D3)
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(net 23 D4)
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(net 24 D5)
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(net 25 D6)
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(net 26 D7)
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(net 27 "Net-(J1-Pad39)")
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(net 28 A13_W)
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(net 29 A14_W)
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(net 30 PAGE_EN)
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(net 31 "Net-(JP3-Pad2)")
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(net 32 CS)
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(net 33 CS_IN)
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(net 34 "Net-(U2-Pad5)")
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(net 35 "Net-(U2-Pad10)")
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(net 36 "Net-(U2-Pad3)")
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(net 37 "Net-(U3-Pad2)")
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(net 38 "Net-(R2-Pad1)")
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2017-05-29 20:18:40 +00:00
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(net 39 "Net-(JP5-Pad1)")
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2017-05-14 19:08:06 +00:00
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(net_class Default "This is the default net class."
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(clearance 0.2)
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(trace_width 0.25)
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(via_dia 0.6)
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(via_drill 0.4)
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(uvia_dia 0.3)
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(uvia_drill 0.1)
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(add_net A0)
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(add_net A1)
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(add_net A10)
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(add_net A11)
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(add_net A12)
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(add_net A13)
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(add_net A13_W)
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(add_net A14)
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(add_net A14_W)
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(add_net A15)
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(add_net A2)
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(add_net A3)
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(add_net A4)
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(add_net A5)
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(add_net A6)
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(add_net A7)
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(add_net A8)
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(add_net A9)
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(add_net CS)
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(add_net CS_IN)
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(add_net D0)
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(add_net D1)
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(add_net D2)
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(add_net D3)
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(add_net D4)
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(add_net D5)
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(add_net D6)
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(add_net D7)
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(add_net GND)
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(add_net "Net-(J1-Pad39)")
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(add_net "Net-(JP3-Pad2)")
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2017-05-29 20:18:40 +00:00
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(add_net "Net-(JP5-Pad1)")
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2017-05-14 19:08:06 +00:00
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(add_net "Net-(R2-Pad1)")
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(add_net "Net-(U2-Pad10)")
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(add_net "Net-(U2-Pad3)")
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(add_net "Net-(U2-Pad5)")
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(add_net "Net-(U3-Pad2)")
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(add_net PAGE_EN)
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(add_net VCC)
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)
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2017-06-09 17:10:10 +00:00
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(module Capacitors_THT:C_Disc_D4.7mm_W2.5mm_P5.00mm (layer F.Cu) (tedit 593ACF87) (tstamp 590E5E81)
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2017-05-14 19:08:06 +00:00
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(at 160.02 113.03 180)
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(descr "C, Disc series, Radial, pin pitch=5.00mm, , diameter*width=4.7*2.5mm^2, Capacitor, http://www.vishay.com/docs/45233/krseries.pdf")
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(tags "C Disc series Radial pin pitch 5.00mm diameter 4.7mm width 2.5mm Capacitor")
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(path /590DFF39)
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2017-06-09 17:10:10 +00:00
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(fp_text reference C1 (at 2.54 0 180) (layer F.SilkS)
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2017-05-14 19:08:06 +00:00
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(effects (font (size 1 1) (thickness 0.15)))
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)
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2017-06-09 17:10:10 +00:00
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(fp_text value 100nF (at 2.54 -2.54 180) (layer F.Fab)
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2017-05-14 19:08:06 +00:00
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(effects (font (size 1 1) (thickness 0.15)))
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)
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(fp_line (start 0.15 -1.25) (end 0.15 1.25) (layer F.Fab) (width 0.1))
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(fp_line (start 0.15 1.25) (end 4.85 1.25) (layer F.Fab) (width 0.1))
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(fp_line (start 4.85 1.25) (end 4.85 -1.25) (layer F.Fab) (width 0.1))
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(fp_line (start 4.85 -1.25) (end 0.15 -1.25) (layer F.Fab) (width 0.1))
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(fp_line (start 0.09 -1.31) (end 4.91 -1.31) (layer F.SilkS) (width 0.12))
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(fp_line (start 0.09 1.31) (end 4.91 1.31) (layer F.SilkS) (width 0.12))
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(fp_line (start 0.09 -1.31) (end 0.09 -0.996) (layer F.SilkS) (width 0.12))
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(fp_line (start 0.09 0.996) (end 0.09 1.31) (layer F.SilkS) (width 0.12))
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(fp_line (start 4.91 -1.31) (end 4.91 -0.996) (layer F.SilkS) (width 0.12))
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(fp_line (start 4.91 0.996) (end 4.91 1.31) (layer F.SilkS) (width 0.12))
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(fp_line (start -1.05 -1.6) (end -1.05 1.6) (layer F.CrtYd) (width 0.05))
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(fp_line (start -1.05 1.6) (end 6.05 1.6) (layer F.CrtYd) (width 0.05))
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(fp_line (start 6.05 1.6) (end 6.05 -1.6) (layer F.CrtYd) (width 0.05))
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(fp_line (start 6.05 -1.6) (end -1.05 -1.6) (layer F.CrtYd) (width 0.05))
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(pad 1 thru_hole circle (at 0 0 180) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
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(net 1 VCC))
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(pad 2 thru_hole circle (at 5 0 180) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
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(net 2 GND))
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(model Capacitors_THT.3dshapes/C_Disc_D4.7mm_W2.5mm_P5.00mm.wrl
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(at (xyz 0 0 0))
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(scale (xyz 0.393701 0.393701 0.393701))
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(rotate (xyz 0 0 0))
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)
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)
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2017-06-09 17:10:10 +00:00
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(module Capacitors_THT:C_Disc_D4.7mm_W2.5mm_P5.00mm (layer F.Cu) (tedit 593ACFAE) (tstamp 590E5E87)
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2017-05-15 20:54:58 +00:00
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(at 111.76 102.87 270)
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2017-05-14 19:08:06 +00:00
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(descr "C, Disc series, Radial, pin pitch=5.00mm, , diameter*width=4.7*2.5mm^2, Capacitor, http://www.vishay.com/docs/45233/krseries.pdf")
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(tags "C Disc series Radial pin pitch 5.00mm diameter 4.7mm width 2.5mm Capacitor")
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(path /590E0960)
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2017-06-09 17:10:10 +00:00
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(fp_text reference C2 (at 2.54 0 360) (layer F.SilkS)
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2017-05-14 19:08:06 +00:00
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(effects (font (size 1 1) (thickness 0.15)))
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)
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2017-06-09 17:10:10 +00:00
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(fp_text value 100nF (at 2.54 -2.54 270) (layer F.Fab)
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2017-05-14 19:08:06 +00:00
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(effects (font (size 1 1) (thickness 0.15)))
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)
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(fp_line (start 0.15 -1.25) (end 0.15 1.25) (layer F.Fab) (width 0.1))
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(fp_line (start 0.15 1.25) (end 4.85 1.25) (layer F.Fab) (width 0.1))
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(fp_line (start 4.85 1.25) (end 4.85 -1.25) (layer F.Fab) (width 0.1))
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(fp_line (start 4.85 -1.25) (end 0.15 -1.25) (layer F.Fab) (width 0.1))
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(fp_line (start 0.09 -1.31) (end 4.91 -1.31) (layer F.SilkS) (width 0.12))
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(fp_line (start 0.09 1.31) (end 4.91 1.31) (layer F.SilkS) (width 0.12))
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(fp_line (start 0.09 -1.31) (end 0.09 -0.996) (layer F.SilkS) (width 0.12))
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(fp_line (start 0.09 0.996) (end 0.09 1.31) (layer F.SilkS) (width 0.12))
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(fp_line (start 4.91 -1.31) (end 4.91 -0.996) (layer F.SilkS) (width 0.12))
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(fp_line (start 4.91 0.996) (end 4.91 1.31) (layer F.SilkS) (width 0.12))
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(fp_line (start -1.05 -1.6) (end -1.05 1.6) (layer F.CrtYd) (width 0.05))
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(fp_line (start -1.05 1.6) (end 6.05 1.6) (layer F.CrtYd) (width 0.05))
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(fp_line (start 6.05 1.6) (end 6.05 -1.6) (layer F.CrtYd) (width 0.05))
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(fp_line (start 6.05 -1.6) (end -1.05 -1.6) (layer F.CrtYd) (width 0.05))
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(pad 1 thru_hole circle (at 0 0 270) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
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(net 1 VCC))
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(pad 2 thru_hole circle (at 5 0 270) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
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(net 2 GND))
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(model Capacitors_THT.3dshapes/C_Disc_D4.7mm_W2.5mm_P5.00mm.wrl
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(at (xyz 0 0 0))
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(scale (xyz 0.393701 0.393701 0.393701))
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(rotate (xyz 0 0 0))
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)
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)
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2017-06-09 17:10:10 +00:00
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|
|
(module Capacitors_THT:C_Disc_D4.7mm_W2.5mm_P5.00mm (layer F.Cu) (tedit 593ACFA5) (tstamp 590E5E8D)
|
2017-05-14 19:08:06 +00:00
|
|
|
(at 111.76 118.11 270)
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|
|
(descr "C, Disc series, Radial, pin pitch=5.00mm, , diameter*width=4.7*2.5mm^2, Capacitor, http://www.vishay.com/docs/45233/krseries.pdf")
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(tags "C Disc series Radial pin pitch 5.00mm diameter 4.7mm width 2.5mm Capacitor")
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|
(path /59106500)
|
2017-06-09 17:10:10 +00:00
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(fp_text reference C3 (at 2.54 0 360) (layer F.SilkS)
|
2017-05-14 19:08:06 +00:00
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|
(effects (font (size 1 1) (thickness 0.15)))
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)
|
2017-06-09 17:10:10 +00:00
|
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(fp_text value 100nF (at 2.54 -2.54 270) (layer F.Fab)
|
2017-05-14 19:08:06 +00:00
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(effects (font (size 1 1) (thickness 0.15)))
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)
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(fp_line (start 0.15 -1.25) (end 0.15 1.25) (layer F.Fab) (width 0.1))
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(fp_line (start 0.15 1.25) (end 4.85 1.25) (layer F.Fab) (width 0.1))
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(fp_line (start 4.85 1.25) (end 4.85 -1.25) (layer F.Fab) (width 0.1))
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(fp_line (start 4.85 -1.25) (end 0.15 -1.25) (layer F.Fab) (width 0.1))
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(fp_line (start 0.09 -1.31) (end 4.91 -1.31) (layer F.SilkS) (width 0.12))
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(fp_line (start 0.09 1.31) (end 4.91 1.31) (layer F.SilkS) (width 0.12))
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(fp_line (start 0.09 -1.31) (end 0.09 -0.996) (layer F.SilkS) (width 0.12))
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(at 207.01 143.51 270)
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(module Pin_Headers:Pin_Header_Angled_1x02_Pitch2.54mm (layer F.Cu) (tedit 590E7069) (tstamp 590E5ECC)
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(at 186.69 91.44 90)
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(descr "Through hole angled pin header, 1x02, 2.54mm pitch, 6mm pin length, single row")
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(fp_line (start 9.96 2.16) (end 3.96 2.16) (layer F.SilkS) (width 0.12))
|
|
|
|
(fp_line (start 0.91 2.16) (end 1.34 2.16) (layer F.SilkS) (width 0.12))
|
|
|
|
(fp_line (start 0.91 2.92) (end 1.34 2.92) (layer F.SilkS) (width 0.12))
|
|
|
|
(fp_line (start -1.27 0) (end -1.27 -1.27) (layer F.SilkS) (width 0.12))
|
|
|
|
(fp_line (start -1.27 -1.27) (end 0 -1.27) (layer F.SilkS) (width 0.12))
|
|
|
|
(fp_line (start -1.8 -1.8) (end -1.8 4.35) (layer F.CrtYd) (width 0.05))
|
|
|
|
(fp_line (start -1.8 4.35) (end 10.4 4.35) (layer F.CrtYd) (width 0.05))
|
|
|
|
(fp_line (start 10.4 4.35) (end 10.4 -1.8) (layer F.CrtYd) (width 0.05))
|
|
|
|
(fp_line (start 10.4 -1.8) (end -1.8 -1.8) (layer F.CrtYd) (width 0.05))
|
|
|
|
(fp_text user %R (at 11.43 1.27 180) (layer F.Fab)
|
|
|
|
(effects (font (size 1 1) (thickness 0.15)))
|
|
|
|
)
|
|
|
|
(pad 1 thru_hole rect (at 0 0 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
|
|
|
|
(net 30 PAGE_EN))
|
|
|
|
(pad 2 thru_hole oval (at 0 2.54 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
|
|
|
|
(net 31 "Net-(JP3-Pad2)"))
|
|
|
|
(model ${KISYS3DMOD}/Pin_Headers.3dshapes/Pin_Header_Angled_1x02_Pitch2.54mm.wrl
|
|
|
|
(at (xyz 0 -0.05 0))
|
|
|
|
(scale (xyz 1 1 1))
|
|
|
|
(rotate (xyz 0 0 90))
|
|
|
|
)
|
|
|
|
)
|
|
|
|
|
|
|
|
(module Pin_Headers:Pin_Header_Angled_1x02_Pitch2.54mm (layer F.Cu) (tedit 590E706D) (tstamp 590E5ED2)
|
|
|
|
(at 177.8 91.44 90)
|
|
|
|
(descr "Through hole angled pin header, 1x02, 2.54mm pitch, 6mm pin length, single row")
|
|
|
|
(tags "Through hole angled pin header THT 1x02 2.54mm single row")
|
|
|
|
(path /590F391B)
|
|
|
|
(fp_text reference JP4 (at 11.43 1.27 180) (layer F.SilkS)
|
|
|
|
(effects (font (size 1 1) (thickness 0.15)))
|
|
|
|
)
|
|
|
|
(fp_text value "Bus enable" (at 5.715 5.715 90) (layer F.Fab)
|
|
|
|
(effects (font (size 1 1) (thickness 0.15)))
|
|
|
|
)
|
|
|
|
(fp_line (start 1.4 -1.27) (end 1.4 1.27) (layer F.Fab) (width 0.1))
|
|
|
|
(fp_line (start 1.4 1.27) (end 3.9 1.27) (layer F.Fab) (width 0.1))
|
|
|
|
(fp_line (start 3.9 1.27) (end 3.9 -1.27) (layer F.Fab) (width 0.1))
|
|
|
|
(fp_line (start 3.9 -1.27) (end 1.4 -1.27) (layer F.Fab) (width 0.1))
|
|
|
|
(fp_line (start 0 -0.32) (end 0 0.32) (layer F.Fab) (width 0.1))
|
|
|
|
(fp_line (start 0 0.32) (end 9.9 0.32) (layer F.Fab) (width 0.1))
|
|
|
|
(fp_line (start 9.9 0.32) (end 9.9 -0.32) (layer F.Fab) (width 0.1))
|
|
|
|
(fp_line (start 9.9 -0.32) (end 0 -0.32) (layer F.Fab) (width 0.1))
|
|
|
|
(fp_line (start 1.4 1.27) (end 1.4 3.81) (layer F.Fab) (width 0.1))
|
|
|
|
(fp_line (start 1.4 3.81) (end 3.9 3.81) (layer F.Fab) (width 0.1))
|
|
|
|
(fp_line (start 3.9 3.81) (end 3.9 1.27) (layer F.Fab) (width 0.1))
|
|
|
|
(fp_line (start 3.9 1.27) (end 1.4 1.27) (layer F.Fab) (width 0.1))
|
|
|
|
(fp_line (start 0 2.22) (end 0 2.86) (layer F.Fab) (width 0.1))
|
|
|
|
(fp_line (start 0 2.86) (end 9.9 2.86) (layer F.Fab) (width 0.1))
|
|
|
|
(fp_line (start 9.9 2.86) (end 9.9 2.22) (layer F.Fab) (width 0.1))
|
|
|
|
(fp_line (start 9.9 2.22) (end 0 2.22) (layer F.Fab) (width 0.1))
|
|
|
|
(fp_line (start 1.34 -1.33) (end 1.34 1.27) (layer F.SilkS) (width 0.12))
|
|
|
|
(fp_line (start 1.34 1.27) (end 3.96 1.27) (layer F.SilkS) (width 0.12))
|
|
|
|
(fp_line (start 3.96 1.27) (end 3.96 -1.33) (layer F.SilkS) (width 0.12))
|
|
|
|
(fp_line (start 3.96 -1.33) (end 1.34 -1.33) (layer F.SilkS) (width 0.12))
|
|
|
|
(fp_line (start 3.96 -0.38) (end 3.96 0.38) (layer F.SilkS) (width 0.12))
|
|
|
|
(fp_line (start 3.96 0.38) (end 9.96 0.38) (layer F.SilkS) (width 0.12))
|
|
|
|
(fp_line (start 9.96 0.38) (end 9.96 -0.38) (layer F.SilkS) (width 0.12))
|
|
|
|
(fp_line (start 9.96 -0.38) (end 3.96 -0.38) (layer F.SilkS) (width 0.12))
|
|
|
|
(fp_line (start 0.91 -0.38) (end 1.34 -0.38) (layer F.SilkS) (width 0.12))
|
|
|
|
(fp_line (start 0.91 0.38) (end 1.34 0.38) (layer F.SilkS) (width 0.12))
|
|
|
|
(fp_line (start 3.96 -0.26) (end 9.96 -0.26) (layer F.SilkS) (width 0.12))
|
|
|
|
(fp_line (start 3.96 -0.14) (end 9.96 -0.14) (layer F.SilkS) (width 0.12))
|
|
|
|
(fp_line (start 3.96 -0.02) (end 9.96 -0.02) (layer F.SilkS) (width 0.12))
|
|
|
|
(fp_line (start 3.96 0.1) (end 9.96 0.1) (layer F.SilkS) (width 0.12))
|
|
|
|
(fp_line (start 3.96 0.22) (end 9.96 0.22) (layer F.SilkS) (width 0.12))
|
|
|
|
(fp_line (start 3.96 0.34) (end 9.96 0.34) (layer F.SilkS) (width 0.12))
|
|
|
|
(fp_line (start 1.34 1.27) (end 1.34 3.87) (layer F.SilkS) (width 0.12))
|
|
|
|
(fp_line (start 1.34 3.87) (end 3.96 3.87) (layer F.SilkS) (width 0.12))
|
|
|
|
(fp_line (start 3.96 3.87) (end 3.96 1.27) (layer F.SilkS) (width 0.12))
|
|
|
|
(fp_line (start 3.96 1.27) (end 1.34 1.27) (layer F.SilkS) (width 0.12))
|
|
|
|
(fp_line (start 3.96 2.16) (end 3.96 2.92) (layer F.SilkS) (width 0.12))
|
|
|
|
(fp_line (start 3.96 2.92) (end 9.96 2.92) (layer F.SilkS) (width 0.12))
|
|
|
|
(fp_line (start 9.96 2.92) (end 9.96 2.16) (layer F.SilkS) (width 0.12))
|
|
|
|
(fp_line (start 9.96 2.16) (end 3.96 2.16) (layer F.SilkS) (width 0.12))
|
|
|
|
(fp_line (start 0.91 2.16) (end 1.34 2.16) (layer F.SilkS) (width 0.12))
|
|
|
|
(fp_line (start 0.91 2.92) (end 1.34 2.92) (layer F.SilkS) (width 0.12))
|
|
|
|
(fp_line (start -1.27 0) (end -1.27 -1.27) (layer F.SilkS) (width 0.12))
|
|
|
|
(fp_line (start -1.27 -1.27) (end 0 -1.27) (layer F.SilkS) (width 0.12))
|
|
|
|
(fp_line (start -1.8 -1.8) (end -1.8 4.35) (layer F.CrtYd) (width 0.05))
|
|
|
|
(fp_line (start -1.8 4.35) (end 10.4 4.35) (layer F.CrtYd) (width 0.05))
|
|
|
|
(fp_line (start 10.4 4.35) (end 10.4 -1.8) (layer F.CrtYd) (width 0.05))
|
|
|
|
(fp_line (start 10.4 -1.8) (end -1.8 -1.8) (layer F.CrtYd) (width 0.05))
|
|
|
|
(fp_text user %R (at 11.43 1.27 180) (layer F.Fab)
|
|
|
|
(effects (font (size 1 1) (thickness 0.15)))
|
|
|
|
)
|
|
|
|
(pad 1 thru_hole rect (at 0 0 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
|
|
|
|
(net 30 PAGE_EN))
|
|
|
|
(pad 2 thru_hole oval (at 0 2.54 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
|
|
|
|
(net 27 "Net-(J1-Pad39)"))
|
|
|
|
(model ${KISYS3DMOD}/Pin_Headers.3dshapes/Pin_Header_Angled_1x02_Pitch2.54mm.wrl
|
|
|
|
(at (xyz 0 -0.05 0))
|
|
|
|
(scale (xyz 1 1 1))
|
|
|
|
(rotate (xyz 0 0 90))
|
|
|
|
)
|
|
|
|
)
|
|
|
|
|
2017-06-09 17:10:10 +00:00
|
|
|
(module Resistors_THT:R_Axial_DIN0207_L6.3mm_D2.5mm_P10.16mm_Horizontal (layer F.Cu) (tedit 593ACFD6) (tstamp 590E5ED8)
|
2017-05-14 19:08:06 +00:00
|
|
|
(at 172.72 92.71 270)
|
|
|
|
(descr "Resistor, Axial_DIN0207 series, Axial, Horizontal, pin pitch=10.16mm, 0.25W = 1/4W, length*diameter=6.3*2.5mm^2, http://cdn-reichelt.de/documents/datenblatt/B400/1_4W%23YAG.pdf")
|
|
|
|
(tags "Resistor Axial_DIN0207 series Axial Horizontal pin pitch 10.16mm 0.25W = 1/4W length 6.3mm diameter 2.5mm")
|
|
|
|
(path /590BED30)
|
2017-06-09 17:10:10 +00:00
|
|
|
(fp_text reference R1 (at 5.08 0 360) (layer F.SilkS)
|
2017-05-14 19:08:06 +00:00
|
|
|
(effects (font (size 1 1) (thickness 0.15)))
|
|
|
|
)
|
2017-06-09 17:10:10 +00:00
|
|
|
(fp_text value 10k (at 12.7 0 360) (layer F.Fab)
|
2017-05-14 19:08:06 +00:00
|
|
|
(effects (font (size 1 1) (thickness 0.15)))
|
|
|
|
)
|
|
|
|
(fp_line (start 1.93 -1.25) (end 1.93 1.25) (layer F.Fab) (width 0.1))
|
|
|
|
(fp_line (start 1.93 1.25) (end 8.23 1.25) (layer F.Fab) (width 0.1))
|
|
|
|
(fp_line (start 8.23 1.25) (end 8.23 -1.25) (layer F.Fab) (width 0.1))
|
|
|
|
(fp_line (start 8.23 -1.25) (end 1.93 -1.25) (layer F.Fab) (width 0.1))
|
|
|
|
(fp_line (start 0 0) (end 1.93 0) (layer F.Fab) (width 0.1))
|
|
|
|
(fp_line (start 10.16 0) (end 8.23 0) (layer F.Fab) (width 0.1))
|
|
|
|
(fp_line (start 1.87 -1.31) (end 1.87 1.31) (layer F.SilkS) (width 0.12))
|
|
|
|
(fp_line (start 1.87 1.31) (end 8.29 1.31) (layer F.SilkS) (width 0.12))
|
|
|
|
(fp_line (start 8.29 1.31) (end 8.29 -1.31) (layer F.SilkS) (width 0.12))
|
|
|
|
(fp_line (start 8.29 -1.31) (end 1.87 -1.31) (layer F.SilkS) (width 0.12))
|
|
|
|
(fp_line (start 0.98 0) (end 1.87 0) (layer F.SilkS) (width 0.12))
|
|
|
|
(fp_line (start 9.18 0) (end 8.29 0) (layer F.SilkS) (width 0.12))
|
|
|
|
(fp_line (start -1.05 -1.6) (end -1.05 1.6) (layer F.CrtYd) (width 0.05))
|
|
|
|
(fp_line (start -1.05 1.6) (end 11.25 1.6) (layer F.CrtYd) (width 0.05))
|
|
|
|
(fp_line (start 11.25 1.6) (end 11.25 -1.6) (layer F.CrtYd) (width 0.05))
|
|
|
|
(fp_line (start 11.25 -1.6) (end -1.05 -1.6) (layer F.CrtYd) (width 0.05))
|
|
|
|
(pad 1 thru_hole circle (at 0 0 270) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
|
|
|
|
(net 2 GND))
|
|
|
|
(pad 2 thru_hole oval (at 10.16 0 270) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
|
|
|
|
(net 31 "Net-(JP3-Pad2)"))
|
|
|
|
(model Resistors_THT.3dshapes/R_Axial_DIN0207_L6.3mm_D2.5mm_P10.16mm_Horizontal.wrl
|
|
|
|
(at (xyz 0 0 0))
|
|
|
|
(scale (xyz 0.393701 0.393701 0.393701))
|
|
|
|
(rotate (xyz 0 0 0))
|
|
|
|
)
|
|
|
|
)
|
|
|
|
|
2017-06-09 17:10:10 +00:00
|
|
|
(module Resistors_THT:R_Axial_DIN0207_L6.3mm_D2.5mm_P10.16mm_Horizontal (layer F.Cu) (tedit 593ACFD2) (tstamp 590E5EDE)
|
2017-05-14 19:08:06 +00:00
|
|
|
(at 167.64 102.87 90)
|
|
|
|
(descr "Resistor, Axial_DIN0207 series, Axial, Horizontal, pin pitch=10.16mm, 0.25W = 1/4W, length*diameter=6.3*2.5mm^2, http://cdn-reichelt.de/documents/datenblatt/B400/1_4W%23YAG.pdf")
|
|
|
|
(tags "Resistor Axial_DIN0207 series Axial Horizontal pin pitch 10.16mm 0.25W = 1/4W length 6.3mm diameter 2.5mm")
|
|
|
|
(path /5910A54B)
|
2017-06-09 17:10:10 +00:00
|
|
|
(fp_text reference R2 (at 5.08 0 180) (layer F.SilkS)
|
2017-05-14 19:08:06 +00:00
|
|
|
(effects (font (size 1 1) (thickness 0.15)))
|
|
|
|
)
|
2017-06-09 17:10:10 +00:00
|
|
|
(fp_text value 3.3k (at -2.54 0 180) (layer F.Fab)
|
2017-05-14 19:08:06 +00:00
|
|
|
(effects (font (size 1 1) (thickness 0.15)))
|
|
|
|
)
|
|
|
|
(fp_line (start 1.93 -1.25) (end 1.93 1.25) (layer F.Fab) (width 0.1))
|
|
|
|
(fp_line (start 1.93 1.25) (end 8.23 1.25) (layer F.Fab) (width 0.1))
|
|
|
|
(fp_line (start 8.23 1.25) (end 8.23 -1.25) (layer F.Fab) (width 0.1))
|
|
|
|
(fp_line (start 8.23 -1.25) (end 1.93 -1.25) (layer F.Fab) (width 0.1))
|
|
|
|
(fp_line (start 0 0) (end 1.93 0) (layer F.Fab) (width 0.1))
|
|
|
|
(fp_line (start 10.16 0) (end 8.23 0) (layer F.Fab) (width 0.1))
|
|
|
|
(fp_line (start 1.87 -1.31) (end 1.87 1.31) (layer F.SilkS) (width 0.12))
|
|
|
|
(fp_line (start 1.87 1.31) (end 8.29 1.31) (layer F.SilkS) (width 0.12))
|
|
|
|
(fp_line (start 8.29 1.31) (end 8.29 -1.31) (layer F.SilkS) (width 0.12))
|
|
|
|
(fp_line (start 8.29 -1.31) (end 1.87 -1.31) (layer F.SilkS) (width 0.12))
|
|
|
|
(fp_line (start 0.98 0) (end 1.87 0) (layer F.SilkS) (width 0.12))
|
|
|
|
(fp_line (start 9.18 0) (end 8.29 0) (layer F.SilkS) (width 0.12))
|
|
|
|
(fp_line (start -1.05 -1.6) (end -1.05 1.6) (layer F.CrtYd) (width 0.05))
|
|
|
|
(fp_line (start -1.05 1.6) (end 11.25 1.6) (layer F.CrtYd) (width 0.05))
|
|
|
|
(fp_line (start 11.25 1.6) (end 11.25 -1.6) (layer F.CrtYd) (width 0.05))
|
|
|
|
(fp_line (start 11.25 -1.6) (end -1.05 -1.6) (layer F.CrtYd) (width 0.05))
|
|
|
|
(pad 1 thru_hole circle (at 0 0 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
|
|
|
|
(net 38 "Net-(R2-Pad1)"))
|
|
|
|
(pad 2 thru_hole oval (at 10.16 0 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
|
|
|
|
(net 1 VCC))
|
|
|
|
(model Resistors_THT.3dshapes/R_Axial_DIN0207_L6.3mm_D2.5mm_P10.16mm_Horizontal.wrl
|
|
|
|
(at (xyz 0 0 0))
|
|
|
|
(scale (xyz 0.393701 0.393701 0.393701))
|
|
|
|
(rotate (xyz 0 0 0))
|
|
|
|
)
|
|
|
|
)
|
|
|
|
|
2017-06-09 17:10:10 +00:00
|
|
|
(module Housings_DIP:DIP-28_W15.24mm_Socket_LongPads (layer F.Cu) (tedit 593ACF3B) (tstamp 590E5EFE)
|
2017-05-14 19:08:06 +00:00
|
|
|
(at 165.1 128.27 90)
|
|
|
|
(descr "28-lead dip package, row spacing 15.24 mm (600 mils), Socket, LongPads")
|
|
|
|
(tags "DIL DIP PDIP 2.54mm 15.24mm 600mil Socket LongPads")
|
|
|
|
(path /590E7B25)
|
2017-06-09 17:10:10 +00:00
|
|
|
(fp_text reference U1 (at 7.62 17.145 180) (layer F.SilkS)
|
2017-05-14 19:08:06 +00:00
|
|
|
(effects (font (size 1 1) (thickness 0.15)))
|
|
|
|
)
|
2017-06-09 17:10:10 +00:00
|
|
|
(fp_text value 28C256 (at 17.78 1.27 180) (layer F.SilkS)
|
2017-05-14 19:08:06 +00:00
|
|
|
(effects (font (size 1 1) (thickness 0.15)))
|
|
|
|
)
|
2017-06-09 17:10:10 +00:00
|
|
|
(fp_text user %R (at 7.62 17.145 180) (layer F.Fab)
|
2017-05-14 19:08:06 +00:00
|
|
|
(effects (font (size 1 1) (thickness 0.15)))
|
|
|
|
)
|
|
|
|
(fp_line (start 1.255 -1.27) (end 14.985 -1.27) (layer F.Fab) (width 0.1))
|
|
|
|
(fp_line (start 14.985 -1.27) (end 14.985 34.29) (layer F.Fab) (width 0.1))
|
|
|
|
(fp_line (start 14.985 34.29) (end 0.255 34.29) (layer F.Fab) (width 0.1))
|
|
|
|
(fp_line (start 0.255 34.29) (end 0.255 -0.27) (layer F.Fab) (width 0.1))
|
|
|
|
(fp_line (start 0.255 -0.27) (end 1.255 -1.27) (layer F.Fab) (width 0.1))
|
|
|
|
(fp_line (start -1.27 -1.27) (end -1.27 34.29) (layer F.Fab) (width 0.1))
|
|
|
|
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2017-06-09 17:10:10 +00:00
|
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|
(module Housings_DIP:DIP-14_W7.62mm_Socket (layer F.Cu) (tedit 593ACF61) (tstamp 590E5F10)
|
2017-05-15 20:54:58 +00:00
|
|
|
(at 119.38 109.22 90)
|
2017-05-14 19:08:06 +00:00
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(descr "14-lead dip package, row spacing 7.62 mm (300 mils), Socket")
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|
(tags "DIL DIP PDIP 2.54mm 7.62mm 300mil Socket")
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(path /590F02B0)
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2017-06-09 17:10:10 +00:00
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2017-06-09 17:10:10 +00:00
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2017-06-09 17:10:10 +00:00
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2017-05-14 19:08:06 +00:00
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(at (xyz 0 0 0))
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(scale (xyz 1 1 1))
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)
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)
|
|
|
|
|
2017-06-09 17:10:10 +00:00
|
|
|
(module Housings_DIP:DIP-14_W7.62mm_Socket (layer F.Cu) (tedit 593AD3FA) (tstamp 590E5F22)
|
2017-05-14 19:08:06 +00:00
|
|
|
(at 119.38 124.46 90)
|
|
|
|
(descr "14-lead dip package, row spacing 7.62 mm (300 mils), Socket")
|
|
|
|
(tags "DIL DIP PDIP 2.54mm 7.62mm 300mil Socket")
|
|
|
|
(path /59101698)
|
2017-06-09 17:10:10 +00:00
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2017-05-14 19:08:06 +00:00
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2017-06-09 17:10:10 +00:00
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2017-05-14 19:08:06 +00:00
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2017-06-09 17:10:10 +00:00
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2017-05-14 19:08:06 +00:00
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2017-05-29 20:18:40 +00:00
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2017-06-09 17:10:10 +00:00
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2017-05-15 18:37:39 +00:00
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2017-06-09 17:10:10 +00:00
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(module Pin_Headers:Pin_Header_Straight_1x03_Pitch2.54mm (layer F.Cu) (tedit 593AD08F) (tstamp 592B27E2)
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2017-05-15 18:37:39 +00:00
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2017-06-09 17:28:45 +00:00
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(module Pin_Headers:Pin_Header_Straight_1x03_Pitch2.54mm (layer B.Cu) (tedit 58CD4EC1) (tstamp 593AD37F)
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2017-06-09 17:10:10 +00:00
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(segment (start 157.48 104.14) (end 163.83 97.79) (width 0.25) (layer F.Cu) (net 27))
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(segment (start 180.34 91.44) (end 180.34 92.71) (width 0.25) (layer B.Cu) (net 27))
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(segment (start 170.18 113.03) (end 170.18 111.76) (width 0.25) (layer F.Cu) (net 28))
|
2017-05-29 20:18:40 +00:00
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(segment (start 170.18 111.76) (end 173.99 107.95) (width 0.25) (layer F.Cu) (net 28) (tstamp 590E6D17))
|
2017-05-14 19:08:06 +00:00
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(segment (start 187.96 102.87) (end 189.23 101.6) (width 0.25) (layer F.Cu) (net 31) (tstamp 590E6D43))
|
2017-06-09 17:10:10 +00:00
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|
(segment (start 128.27 122.555) (end 127.635 122.555) (width 0.25) (layer B.Cu) (net 32))
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2017-05-29 20:18:40 +00:00
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2017-06-09 17:28:45 +00:00
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2017-06-09 17:10:10 +00:00
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2017-05-14 19:08:06 +00:00
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2017-06-09 17:10:10 +00:00
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2017-06-09 17:28:45 +00:00
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(segment (start 128.27 119.38) (end 129.54 120.65) (width 0.25) (layer F.Cu) (net 33) (tstamp 593AD486))
|
2017-05-15 20:54:58 +00:00
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2017-06-09 17:10:10 +00:00
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2017-05-15 20:54:58 +00:00
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(segment (start 130.81 99.06) (end 132.08 100.33) (width 0.25) (layer F.Cu) (net 35) (tstamp 590E6AA2))
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2017-05-29 20:18:40 +00:00
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2017-06-09 17:10:10 +00:00
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2017-05-29 20:18:40 +00:00
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2017-05-29 20:18:40 +00:00
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2017-06-09 17:10:10 +00:00
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2017-05-14 19:08:06 +00:00
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2017-05-14 19:08:06 +00:00
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