VDU amplifier schematic done

This commit is contained in:
Unknown 2019-01-12 23:14:17 +01:00
parent 7c961c43e7
commit 1b9981e258
4 changed files with 475 additions and 0 deletions

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EESchema-LIBRARY Version 2.3
#encoding utf-8
#
# 2N3904
#
DEF 2N3904 Q 0 0 Y N 1 F N
F0 "Q" 200 75 50 H V L CNN
F1 "2N3904" 200 0 50 H V L CNN
F2 "TO_SOT_Packages_THT:TO-92_Molded_Narrow" 200 -75 50 H I L CIN
F3 "" 0 0 50 H I L CNN
$FPLIST
TO?92*
$ENDFPLIST
DRAW
C 50 0 111 0 1 10 N
P 2 0 1 0 25 25 100 100 N
P 3 0 1 0 25 -25 100 -100 100 -100 N
P 3 0 1 20 25 75 25 -75 25 -75 N
P 5 0 1 0 50 -70 70 -50 90 -90 50 -70 50 -70 F
X E 1 100 -200 100 U 50 50 1 1 P
X B 2 -200 0 225 R 50 50 1 1 P
X C 3 100 200 100 D 50 50 1 1 P
ENDDRAW
ENDDEF
#
# GND
#
DEF GND #PWR 0 0 Y Y 1 F P
F0 "#PWR" 0 -250 50 H I C CNN
F1 "GND" 0 -150 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
DRAW
P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N
X GND 1 0 0 0 D 50 50 1 1 W N
ENDDRAW
ENDDEF
#
# Output
#
DEF Output J 0 40 Y N 1 F N
F0 "J" 0 200 50 H V C CNN
F1 "Output" 0 -300 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
Connector*:*_??x*mm*
Connector*:*1x??x*mm*
Pin?Header?Straight?1X*
Pin?Header?Angled?1X*
Socket?Strip?Straight?1X*
Socket?Strip?Angled?1X*
$ENDFPLIST
DRAW
T 0 100 100 60 0 0 0 AUD Normal 0 L C
T 0 100 -100 60 0 0 0 GND Normal 0 L C
T 0 100 0 60 0 0 0 GND Normal 0 L C
T 0 100 -200 60 0 0 0 VID Normal 0 L C
S -50 -195 0 -205 1 1 6 N
S -50 -95 0 -105 1 1 6 N
S -50 5 0 -5 1 1 6 N
S -50 105 0 95 1 1 6 N
S -50 150 50 -250 1 1 10 f
X Pin_4 1 -200 -200 150 R 50 50 1 1 P
X Pin_3 2 -200 -100 150 R 50 50 1 1 P
X Pin_2 3 -200 0 150 R 50 50 1 1 P
X Pin_1 4 -200 100 150 R 50 50 1 1 P
ENDDRAW
ENDDEF
#
# R
#
DEF R R 0 0 N Y 1 F N
F0 "R" 80 0 50 V V C CNN
F1 "R" 0 0 50 V V C CNN
F2 "" -70 0 50 V I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
R_*
R_*
$ENDFPLIST
DRAW
S -40 -100 40 100 0 1 10 N
X ~ 1 0 150 50 D 50 50 1 1 P
X ~ 2 0 -150 50 U 50 50 1 1 P
ENDDRAW
ENDDEF
#
# VCC
#
DEF VCC #PWR 0 0 Y Y 1 F P
F0 "#PWR" 0 -150 50 H I C CNN
F1 "VCC" 0 150 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
DRAW
C 0 75 25 0 1 0 N
P 2 0 1 0 0 0 0 50 N
X VCC 1 0 0 0 U 50 50 1 1 W N
ENDDRAW
ENDDEF
#
# Video
#
DEF Video J 0 40 Y N 1 F N
F0 "J" 0 200 50 H V C CNN
F1 "Video" 0 -300 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
Connector*:*_??x*mm*
Connector*:*1x??x*mm*
Pin?Header?Straight?1X*
Pin?Header?Angled?1X*
Socket?Strip?Straight?1X*
Socket?Strip?Angled?1X*
$ENDFPLIST
DRAW
T 0 100 0 60 0 0 0 AUD Normal 0 L C
T 0 100 100 60 0 0 0 GND Normal 0 L C
T 0 100 -200 60 0 0 0 VCC Normal 0 L C
T 0 100 -100 60 0 0 0 VID Normal 0 L C
S -50 -195 0 -205 1 1 6 N
S -50 -95 0 -105 1 1 6 N
S -50 5 0 -5 1 1 6 N
S -50 105 0 95 1 1 6 N
S -50 150 50 -250 1 1 10 f
X Pin_4 1 -200 -200 150 R 50 50 1 1 w
X Pin_3 2 -200 -100 150 R 50 50 1 1 P
X Pin_2 3 -200 0 150 R 50 50 1 1 P
X Pin_1 4 -200 100 150 R 50 50 1 1 w
ENDDRAW
ENDDEF
#
#End Library

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(kicad_pcb (version 4) (host kicad "dummy file") )

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update=07/01/2019 17:38:25
version=1
last_client=kicad
[pcbnew]
version=1
LastNetListRead=
UseCmpFile=1
PadDrill=0.600000000000
PadDrillOvalY=0.600000000000
PadSizeH=1.500000000000
PadSizeV=1.500000000000
PcbTextSizeV=1.500000000000
PcbTextSizeH=1.500000000000
PcbTextThickness=0.300000000000
ModuleTextSizeV=1.000000000000
ModuleTextSizeH=1.000000000000
ModuleTextSizeThickness=0.150000000000
SolderMaskClearance=0.000000000000
SolderMaskMinWidth=0.000000000000
DrawSegmentWidth=0.200000000000
BoardOutlineThickness=0.100000000000
ModuleOutlineThickness=0.150000000000
[cvpcb]
version=1
NetIExt=net
[eeschema]
version=1
LibDir=
[eeschema/libraries]
LibName1=power
LibName2=device
LibName3=switches
LibName4=relays
LibName5=motors
LibName6=transistors
LibName7=conn
LibName8=linear
LibName9=regul
LibName10=74xx
LibName11=cmos4000
LibName12=adc-dac
LibName13=memory
LibName14=xilinx
LibName15=microcontrollers
LibName16=dsp
LibName17=microchip
LibName18=analog_switches
LibName19=motorola
LibName20=texas
LibName21=intel
LibName22=audio
LibName23=interface
LibName24=digital-audio
LibName25=philips
LibName26=display
LibName27=cypress
LibName28=siliconi
LibName29=opto
LibName30=atmel
LibName31=contrib
LibName32=valves
[general]
version=1

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EESchema Schematic File Version 2
LIBS:power
LIBS:device
LIBS:switches
LIBS:relays
LIBS:motors
LIBS:transistors
LIBS:conn
LIBS:linear
LIBS:regul
LIBS:74xx
LIBS:cmos4000
LIBS:adc-dac
LIBS:memory
LIBS:xilinx
LIBS:microcontrollers
LIBS:dsp
LIBS:microchip
LIBS:analog_switches
LIBS:motorola
LIBS:texas
LIBS:intel
LIBS:audio
LIBS:interface
LIBS:digital-audio
LIBS:philips
LIBS:display
LIBS:cypress
LIBS:siliconi
LIBS:opto
LIBS:atmel
LIBS:contrib
LIBS:valves
LIBS:Composite Video Amplifier-cache
EELAYER 25 0
EELAYER END
$Descr A4 11693 8268
encoding utf-8
Sheet 1 1
Title ""
Date ""
Rev ""
Comp ""
Comment1 ""
Comment2 ""
Comment3 ""
Comment4 ""
$EndDescr
$Comp
L GND #PWR01
U 1 1 5C338136
P 4200 4325
F 0 "#PWR01" H 4200 4075 50 0001 C CNN
F 1 "GND" H 4200 4175 50 0000 C CNN
F 2 "" H 4200 4325 50 0001 C CNN
F 3 "" H 4200 4325 50 0001 C CNN
1 4200 4325
1 0 0 -1
$EndComp
$Comp
L VCC #PWR02
U 1 1 5C338137
P 4200 3875
F 0 "#PWR02" H 4200 3725 50 0001 C CNN
F 1 "VCC" H 4200 4025 50 0000 C CNN
F 2 "" H 4200 3875 50 0001 C CNN
F 3 "" H 4200 3875 50 0001 C CNN
1 4200 3875
1 0 0 -1
$EndComp
Text Label 4125 4050 0 60 ~ 0
VID_IN
$Comp
L GND #PWR03
U 1 1 5C33813D
P 5250 4775
F 0 "#PWR03" H 5250 4525 50 0001 C CNN
F 1 "GND" H 5250 4625 50 0000 C CNN
F 2 "" H 5250 4775 50 0001 C CNN
F 3 "" H 5250 4775 50 0001 C CNN
1 5250 4775
1 0 0 -1
$EndComp
$Comp
L VCC #PWR04
U 1 1 5C33813F
P 5250 3250
F 0 "#PWR04" H 5250 3100 50 0001 C CNN
F 1 "VCC" H 5250 3400 50 0000 C CNN
F 2 "" H 5250 3250 50 0001 C CNN
F 3 "" H 5250 3250 50 0001 C CNN
1 5250 3250
1 0 0 -1
$EndComp
$Comp
L R R2
U 1 1 5C338145
P 4650 5050
F 0 "R2" V 4730 5050 50 0000 C CNN
F 1 "10k" V 4650 5050 50 0000 C CNN
F 2 "Resistors_THT:R_Axial_DIN0207_L6.3mm_D2.5mm_P10.16mm_Horizontal" V 4580 5050 50 0001 C CNN
F 3 "" H 4650 5050 50 0001 C CNN
1 4650 5050
0 -1 -1 0
$EndComp
$Comp
L Output J2
U 1 1 5C338146
P 6975 4250
F 0 "J2" H 6975 4450 50 0000 C CNN
F 1 "Output" H 6975 3950 50 0000 C CNN
F 2 "Pin_Headers:Pin_Header_Straight_1x04_Pitch2.54mm" H 6975 4250 50 0001 C CNN
F 3 "" H 6975 4250 50 0001 C CNN
1 6975 4250
1 0 0 1
$EndComp
Text Label 6725 4050 2 60 ~ 0
VID_OUT
Text Label 4125 4150 0 60 ~ 0
AUD_IN
Text Label 6650 5050 2 60 ~ 0
AUD_OUT
$Comp
L Video J1
U 1 1 5C338147
P 3925 4150
F 0 "J1" H 3925 4350 50 0000 C CNN
F 1 "Video" H 3925 3850 50 0000 C CNN
F 2 "Pin_Headers:Pin_Header_Straight_1x04_Pitch2.54mm" H 3925 4150 50 0001 C CNN
F 3 "" H 3925 4150 50 0001 C CNN
1 3925 4150
-1 0 0 1
$EndComp
$Comp
L 2N3904 Q1
U 1 1 5C338695
P 5150 4050
F 0 "Q1" H 5350 4125 50 0000 L CNN
F 1 "2N2222" H 5350 4050 50 0000 L CNN
F 2 "TO_SOT_Packages_THT:TO-92_Inline_Wide" H 5350 3975 50 0001 L CIN
F 3 "" H 5150 4050 50 0001 L CNN
1 5150 4050
1 0 0 -1
$EndComp
$Comp
L R R1
U 1 1 5C33871C
P 4650 4050
F 0 "R1" V 4730 4050 50 0000 C CNN
F 1 "1k" V 4650 4050 50 0000 C CNN
F 2 "" V 4580 4050 50 0001 C CNN
F 3 "" H 4650 4050 50 0001 C CNN
1 4650 4050
0 1 1 0
$EndComp
$Comp
L R R5
U 1 1 5C338A5E
P 5250 4475
F 0 "R5" V 5330 4475 50 0000 C CNN
F 1 "180" V 5250 4475 50 0000 C CNN
F 2 "" V 5180 4475 50 0001 C CNN
F 3 "" H 5250 4475 50 0001 C CNN
1 5250 4475
-1 0 0 1
$EndComp
$Comp
L R R3
U 1 1 5C338C7C
P 5025 3775
F 0 "R3" V 5105 3775 50 0000 C CNN
F 1 "6k2" V 5025 3775 50 0000 C CNN
F 2 "" V 4955 3775 50 0001 C CNN
F 3 "" H 5025 3775 50 0001 C CNN
1 5025 3775
0 1 1 0
$EndComp
$Comp
L R R4
U 1 1 5C338F74
P 5250 3550
F 0 "R4" V 5330 3550 50 0000 C CNN
F 1 "1k" V 5250 3550 50 0000 C CNN
F 2 "" V 5180 3550 50 0001 C CNN
F 3 "" H 5250 3550 50 0001 C CNN
1 5250 3550
-1 0 0 1
$EndComp
$Comp
L 2N3904 Q2
U 1 1 5C339166
P 5850 3775
F 0 "Q2" H 6050 3850 50 0000 L CNN
F 1 "2N2222" H 6050 3775 50 0000 L CNN
F 2 "TO_SOT_Packages_THT:TO-92_Inline_Wide" H 6050 3700 50 0001 L CIN
F 3 "" H 5850 3775 50 0001 L CNN
1 5850 3775
1 0 0 -1
$EndComp
$Comp
L R R6
U 1 1 5C3392AC
P 5950 4275
F 0 "R6" V 6030 4275 50 0000 C CNN
F 1 "1k" V 5950 4275 50 0000 C CNN
F 2 "" V 5880 4275 50 0001 C CNN
F 3 "" H 5950 4275 50 0001 C CNN
1 5950 4275
-1 0 0 1
$EndComp
Wire Wire Line
4125 3950 4200 3950
Wire Wire Line
4200 3950 4200 3875
Wire Wire Line
4200 4250 4125 4250
Wire Wire Line
4200 4250 4200 4325
Wire Wire Line
6625 4150 6775 4150
Wire Wire Line
4125 4150 4375 4150
Wire Wire Line
4375 4150 4375 5050
Wire Wire Line
6625 4700 6625 4150
Wire Wire Line
6775 4250 6625 4250
Connection ~ 6625 4250
Wire Wire Line
6775 4350 6700 4350
Wire Wire Line
6700 4350 6700 5050
Wire Wire Line
4500 4050 4125 4050
Wire Wire Line
4800 4050 4950 4050
Wire Wire Line
5250 4625 5250 4775
Wire Wire Line
4875 4050 4875 3775
Connection ~ 4875 4050
Wire Wire Line
5175 3775 5650 3775
Wire Wire Line
5250 3700 5250 3850
Connection ~ 5250 3775
Wire Wire Line
5250 3250 5250 3400
Wire Wire Line
5950 3975 5950 4125
Wire Wire Line
5250 4700 6625 4700
Wire Wire Line
5950 4700 5950 4425
Connection ~ 5250 4700
Connection ~ 5950 4050
Wire Wire Line
5950 3325 5950 3575
Connection ~ 5250 3325
Wire Wire Line
5950 4050 6775 4050
Connection ~ 5950 4700
Wire Wire Line
4375 5050 4500 5050
Wire Wire Line
5250 4250 5250 4325
Wire Wire Line
5250 3325 5950 3325
Wire Wire Line
6700 5050 4800 5050
Text Notes 7025 6850 0 60 ~ 0
This is the analog video amplification circuit used with the VDU card, this variant is\nbased on the original schematic found in the book "22 Micro-computer projects: To\nbuild, use and learn" by Daniel Metzger. An excellent book if you can find a copy!
Text Notes 7350 7500 0 60 ~ 0
Video amplifier for the RC6502 VDU
$EndSCHEMATC