Apple-1-HW
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RC6502-Apple-1-Replica
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Fixed footprint error

This commit is contained in:
Unknown 2018-12-04 21:36:13 +01:00
parent 77ffaff523
commit 294df9eda7
7 changed files with 1256 additions and 8 deletions
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110
RC6502 VDU/RC6502 VDU.kicad_pcb
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@ -1 +1,109 @@
(kicad_pcb (version 4) (host kicad "dummy file") )
(kicad_pcb (version 4) (host pcbnew 4.0.7)
(general
(links 0)
(no_connects 0)
(area 52.629999 44.374999 152.475001 144.220001)
(thickness 1.6)
(drawings 4)
(tracks 0)
(zones 0)
(modules 0)
(nets 1)
)
(page A4)
(layers
(0 F.Cu signal)
(31 B.Cu signal)
(32 B.Adhes user)
(33 F.Adhes user)
(34 B.Paste user)
(35 F.Paste user)
(36 B.SilkS user)
(37 F.SilkS user)
(38 B.Mask user)
(39 F.Mask user)
(40 Dwgs.User user)
(41 Cmts.User user)
(42 Eco1.User user)
(43 Eco2.User user)
(44 Edge.Cuts user)
(45 Margin user)
(46 B.CrtYd user)
(47 F.CrtYd user)
(48 B.Fab user)
(49 F.Fab user)
)
(setup
(last_trace_width 0.25)
(trace_clearance 0.2)
(zone_clearance 0.508)
(zone_45_only no)
(trace_min 0.2)
(segment_width 0.2)
(edge_width 0.15)
(via_size 0.6)
(via_drill 0.4)
(via_min_size 0.4)
(via_min_drill 0.3)
(uvia_size 0.3)
(uvia_drill 0.1)
(uvias_allowed no)
(uvia_min_size 0.2)
(uvia_min_drill 0.1)
(pcb_text_width 0.3)
(pcb_text_size 1.5 1.5)
(mod_edge_width 0.15)
(mod_text_size 1 1)
(mod_text_width 0.15)
(pad_size 1.524 1.524)
(pad_drill 0.762)
(pad_to_mask_clearance 0.2)
(aux_axis_origin 0 0)
(visible_elements 7FFFFFFF)
(pcbplotparams
(layerselection 0x00030_80000001)
(usegerberextensions false)
(excludeedgelayer true)
(linewidth 0.100000)
(plotframeref false)
(viasonmask false)
(mode 1)
(useauxorigin false)
(hpglpennumber 1)
(hpglpenspeed 20)
(hpglpendiameter 15)
(hpglpenoverlay 2)
(psnegative false)
(psa4output false)
(plotreference true)
(plotvalue true)
(plotinvisibletext false)
(padsonsilk false)
(subtractmaskfromsilk false)
(outputformat 1)
(mirror false)
(drillshape 1)
(scaleselection 1)
(outputdirectory ""))
)
(net 0 "")
(net_class Default "This is the default net class."
(clearance 0.2)
(trace_width 0.25)
(via_dia 0.6)
(via_drill 0.4)
(uvia_dia 0.3)
(uvia_drill 0.1)
)
(gr_line (start 151.765 144.145) (end 52.705 144.145) (angle 90) (layer Edge.Cuts) (width 0.15))
(gr_line (start 151.765 44.45) (end 52.705 44.45) (angle 90) (layer Edge.Cuts) (width 0.15))
(gr_line (start 151.765 144.145) (end 151.765 44.45) (angle 90) (layer Edge.Cuts) (width 0.15))
(gr_line (start 52.705 44.45) (end 52.705 144.145) (angle 90) (layer Edge.Cuts) (width 0.15))
)

1111
RC6502 VDU/RC6502 VDU.net Normal file
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File diff suppressed because it is too large Load Diff

6
RC6502 VDU/RC6502 VDU.pro
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@ -1,4 +1,4 @@
update=04/12/2018 20:31:54
update=04/12/2018 21:30:28
version=1
last_client=kicad
[pcbnew]
@ -23,8 +23,6 @@ ModuleOutlineThickness=0.150000000000
[cvpcb]
version=1
NetIExt=net
[general]
version=1
[eeschema]
version=1
LibDir=
@ -66,3 +64,5 @@ LibName34=D:/ownCloud/Documents/Projects/RC6502/Templates/mounting
LibName35=D:/ownCloud/Documents/Projects/RC6502/Templates/oscillator
LibName36=D:/ownCloud/Documents/Projects/RC6502/Templates/mc6847
LibName37=D:/ownCloud/Documents/Projects/RC6502/Templates/rca_plug
[general]
version=1

8
RC6502 VDU/RC6502 VDU.sch
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@ -334,7 +334,7 @@ U 1 1 5C045951
P 10250 1975
F 0 "J4" V 10350 1975 50 0000 C CNN
F 1 "Hole" V 10350 1975 50 0001 C CNN
F 2 "rc6502:Mounting" H 10250 1975 50 0001 C CNN
F 2 "mounting:Mounting" H 10250 1975 50 0001 C CNN
F 3 "" H 10250 1975 50 0001 C CNN
1 10250 1975
0 1 1 0
@ -345,7 +345,7 @@ U 1 1 5C045952
P 10500 1975
F 0 "J6" V 10600 1975 50 0000 C CNN
F 1 "Hole" V 10600 1975 50 0001 C CNN
F 2 "rc6502:Mounting" H 10500 1975 50 0001 C CNN
F 2 "mounting:Mounting" H 10500 1975 50 0001 C CNN
F 3 "" H 10500 1975 50 0001 C CNN
1 10500 1975
0 1 1 0
@ -356,7 +356,7 @@ U 1 1 5C045953
P 10375 1975
F 0 "J5" V 10475 1975 50 0000 C CNN
F 1 "Hole" V 10475 1975 50 0001 C CNN
F 2 "rc6502:Mounting" H 10375 1975 50 0001 C CNN
F 2 "mounting:Mounting" H 10375 1975 50 0001 C CNN
F 3 "" H 10375 1975 50 0001 C CNN
1 10375 1975
0 1 1 0
@ -367,7 +367,7 @@ U 1 1 5C045954
P 10625 1975
F 0 "J7" V 10725 1975 50 0000 C CNN
F 1 "Hole" V 10725 1975 50 0001 C CNN
F 2 "rc6502:Mounting" H 10625 1975 50 0001 C CNN
F 2 "mounting:Mounting" H 10625 1975 50 0001 C CNN
F 3 "" H 10625 1975 50 0001 C CNN
1 10625 1975
0 1 1 0

1
RC6502 VDU/fp-lib-table
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@ -1,3 +1,4 @@
(fp_lib_table
(lib (name rca)(type KiCad)(uri D:/ownCloud/Documents/Projects/RC6502/Templates/rca.pretty)(options "")(descr ""))
(lib (name mounting)(type KiCad)(uri D:/ownCloud/Documents/Projects/RC6502/Templates/mounting.pretty)(options "")(descr ""))
)

14
Templates/mounting.pretty/1pin.kicad_mod Normal file
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@ -0,0 +1,14 @@
(module Connectors:1pin (layer F.Cu) (tedit 59414318)
(descr "module 1 pin (ou trou mecanique de percage)")
(tags DEV)
(fp_text reference REF** (at 0 -3.048) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value 1pin (at 0 3) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_circle (center 0 0) (end 2 0.8) (layer F.Fab) (width 0.1))
(fp_circle (center 0 0) (end 2.6 0) (layer F.CrtYd) (width 0.05))
(fp_circle (center 0 0) (end 0 -2.286) (layer F.SilkS) (width 0.12))
(pad 1 thru_hole circle (at 0 0) (size 5 5) (drill 3.048) (layers *.Cu *.Mask))
)

14
Templates/mounting.pretty/Mounting.kicad_mod Normal file
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@ -0,0 +1,14 @@
(module Mounting (layer F.Cu) (tedit 594143BA)
(descr "module 1 pin (ou trou mecanique de percage)")
(tags DEV)
(fp_text reference Hole** (at 0 -3.81) (layer F.SilkS) hide
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value 1pin (at 0 3.81) (layer F.Fab) hide
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_circle (center 0 0) (end 2 0.8) (layer F.Fab) (width 0.1))
(fp_circle (center 0 0) (end 2.6 0) (layer F.CrtYd) (width 0.05))
(fp_circle (center 0 0) (end 0 -2.286) (layer F.SilkS) (width 0.12))
(pad 1 thru_hole circle (at 0 0) (size 5 5) (drill 3.2) (layers *.Cu *.Mask))
)