diff --git a/RC6502 Reset Circuit/Reset circuit-cache.lib b/RC6502 Reset Circuit/Reset circuit-cache.lib
index 9a61947..b82f1f0 100644
--- a/RC6502 Reset Circuit/Reset circuit-cache.lib	
+++ b/RC6502 Reset Circuit/Reset circuit-cache.lib	
@@ -39,6 +39,33 @@ X ~ 13 -450 0 300 R 50 50 6 2 I I
 ENDDRAW
 ENDDEF
 #
+# 74LS74
+#
+DEF 74LS74 U 0 40 Y Y 2 F N
+F0 "U" 150 300 50 H V C CNN
+F1 "74LS74" 300 -295 50 H V C CNN
+F2 "" 0 0 50 H I C CNN
+F3 "" 0 0 50 H I C CNN
+ALIAS 74HC74
+DRAW
+X GND 7 -200 -250 0 U 30 30 0 0 W N
+X VCC 14 -200 250 0 D 30 30 0 0 W N
+S -300 250 300 -250 0 1 0 N
+X Cd 1 0 -550 300 U 50 50 1 1 I I
+X D 2 -600 200 300 R 50 50 1 1 I
+X Cp 3 -600 0 300 R 50 50 1 1 I C
+X Sd 4 0 550 300 D 50 50 1 1 I I
+X Q 5 600 200 300 L 50 50 1 1 O
+X ~Q 6 600 -200 300 L 50 50 1 1 O I
+X ~Q 8 600 -200 300 L 50 50 2 1 O I
+X Q 9 600 200 300 L 50 50 2 1 O
+X Sd 10 0 550 300 D 50 50 2 1 I I
+X Cp 11 -600 0 300 R 50 50 2 1 I C
+X D 12 -600 200 300 R 50 50 2 1 I
+X Cd 13 0 -550 300 U 50 50 2 1 I I
+ENDDRAW
+ENDDEF
+#
 # C
 #
 DEF C C 0 10 N Y 1 F N
@@ -57,28 +84,6 @@ X ~ 2 0 -150 110 U 50 50 1 1 P
 ENDDRAW
 ENDDEF
 #
-# CONN_01X02
-#
-DEF CONN_01X02 J 0 40 Y N 1 F N
-F0 "J" 0 150 50 H V C CNN
-F1 "CONN_01X02" 100 0 50 V V C CNN
-F2 "" 0 0 50 H I C CNN
-F3 "" 0 0 50 H I C CNN
-$FPLIST
- Pin_Header_Straight_1X*
- Pin_Header_Angled_1X*
- Socket_Strip_Straight_1X*
- Socket_Strip_Angled_1X*
-$ENDFPLIST
-DRAW
-S -50 -45 10 -55 0 1 0 N
-S -50 55 10 45 0 1 0 N
-S -50 100 50 -100 0 1 0 N
-X P1 1 -200 50 150 R 50 50 1 1 P
-X P2 2 -200 -50 150 R 50 50 1 1 P
-ENDDRAW
-ENDDEF
-#
 # CONN_01X39
 #
 DEF CONN_01X39 J 0 40 Y N 1 F N
@@ -175,6 +180,41 @@ X P39 39 -200 -1900 150 R 50 50 1 1 P
 ENDDRAW
 ENDDEF
 #
+# CONN_02X04
+#
+DEF CONN_02X04 J 0 1 Y N 1 F N
+F0 "J" 0 250 50 H V C CNN
+F1 "CONN_02X04" 0 -250 50 H V C CNN
+F2 "" 0 -1200 50 H I C CNN
+F3 "" 0 -1200 50 H I C CNN
+$FPLIST
+ Pin_Header_Straight_2X*
+ Pin_Header_Angled_2X*
+ Socket_Strip_Straight_2X*
+ Socket_Strip_Angled_2X*
+ IDC_Header_Straight_*
+$ENDFPLIST
+DRAW
+S -100 -145 -50 -155 0 1 0 N
+S -100 -45 -50 -55 0 1 0 N
+S -100 55 -50 45 0 1 0 N
+S -100 155 -50 145 0 1 0 N
+S -100 200 100 -200 0 1 0 N
+S 50 -145 100 -155 0 1 0 N
+S 50 -45 100 -55 0 1 0 N
+S 50 55 100 45 0 1 0 N
+S 50 155 100 145 0 1 0 N
+X P1 1 -250 150 150 R 50 50 1 1 P
+X P2 2 250 150 150 L 50 50 1 1 P
+X P3 3 -250 50 150 R 50 50 1 1 P
+X P4 4 250 50 150 L 50 50 1 1 P
+X P5 5 -250 -50 150 R 50 50 1 1 P
+X P6 6 250 -50 150 L 50 50 1 1 P
+X P7 7 -250 -150 150 R 50 50 1 1 P
+X P8 8 250 -150 150 L 50 50 1 1 P
+ENDDRAW
+ENDDEF
+#
 # CP
 #
 DEF CP C 0 10 N Y 1 F N
@@ -219,6 +259,27 @@ X Vcc 14 0 300 100 D 50 50 1 1 W
 ENDDRAW
 ENDDEF
 #
+# LED
+#
+DEF LED D 0 40 Y N 1 F N
+F0 "D" 0 100 50 H V C CNN
+F1 "LED" 0 -100 50 H V C CNN
+F2 "" 0 0 50 H I C CNN
+F3 "" 0 0 50 H I C CNN
+$FPLIST
+ LED*
+$ENDFPLIST
+DRAW
+P 2 0 1 8 -50 -50 -50 50 N
+P 2 0 1 0 -50 0 50 0 N
+P 4 0 1 8 50 -50 50 50 -50 0 50 -50 N
+P 5 0 1 0 -120 -30 -180 -90 -150 -90 -180 -90 -180 -60 N
+P 5 0 1 0 -70 -30 -130 -90 -100 -90 -130 -90 -130 -60 N
+X K 1 -150 0 100 R 50 50 1 1 P
+X A 2 150 0 100 L 50 50 1 1 P
+ENDDRAW
+ENDDEF
+#
 # LM555N
 #
 DEF LM555N U 0 40 Y Y 1 F N
diff --git a/RC6502 Reset Circuit/Reset circuit.kicad_pcb b/RC6502 Reset Circuit/Reset circuit.kicad_pcb
index 9d15af1..7200f41 100644
--- a/RC6502 Reset Circuit/Reset circuit.kicad_pcb	
+++ b/RC6502 Reset Circuit/Reset circuit.kicad_pcb	
@@ -1,15 +1,15 @@
 (kicad_pcb (version 4) (host pcbnew 4.0.6)
 
   (general
-    (links 30)
+    (links 55)
     (no_connects 0)
-    (area 90.735 104.44857 193.845 156.675001)
+    (area 92.634999 111.684999 191.845001 147.395001)
     (thickness 1.6)
-    (drawings 23)
-    (tracks 114)
+    (drawings 35)
+    (tracks 160)
     (zones 0)
-    (modules 13)
-    (nets 9)
+    (modules 17)
+    (nets 15)
   )
 
   (page A4)
@@ -98,7 +98,13 @@
   (net 5 RESET)
   (net 6 "Net-(U1-Pad3)")
   (net 7 CLOCK)
-  (net 8 "Net-(J2-Pad2)")
+  (net 8 CLOCK/1)
+  (net 9 CLOCK/2)
+  (net 10 CLOCK/4)
+  (net 11 "Net-(U3-Pad12)")
+  (net 12 "Net-(U3-Pad11)")
+  (net 13 "Net-(J2-Pad1)")
+  (net 14 "Net-(D1-Pad2)")
 
   (net_class Default "This is the default net class."
     (clearance 0.2)
@@ -108,24 +114,30 @@
     (uvia_dia 0.3)
     (uvia_drill 0.1)
     (add_net CLOCK)
+    (add_net CLOCK/1)
+    (add_net CLOCK/2)
+    (add_net CLOCK/4)
     (add_net GND)
     (add_net "Net-(C1-Pad1)")
     (add_net "Net-(C2-Pad1)")
-    (add_net "Net-(J2-Pad2)")
+    (add_net "Net-(D1-Pad2)")
+    (add_net "Net-(J2-Pad1)")
     (add_net "Net-(U1-Pad3)")
+    (add_net "Net-(U3-Pad11)")
+    (add_net "Net-(U3-Pad12)")
     (add_net RESET)
     (add_net VCC)
   )
 
-  (module Resistors_THT:R_Axial_DIN0207_L6.3mm_D2.5mm_P10.16mm_Horizontal (layer F.Cu) (tedit 591A0D1E) (tstamp 5909EF28)
-    (at 147.32 127)
+  (module Resistors_THT:R_Axial_DIN0207_L6.3mm_D2.5mm_P10.16mm_Horizontal (layer F.Cu) (tedit 593C2F6D) (tstamp 5909EF28)
+    (at 187.325 133.985 180)
     (descr "Resistor, Axial_DIN0207 series, Axial, Horizontal, pin pitch=10.16mm, 0.25W = 1/4W, length*diameter=6.3*2.5mm^2, http://cdn-reichelt.de/documents/datenblatt/B400/1_4W%23YAG.pdf")
     (tags "Resistor Axial_DIN0207 series Axial Horizontal pin pitch 10.16mm 0.25W = 1/4W length 6.3mm diameter 2.5mm")
     (path /5909CC66)
-    (fp_text reference R1 (at 5.08 -2.31) (layer F.SilkS)
+    (fp_text reference R1 (at 5.08 0 180) (layer F.SilkS)
       (effects (font (size 1 1) (thickness 0.15)))
     )
-    (fp_text value 1M (at 5.08 0) (layer F.Fab)
+    (fp_text value 1M (at -6.985 0 180) (layer F.Fab)
       (effects (font (size 1 1) (thickness 0.15)))
     )
     (fp_line (start 1.93 -1.25) (end 1.93 1.25) (layer F.Fab) (width 0.1))
@@ -144,9 +156,9 @@
     (fp_line (start -1.05 1.6) (end 11.25 1.6) (layer F.CrtYd) (width 0.05))
     (fp_line (start 11.25 1.6) (end 11.25 -1.6) (layer F.CrtYd) (width 0.05))
     (fp_line (start 11.25 -1.6) (end -1.05 -1.6) (layer F.CrtYd) (width 0.05))
-    (pad 1 thru_hole circle (at 0 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
+    (pad 1 thru_hole circle (at 0 0 180) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
       (net 4 VCC))
-    (pad 2 thru_hole oval (at 10.16 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
+    (pad 2 thru_hole oval (at 10.16 0 180) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
       (net 1 "Net-(C1-Pad1)"))
     (model Resistors_THT.3dshapes/R_Axial_DIN0207_L6.3mm_D2.5mm_P10.16mm_Horizontal.wrl
       (at (xyz 0 0 0))
@@ -155,15 +167,15 @@
     )
   )
 
-  (module Resistors_THT:R_Axial_DIN0207_L6.3mm_D2.5mm_P10.16mm_Horizontal (layer F.Cu) (tedit 591A0D1C) (tstamp 5909EF2E)
-    (at 147.32 119.38)
+  (module Resistors_THT:R_Axial_DIN0207_L6.3mm_D2.5mm_P10.16mm_Horizontal (layer F.Cu) (tedit 593C2F70) (tstamp 5909EF2E)
+    (at 187.325 128.905 180)
     (descr "Resistor, Axial_DIN0207 series, Axial, Horizontal, pin pitch=10.16mm, 0.25W = 1/4W, length*diameter=6.3*2.5mm^2, http://cdn-reichelt.de/documents/datenblatt/B400/1_4W%23YAG.pdf")
     (tags "Resistor Axial_DIN0207 series Axial Horizontal pin pitch 10.16mm 0.25W = 1/4W length 6.3mm diameter 2.5mm")
     (path /5909D4EB)
-    (fp_text reference R2 (at 5.08 -2.31) (layer F.SilkS)
+    (fp_text reference R2 (at 5.08 0 180) (layer F.SilkS)
       (effects (font (size 1 1) (thickness 0.15)))
     )
-    (fp_text value 47k (at 5.08 0) (layer F.Fab)
+    (fp_text value 47k (at -6.985 0 180) (layer F.Fab)
       (effects (font (size 1 1) (thickness 0.15)))
     )
     (fp_line (start 1.93 -1.25) (end 1.93 1.25) (layer F.Fab) (width 0.1))
@@ -182,9 +194,9 @@
     (fp_line (start -1.05 1.6) (end 11.25 1.6) (layer F.CrtYd) (width 0.05))
     (fp_line (start 11.25 1.6) (end 11.25 -1.6) (layer F.CrtYd) (width 0.05))
     (fp_line (start 11.25 -1.6) (end -1.05 -1.6) (layer F.CrtYd) (width 0.05))
-    (pad 1 thru_hole circle (at 0 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
+    (pad 1 thru_hole circle (at 0 0 180) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
       (net 4 VCC))
-    (pad 2 thru_hole oval (at 10.16 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
+    (pad 2 thru_hole oval (at 10.16 0 180) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
       (net 3 "Net-(C2-Pad1)"))
     (model Resistors_THT.3dshapes/R_Axial_DIN0207_L6.3mm_D2.5mm_P10.16mm_Horizontal.wrl
       (at (xyz 0 0 0))
@@ -193,15 +205,15 @@
     )
   )
 
-  (module Buttons_Switches_THT:SW_PUSH_6mm (layer F.Cu) (tedit 58134C96) (tstamp 5909EF36)
-    (at 180.34 118.11)
+  (module Buttons_Switches_THT:SW_PUSH_6mm (layer F.Cu) (tedit 593C30AE) (tstamp 5909EF36)
+    (at 183.515 113.665)
     (descr https://www.omron.com/ecb/products/pdf/en-b3f.pdf)
     (tags "tact sw push 6mm")
     (path /5909ECDD)
-    (fp_text reference SW1 (at 3.25 -2) (layer F.SilkS)
+    (fp_text reference SW1 (at 3.175 -2.54) (layer F.Fab)
       (effects (font (size 1 1) (thickness 0.15)))
     )
-    (fp_text value RESET (at 3.75 6.7) (layer F.Fab)
+    (fp_text value RESET (at 3.75 6.7) (layer F.SilkS)
       (effects (font (size 1 1) (thickness 0.15)))
     )
     (fp_line (start 3.25 -0.75) (end 6.25 -0.75) (layer F.Fab) (width 0.1))
@@ -241,18 +253,18 @@
     )
   )
 
-  (module Housings_DIP:DIP-8_W7.62mm (layer F.Cu) (tedit 591A0D15) (tstamp 5909EF42)
-    (at 130.81 119.38)
+  (module Housings_DIP:DIP-8_W7.62mm (layer F.Cu) (tedit 593C2368) (tstamp 5909EF42)
+    (at 159.385 114.3)
     (descr "8-lead dip package, row spacing 7.62 mm (300 mils)")
     (tags "DIL DIP PDIP 2.54mm 7.62mm 300mil")
     (path /590A44E3)
-    (fp_text reference U1 (at -1.905 7.62 90) (layer F.SilkS)
+    (fp_text reference U1 (at 3.81 3.81 180) (layer F.SilkS)
       (effects (font (size 1 1) (thickness 0.15)))
     )
-    (fp_text value NE555 (at -1.905 3.81 90) (layer F.SilkS)
+    (fp_text value NE555 (at -1.905 6.985 90) (layer F.SilkS)
       (effects (font (size 1 1) (thickness 0.15)))
     )
-    (fp_text user %R (at -1.905 7.62 90) (layer F.Fab)
+    (fp_text user %R (at 3.81 3.81 180) (layer F.Fab)
       (effects (font (size 1 1) (thickness 0.15)))
     )
     (fp_line (start 1.635 -1.27) (end 6.985 -1.27) (layer F.Fab) (width 0.1))
@@ -292,18 +304,18 @@
     )
   )
 
-  (module Housings_DIP:DIP-14_W7.62mm (layer F.Cu) (tedit 591A0CFE) (tstamp 5909EF54)
-    (at 114.3 119.38)
+  (module Housings_DIP:DIP-14_W7.62mm (layer F.Cu) (tedit 593C23C5) (tstamp 5909EF54)
+    (at 140.97 114.3)
     (descr "14-lead dip package, row spacing 7.62 mm (300 mils)")
     (tags "DIL DIP PDIP 2.54mm 7.62mm 300mil")
     (path /5909E441)
-    (fp_text reference U2 (at -1.905 15.24 270) (layer F.SilkS)
+    (fp_text reference U2 (at 3.81 7.62) (layer F.SilkS)
       (effects (font (size 1 1) (thickness 0.15)))
     )
-    (fp_text value 74LS04 (at -1.905 10.795 90) (layer F.SilkS)
+    (fp_text value 74HCT04 (at -1.905 13.335 90) (layer F.SilkS)
       (effects (font (size 1 1) (thickness 0.15)))
     )
-    (fp_text user %R (at -1.905 15.24 90) (layer F.Fab)
+    (fp_text user %R (at 3.81 7.62 180) (layer F.Fab)
       (effects (font (size 1 1) (thickness 0.15)))
     )
     (fp_line (start 1.635 -1.27) (end 6.985 -1.27) (layer F.Fab) (width 0.1))
@@ -326,15 +338,20 @@
     (pad 8 thru_hole oval (at 7.62 15.24) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask))
     (pad 2 thru_hole oval (at 0 2.54) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
       (net 5 RESET))
-    (pad 9 thru_hole oval (at 7.62 12.7) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask))
-    (pad 3 thru_hole oval (at 0 5.08) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask))
+    (pad 9 thru_hole oval (at 7.62 12.7) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
+      (net 2 GND))
+    (pad 3 thru_hole oval (at 0 5.08) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
+      (net 2 GND))
     (pad 10 thru_hole oval (at 7.62 10.16) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask))
     (pad 4 thru_hole oval (at 0 7.62) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask))
-    (pad 11 thru_hole oval (at 7.62 7.62) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask))
-    (pad 5 thru_hole oval (at 0 10.16) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask))
+    (pad 11 thru_hole oval (at 7.62 7.62) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
+      (net 2 GND))
+    (pad 5 thru_hole oval (at 0 10.16) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
+      (net 2 GND))
     (pad 12 thru_hole oval (at 7.62 5.08) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask))
     (pad 6 thru_hole oval (at 0 12.7) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask))
-    (pad 13 thru_hole oval (at 7.62 2.54) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask))
+    (pad 13 thru_hole oval (at 7.62 2.54) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
+      (net 2 GND))
     (pad 7 thru_hole oval (at 0 15.24) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
       (net 2 GND))
     (pad 14 thru_hole oval (at 7.62 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
@@ -346,40 +363,8 @@
     )
   )
 
-  (module Capacitors_THT:C_Disc_D3.0mm_W1.6mm_P2.50mm (layer F.Cu) (tedit 591A0ED9) (tstamp 5909F282)
-    (at 138.43 132.08 270)
-    (descr "C, Disc series, Radial, pin pitch=2.50mm, , diameter*width=3.0*1.6mm^2, Capacitor, http://www.vishay.com/docs/45233/krseries.pdf")
-    (tags "C Disc series Radial pin pitch 2.50mm  diameter 3.0mm width 1.6mm Capacitor")
-    (path /5909CD8B)
-    (fp_text reference C1 (at 1.27 1.905 270) (layer F.SilkS)
-      (effects (font (size 1 1) (thickness 0.15)))
-    )
-    (fp_text value 100nF (at 1.27 -1.905 270) (layer F.Fab)
-      (effects (font (size 1 1) (thickness 0.15)))
-    )
-    (fp_line (start -0.25 -0.8) (end -0.25 0.8) (layer F.Fab) (width 0.1))
-    (fp_line (start -0.25 0.8) (end 2.75 0.8) (layer F.Fab) (width 0.1))
-    (fp_line (start 2.75 0.8) (end 2.75 -0.8) (layer F.Fab) (width 0.1))
-    (fp_line (start 2.75 -0.8) (end -0.25 -0.8) (layer F.Fab) (width 0.1))
-    (fp_line (start 0.663 -0.861) (end 1.837 -0.861) (layer F.SilkS) (width 0.12))
-    (fp_line (start 0.663 0.861) (end 1.837 0.861) (layer F.SilkS) (width 0.12))
-    (fp_line (start -1.05 -1.15) (end -1.05 1.15) (layer F.CrtYd) (width 0.05))
-    (fp_line (start -1.05 1.15) (end 3.55 1.15) (layer F.CrtYd) (width 0.05))
-    (fp_line (start 3.55 1.15) (end 3.55 -1.15) (layer F.CrtYd) (width 0.05))
-    (fp_line (start 3.55 -1.15) (end -1.05 -1.15) (layer F.CrtYd) (width 0.05))
-    (pad 1 thru_hole circle (at 0 0 270) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
-      (net 1 "Net-(C1-Pad1)"))
-    (pad 2 thru_hole circle (at 2.5 0 270) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
-      (net 2 GND))
-    (model Capacitors_THT.3dshapes/C_Disc_D3.0mm_W1.6mm_P2.50mm.wrl
-      (at (xyz 0 0 0))
-      (scale (xyz 0.393701 0.393701 0.393701))
-      (rotate (xyz 0 0 0))
-    )
-  )
-
   (module Capacitors_THT:CP_Radial_D4.0mm_P2.00mm (layer F.Cu) (tedit 591A0EE4) (tstamp 5909F287)
-    (at 165.1 133.35 270)
+    (at 163.195 136.525 270)
     (descr "CP, Radial series, Radial, pin pitch=2.00mm, , diameter=4mm, Electrolytic Capacitor")
     (tags "CP Radial series Radial pin pitch 2.00mm  diameter 4mm Electrolytic Capacitor")
     (path /5909D5AC)
@@ -504,47 +489,15 @@
     )
   )
 
-  (module Capacitors_THT:C_Disc_D3.0mm_W1.6mm_P2.50mm (layer F.Cu) (tedit 591A0ED6) (tstamp 5909F28C)
-    (at 130.81 132.08 270)
-    (descr "C, Disc series, Radial, pin pitch=2.50mm, , diameter*width=3.0*1.6mm^2, Capacitor, http://www.vishay.com/docs/45233/krseries.pdf")
-    (tags "C Disc series Radial pin pitch 2.50mm  diameter 3.0mm width 1.6mm Capacitor")
-    (path /5909D33C)
-    (fp_text reference C3 (at 1.27 1.905 270) (layer F.SilkS)
-      (effects (font (size 1 1) (thickness 0.15)))
-    )
-    (fp_text value 100nF (at 1.27 -1.905 270) (layer F.Fab)
-      (effects (font (size 1 1) (thickness 0.15)))
-    )
-    (fp_line (start -0.25 -0.8) (end -0.25 0.8) (layer F.Fab) (width 0.1))
-    (fp_line (start -0.25 0.8) (end 2.75 0.8) (layer F.Fab) (width 0.1))
-    (fp_line (start 2.75 0.8) (end 2.75 -0.8) (layer F.Fab) (width 0.1))
-    (fp_line (start 2.75 -0.8) (end -0.25 -0.8) (layer F.Fab) (width 0.1))
-    (fp_line (start 0.663 -0.861) (end 1.837 -0.861) (layer F.SilkS) (width 0.12))
-    (fp_line (start 0.663 0.861) (end 1.837 0.861) (layer F.SilkS) (width 0.12))
-    (fp_line (start -1.05 -1.15) (end -1.05 1.15) (layer F.CrtYd) (width 0.05))
-    (fp_line (start -1.05 1.15) (end 3.55 1.15) (layer F.CrtYd) (width 0.05))
-    (fp_line (start 3.55 1.15) (end 3.55 -1.15) (layer F.CrtYd) (width 0.05))
-    (fp_line (start 3.55 -1.15) (end -1.05 -1.15) (layer F.CrtYd) (width 0.05))
-    (pad 1 thru_hole circle (at 0 0 270) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
-      (net 4 VCC))
-    (pad 2 thru_hole circle (at 2.5 0 270) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
-      (net 2 GND))
-    (model Capacitors_THT.3dshapes/C_Disc_D3.0mm_W1.6mm_P2.50mm.wrl
-      (at (xyz 0 0 0))
-      (scale (xyz 0.393701 0.393701 0.393701))
-      (rotate (xyz 0 0 0))
-    )
-  )
-
-  (module Resistors_THT:R_Axial_DIN0207_L6.3mm_D2.5mm_P10.16mm_Horizontal (layer F.Cu) (tedit 591A0D22) (tstamp 5909F42C)
-    (at 147.32 133.35)
+  (module Resistors_THT:R_Axial_DIN0207_L6.3mm_D2.5mm_P10.16mm_Horizontal (layer F.Cu) (tedit 593C2F74) (tstamp 5909F42C)
+    (at 177.165 139.065)
     (descr "Resistor, Axial_DIN0207 series, Axial, Horizontal, pin pitch=10.16mm, 0.25W = 1/4W, length*diameter=6.3*2.5mm^2, http://cdn-reichelt.de/documents/datenblatt/B400/1_4W%23YAG.pdf")
     (tags "Resistor Axial_DIN0207 series Axial Horizontal pin pitch 10.16mm 0.25W = 1/4W length 6.3mm diameter 2.5mm")
     (path /590A060A)
-    (fp_text reference R3 (at 5.08 -2.31) (layer F.SilkS)
+    (fp_text reference R3 (at 5.08 0) (layer F.SilkS)
       (effects (font (size 1 1) (thickness 0.15)))
     )
-    (fp_text value 1k (at 5.08 0) (layer F.Fab)
+    (fp_text value 1k (at 17.145 0) (layer F.Fab)
       (effects (font (size 1 1) (thickness 0.15)))
     )
     (fp_line (start 1.93 -1.25) (end 1.93 1.25) (layer F.Fab) (width 0.1))
@@ -574,91 +527,18 @@
     )
   )
 
-  (module Pin_Headers:Pin_Header_Angled_1x02_Pitch2.54mm (layer F.Cu) (tedit 590B9D33) (tstamp 590A0561)
-    (at 100.33 115.57 90)
-    (descr "Through hole angled pin header, 1x02, 2.54mm pitch, 6mm pin length, single row")
-    (tags "Through hole angled pin header THT 1x02 2.54mm single row")
-    (path /590A1B9F)
-    (fp_text reference J2 (at 4.315 -2.27 90) (layer F.SilkS)
-      (effects (font (size 1 1) (thickness 0.15)))
-    )
-    (fp_text value "XTAL Enable" (at 6.35 6.35 90) (layer F.Fab)
-      (effects (font (size 1 1) (thickness 0.15)))
-    )
-    (fp_line (start 1.4 -1.27) (end 1.4 1.27) (layer F.Fab) (width 0.1))
-    (fp_line (start 1.4 1.27) (end 3.9 1.27) (layer F.Fab) (width 0.1))
-    (fp_line (start 3.9 1.27) (end 3.9 -1.27) (layer F.Fab) (width 0.1))
-    (fp_line (start 3.9 -1.27) (end 1.4 -1.27) (layer F.Fab) (width 0.1))
-    (fp_line (start 0 -0.32) (end 0 0.32) (layer F.Fab) (width 0.1))
-    (fp_line (start 0 0.32) (end 9.9 0.32) (layer F.Fab) (width 0.1))
-    (fp_line (start 9.9 0.32) (end 9.9 -0.32) (layer F.Fab) (width 0.1))
-    (fp_line (start 9.9 -0.32) (end 0 -0.32) (layer F.Fab) (width 0.1))
-    (fp_line (start 1.4 1.27) (end 1.4 3.81) (layer F.Fab) (width 0.1))
-    (fp_line (start 1.4 3.81) (end 3.9 3.81) (layer F.Fab) (width 0.1))
-    (fp_line (start 3.9 3.81) (end 3.9 1.27) (layer F.Fab) (width 0.1))
-    (fp_line (start 3.9 1.27) (end 1.4 1.27) (layer F.Fab) (width 0.1))
-    (fp_line (start 0 2.22) (end 0 2.86) (layer F.Fab) (width 0.1))
-    (fp_line (start 0 2.86) (end 9.9 2.86) (layer F.Fab) (width 0.1))
-    (fp_line (start 9.9 2.86) (end 9.9 2.22) (layer F.Fab) (width 0.1))
-    (fp_line (start 9.9 2.22) (end 0 2.22) (layer F.Fab) (width 0.1))
-    (fp_line (start 1.34 -1.33) (end 1.34 1.27) (layer F.SilkS) (width 0.12))
-    (fp_line (start 1.34 1.27) (end 3.96 1.27) (layer F.SilkS) (width 0.12))
-    (fp_line (start 3.96 1.27) (end 3.96 -1.33) (layer F.SilkS) (width 0.12))
-    (fp_line (start 3.96 -1.33) (end 1.34 -1.33) (layer F.SilkS) (width 0.12))
-    (fp_line (start 3.96 -0.38) (end 3.96 0.38) (layer F.SilkS) (width 0.12))
-    (fp_line (start 3.96 0.38) (end 9.96 0.38) (layer F.SilkS) (width 0.12))
-    (fp_line (start 9.96 0.38) (end 9.96 -0.38) (layer F.SilkS) (width 0.12))
-    (fp_line (start 9.96 -0.38) (end 3.96 -0.38) (layer F.SilkS) (width 0.12))
-    (fp_line (start 0.91 -0.38) (end 1.34 -0.38) (layer F.SilkS) (width 0.12))
-    (fp_line (start 0.91 0.38) (end 1.34 0.38) (layer F.SilkS) (width 0.12))
-    (fp_line (start 3.96 -0.26) (end 9.96 -0.26) (layer F.SilkS) (width 0.12))
-    (fp_line (start 3.96 -0.14) (end 9.96 -0.14) (layer F.SilkS) (width 0.12))
-    (fp_line (start 3.96 -0.02) (end 9.96 -0.02) (layer F.SilkS) (width 0.12))
-    (fp_line (start 3.96 0.1) (end 9.96 0.1) (layer F.SilkS) (width 0.12))
-    (fp_line (start 3.96 0.22) (end 9.96 0.22) (layer F.SilkS) (width 0.12))
-    (fp_line (start 3.96 0.34) (end 9.96 0.34) (layer F.SilkS) (width 0.12))
-    (fp_line (start 1.34 1.27) (end 1.34 3.87) (layer F.SilkS) (width 0.12))
-    (fp_line (start 1.34 3.87) (end 3.96 3.87) (layer F.SilkS) (width 0.12))
-    (fp_line (start 3.96 3.87) (end 3.96 1.27) (layer F.SilkS) (width 0.12))
-    (fp_line (start 3.96 1.27) (end 1.34 1.27) (layer F.SilkS) (width 0.12))
-    (fp_line (start 3.96 2.16) (end 3.96 2.92) (layer F.SilkS) (width 0.12))
-    (fp_line (start 3.96 2.92) (end 9.96 2.92) (layer F.SilkS) (width 0.12))
-    (fp_line (start 9.96 2.92) (end 9.96 2.16) (layer F.SilkS) (width 0.12))
-    (fp_line (start 9.96 2.16) (end 3.96 2.16) (layer F.SilkS) (width 0.12))
-    (fp_line (start 0.91 2.16) (end 1.34 2.16) (layer F.SilkS) (width 0.12))
-    (fp_line (start 0.91 2.92) (end 1.34 2.92) (layer F.SilkS) (width 0.12))
-    (fp_line (start -1.27 0) (end -1.27 -1.27) (layer F.SilkS) (width 0.12))
-    (fp_line (start -1.27 -1.27) (end 0 -1.27) (layer F.SilkS) (width 0.12))
-    (fp_line (start -1.8 -1.8) (end -1.8 4.35) (layer F.CrtYd) (width 0.05))
-    (fp_line (start -1.8 4.35) (end 10.4 4.35) (layer F.CrtYd) (width 0.05))
-    (fp_line (start 10.4 4.35) (end 10.4 -1.8) (layer F.CrtYd) (width 0.05))
-    (fp_line (start 10.4 -1.8) (end -1.8 -1.8) (layer F.CrtYd) (width 0.05))
-    (fp_text user %R (at 4.315 -2.27 90) (layer F.Fab)
-      (effects (font (size 1 1) (thickness 0.15)))
-    )
-    (pad 1 thru_hole rect (at 0 0 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
-      (net 4 VCC))
-    (pad 2 thru_hole oval (at 0 2.54 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
-      (net 8 "Net-(J2-Pad2)"))
-    (model ${KISYS3DMOD}/Pin_Headers.3dshapes/Pin_Header_Angled_1x02_Pitch2.54mm.wrl
-      (at (xyz 0 -0.05 0))
-      (scale (xyz 1 1 1))
-      (rotate (xyz 0 0 90))
-    )
-  )
-
   (module Oscillators:Oscillator_DIP-14 (layer F.Cu) (tedit 590A066A) (tstamp 590A0569)
-    (at 97.79 123.19 270)
+    (at 99.695 123.19)
     (descr "Oscillator, DIP14, http://cdn-reichelt.de/documents/datenblatt/B400/OSZI.pdf")
     (tags oscillator)
     (path /590A1756)
-    (fp_text reference X1 (at 7.62 -3.81 270) (layer F.SilkS)
+    (fp_text reference X1 (at 7.62 -3.81) (layer F.SilkS)
       (effects (font (size 1 1) (thickness 0.15)))
     )
-    (fp_text value 1MHz (at -3.81 -3.81 360) (layer F.Fab)
+    (fp_text value 1MHz (at -3.81 -3.81 90) (layer F.Fab)
       (effects (font (size 1 1) (thickness 0.15)))
     )
-    (fp_text user %R (at 7.62 -3.81 270) (layer F.Fab)
+    (fp_text user %R (at 7.62 -3.81) (layer F.Fab)
       (effects (font (size 1 1) (thickness 0.15)))
     )
     (fp_line (start 18.22 2.79) (end 18.22 -10.41) (layer F.CrtYd) (width 0.05))
@@ -686,12 +566,12 @@
     (fp_arc (start 17.32 1.89) (end 17.97 1.89) (angle 90) (layer F.Fab) (width 0.1))
     (fp_arc (start 17.32 -9.51) (end 17.32 -10.16) (angle 90) (layer F.Fab) (width 0.1))
     (fp_arc (start -2.08 -9.51) (end -2.73 -9.51) (angle 90) (layer F.Fab) (width 0.1))
-    (pad 1 thru_hole rect (at 0 0 270) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask))
-    (pad 14 thru_hole circle (at 0 -7.62 270) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
-      (net 8 "Net-(J2-Pad2)"))
-    (pad 8 thru_hole circle (at 15.24 -7.62 270) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
-      (net 7 CLOCK))
-    (pad 7 thru_hole circle (at 15.24 0 270) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
+    (pad 1 thru_hole rect (at 0 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask))
+    (pad 14 thru_hole circle (at 0 -7.62) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
+      (net 13 "Net-(J2-Pad1)"))
+    (pad 8 thru_hole circle (at 15.24 -7.62) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
+      (net 8 CLOCK/1))
+    (pad 7 thru_hole circle (at 15.24 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
       (net 2 GND))
     (model ${KISYS3DMOD}/Oscillators.3dshapes/Oscillator_DIP-14.wrl
       (at (xyz 0 0 0))
@@ -1478,187 +1358,936 @@
     )
   )
 
-  (module Capacitors_THT:C_Disc_D3.0mm_W1.6mm_P2.50mm (layer F.Cu) (tedit 591A0EC8) (tstamp 591A0E52)
-    (at 119.38 139.065 180)
-    (descr "C, Disc series, Radial, pin pitch=2.50mm, , diameter*width=3.0*1.6mm^2, Capacitor, http://www.vishay.com/docs/45233/krseries.pdf")
-    (tags "C Disc series Radial pin pitch 2.50mm  diameter 3.0mm width 1.6mm Capacitor")
-    (path /591A9FB0)
-    (fp_text reference C4 (at 1.27 1.905 180) (layer F.SilkS)
+  (module Housings_DIP:DIP-14_W7.62mm_Socket (layer F.Cu) (tedit 593C23D3) (tstamp 593C2229)
+    (at 123.19 114.3)
+    (descr "14-lead dip package, row spacing 7.62 mm (300 mils), Socket")
+    (tags "DIL DIP PDIP 2.54mm 7.62mm 300mil Socket")
+    (path /593C2A48)
+    (fp_text reference U3 (at 3.81 7.62) (layer F.SilkS)
       (effects (font (size 1 1) (thickness 0.15)))
     )
-    (fp_text value 100nF (at 1.27 -1.905 180) (layer F.Fab)
+    (fp_text value 74HCT74 (at -2.54 13.335 90) (layer F.SilkS)
       (effects (font (size 1 1) (thickness 0.15)))
     )
-    (fp_line (start -0.25 -0.8) (end -0.25 0.8) (layer F.Fab) (width 0.1))
-    (fp_line (start -0.25 0.8) (end 2.75 0.8) (layer F.Fab) (width 0.1))
-    (fp_line (start 2.75 0.8) (end 2.75 -0.8) (layer F.Fab) (width 0.1))
-    (fp_line (start 2.75 -0.8) (end -0.25 -0.8) (layer F.Fab) (width 0.1))
-    (fp_line (start 0.663 -0.861) (end 1.837 -0.861) (layer F.SilkS) (width 0.12))
-    (fp_line (start 0.663 0.861) (end 1.837 0.861) (layer F.SilkS) (width 0.12))
-    (fp_line (start -1.05 -1.15) (end -1.05 1.15) (layer F.CrtYd) (width 0.05))
-    (fp_line (start -1.05 1.15) (end 3.55 1.15) (layer F.CrtYd) (width 0.05))
-    (fp_line (start 3.55 1.15) (end 3.55 -1.15) (layer F.CrtYd) (width 0.05))
-    (fp_line (start 3.55 -1.15) (end -1.05 -1.15) (layer F.CrtYd) (width 0.05))
-    (pad 1 thru_hole circle (at 0 0 180) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
+    (fp_text user %R (at 3.81 7.62) (layer F.Fab)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_line (start 1.635 -1.27) (end 6.985 -1.27) (layer F.Fab) (width 0.1))
+    (fp_line (start 6.985 -1.27) (end 6.985 16.51) (layer F.Fab) (width 0.1))
+    (fp_line (start 6.985 16.51) (end 0.635 16.51) (layer F.Fab) (width 0.1))
+    (fp_line (start 0.635 16.51) (end 0.635 -0.27) (layer F.Fab) (width 0.1))
+    (fp_line (start 0.635 -0.27) (end 1.635 -1.27) (layer F.Fab) (width 0.1))
+    (fp_line (start -1.27 -1.27) (end -1.27 16.51) (layer F.Fab) (width 0.1))
+    (fp_line (start -1.27 16.51) (end 8.89 16.51) (layer F.Fab) (width 0.1))
+    (fp_line (start 8.89 16.51) (end 8.89 -1.27) (layer F.Fab) (width 0.1))
+    (fp_line (start 8.89 -1.27) (end -1.27 -1.27) (layer F.Fab) (width 0.1))
+    (fp_line (start 2.81 -1.39) (end 1.04 -1.39) (layer F.SilkS) (width 0.12))
+    (fp_line (start 1.04 -1.39) (end 1.04 16.63) (layer F.SilkS) (width 0.12))
+    (fp_line (start 1.04 16.63) (end 6.58 16.63) (layer F.SilkS) (width 0.12))
+    (fp_line (start 6.58 16.63) (end 6.58 -1.39) (layer F.SilkS) (width 0.12))
+    (fp_line (start 6.58 -1.39) (end 4.81 -1.39) (layer F.SilkS) (width 0.12))
+    (fp_line (start -1.39 -1.39) (end -1.39 16.63) (layer F.SilkS) (width 0.12))
+    (fp_line (start -1.39 16.63) (end 9.01 16.63) (layer F.SilkS) (width 0.12))
+    (fp_line (start 9.01 16.63) (end 9.01 -1.39) (layer F.SilkS) (width 0.12))
+    (fp_line (start 9.01 -1.39) (end -1.39 -1.39) (layer F.SilkS) (width 0.12))
+    (fp_line (start -1.7 -1.7) (end -1.7 16.9) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -1.7 16.9) (end 9.3 16.9) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 9.3 16.9) (end 9.3 -1.7) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 9.3 -1.7) (end -1.7 -1.7) (layer F.CrtYd) (width 0.05))
+    (fp_arc (start 3.81 -1.39) (end 2.81 -1.39) (angle -180) (layer F.SilkS) (width 0.12))
+    (pad 1 thru_hole rect (at 0 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
       (net 4 VCC))
-    (pad 2 thru_hole circle (at 2.5 0 180) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
+    (pad 8 thru_hole oval (at 7.62 15.24) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
+      (net 11 "Net-(U3-Pad12)"))
+    (pad 2 thru_hole oval (at 0 2.54) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
+      (net 12 "Net-(U3-Pad11)"))
+    (pad 9 thru_hole oval (at 7.62 12.7) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
+      (net 10 CLOCK/4))
+    (pad 3 thru_hole oval (at 0 5.08) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
+      (net 8 CLOCK/1))
+    (pad 10 thru_hole oval (at 7.62 10.16) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
+      (net 4 VCC))
+    (pad 4 thru_hole oval (at 0 7.62) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
+      (net 4 VCC))
+    (pad 11 thru_hole oval (at 7.62 7.62) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
+      (net 12 "Net-(U3-Pad11)"))
+    (pad 5 thru_hole oval (at 0 10.16) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
+      (net 9 CLOCK/2))
+    (pad 12 thru_hole oval (at 7.62 5.08) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
+      (net 11 "Net-(U3-Pad12)"))
+    (pad 6 thru_hole oval (at 0 12.7) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
+      (net 12 "Net-(U3-Pad11)"))
+    (pad 13 thru_hole oval (at 7.62 2.54) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
+      (net 4 VCC))
+    (pad 7 thru_hole oval (at 0 15.24) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
       (net 2 GND))
-    (model Capacitors_THT.3dshapes/C_Disc_D3.0mm_W1.6mm_P2.50mm.wrl
+    (pad 14 thru_hole oval (at 7.62 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
+      (net 4 VCC))
+    (model ${KISYS3DMOD}/Housings_DIP.3dshapes/DIP-14_W7.62mm_Socket.wrl
+      (at (xyz 0 0 0))
+      (scale (xyz 1 1 1))
+      (rotate (xyz 0 0 0))
+    )
+  )
+
+  (module Capacitors_THT:C_Disc_D4.7mm_W2.5mm_P5.00mm (layer F.Cu) (tedit 593C22F9) (tstamp 593C237E)
+    (at 167.005 126.365 270)
+    (descr "C, Disc series, Radial, pin pitch=5.00mm, , diameter*width=4.7*2.5mm^2, Capacitor, http://www.vishay.com/docs/45233/krseries.pdf")
+    (tags "C Disc series Radial pin pitch 5.00mm  diameter 4.7mm width 2.5mm Capacitor")
+    (path /5909CD8B)
+    (fp_text reference C1 (at 2.54 0 360) (layer F.SilkS)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value 100nF (at 2.5 2.31 270) (layer F.Fab)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text user %R (at 2.54 0 360) (layer F.Fab)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_line (start 0.15 -1.25) (end 0.15 1.25) (layer F.Fab) (width 0.1))
+    (fp_line (start 0.15 1.25) (end 4.85 1.25) (layer F.Fab) (width 0.1))
+    (fp_line (start 4.85 1.25) (end 4.85 -1.25) (layer F.Fab) (width 0.1))
+    (fp_line (start 4.85 -1.25) (end 0.15 -1.25) (layer F.Fab) (width 0.1))
+    (fp_line (start 0.09 -1.31) (end 4.91 -1.31) (layer F.SilkS) (width 0.12))
+    (fp_line (start 0.09 1.31) (end 4.91 1.31) (layer F.SilkS) (width 0.12))
+    (fp_line (start 0.09 -1.31) (end 0.09 -0.996) (layer F.SilkS) (width 0.12))
+    (fp_line (start 0.09 0.996) (end 0.09 1.31) (layer F.SilkS) (width 0.12))
+    (fp_line (start 4.91 -1.31) (end 4.91 -0.996) (layer F.SilkS) (width 0.12))
+    (fp_line (start 4.91 0.996) (end 4.91 1.31) (layer F.SilkS) (width 0.12))
+    (fp_line (start -1.05 -1.6) (end -1.05 1.6) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -1.05 1.6) (end 6.05 1.6) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 6.05 1.6) (end 6.05 -1.6) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 6.05 -1.6) (end -1.05 -1.6) (layer F.CrtYd) (width 0.05))
+    (pad 1 thru_hole circle (at 0 0 270) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
+      (net 1 "Net-(C1-Pad1)"))
+    (pad 2 thru_hole circle (at 5 0 270) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
+      (net 2 GND))
+    (model ${KISYS3DMOD}/Capacitors_THT.3dshapes/C_Disc_D4.7mm_W2.5mm_P5.00mm.wrl
       (at (xyz 0 0 0))
       (scale (xyz 0.393701 0.393701 0.393701))
       (rotate (xyz 0 0 0))
     )
   )
 
+  (module Capacitors_THT:C_Disc_D4.7mm_W2.5mm_P5.00mm (layer F.Cu) (tedit 593C2306) (tstamp 593C2383)
+    (at 159.385 126.365 270)
+    (descr "C, Disc series, Radial, pin pitch=5.00mm, , diameter*width=4.7*2.5mm^2, Capacitor, http://www.vishay.com/docs/45233/krseries.pdf")
+    (tags "C Disc series Radial pin pitch 5.00mm  diameter 4.7mm width 2.5mm Capacitor")
+    (path /5909D33C)
+    (fp_text reference C3 (at 2.54 0 360) (layer F.SilkS)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value 100nF (at 2.5 2.31 270) (layer F.Fab)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text user %R (at 2.54 0 360) (layer F.Fab)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_line (start 0.15 -1.25) (end 0.15 1.25) (layer F.Fab) (width 0.1))
+    (fp_line (start 0.15 1.25) (end 4.85 1.25) (layer F.Fab) (width 0.1))
+    (fp_line (start 4.85 1.25) (end 4.85 -1.25) (layer F.Fab) (width 0.1))
+    (fp_line (start 4.85 -1.25) (end 0.15 -1.25) (layer F.Fab) (width 0.1))
+    (fp_line (start 0.09 -1.31) (end 4.91 -1.31) (layer F.SilkS) (width 0.12))
+    (fp_line (start 0.09 1.31) (end 4.91 1.31) (layer F.SilkS) (width 0.12))
+    (fp_line (start 0.09 -1.31) (end 0.09 -0.996) (layer F.SilkS) (width 0.12))
+    (fp_line (start 0.09 0.996) (end 0.09 1.31) (layer F.SilkS) (width 0.12))
+    (fp_line (start 4.91 -1.31) (end 4.91 -0.996) (layer F.SilkS) (width 0.12))
+    (fp_line (start 4.91 0.996) (end 4.91 1.31) (layer F.SilkS) (width 0.12))
+    (fp_line (start -1.05 -1.6) (end -1.05 1.6) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -1.05 1.6) (end 6.05 1.6) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 6.05 1.6) (end 6.05 -1.6) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 6.05 -1.6) (end -1.05 -1.6) (layer F.CrtYd) (width 0.05))
+    (pad 1 thru_hole circle (at 0 0 270) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
+      (net 4 VCC))
+    (pad 2 thru_hole circle (at 5 0 270) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
+      (net 2 GND))
+    (model ${KISYS3DMOD}/Capacitors_THT.3dshapes/C_Disc_D4.7mm_W2.5mm_P5.00mm.wrl
+      (at (xyz 0 0 0))
+      (scale (xyz 0.393701 0.393701 0.393701))
+      (rotate (xyz 0 0 0))
+    )
+  )
+
+  (module Capacitors_THT:C_Disc_D4.7mm_W2.5mm_P5.00mm (layer F.Cu) (tedit 593C23B0) (tstamp 593C2388)
+    (at 153.035 114.3 270)
+    (descr "C, Disc series, Radial, pin pitch=5.00mm, , diameter*width=4.7*2.5mm^2, Capacitor, http://www.vishay.com/docs/45233/krseries.pdf")
+    (tags "C Disc series Radial pin pitch 5.00mm  diameter 4.7mm width 2.5mm Capacitor")
+    (path /591A9FB0)
+    (fp_text reference C4 (at 2.54 0 360) (layer F.SilkS)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value 100nF (at -1.905 0 360) (layer F.Fab)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text user %R (at 2.54 0 360) (layer F.Fab)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_line (start 0.15 -1.25) (end 0.15 1.25) (layer F.Fab) (width 0.1))
+    (fp_line (start 0.15 1.25) (end 4.85 1.25) (layer F.Fab) (width 0.1))
+    (fp_line (start 4.85 1.25) (end 4.85 -1.25) (layer F.Fab) (width 0.1))
+    (fp_line (start 4.85 -1.25) (end 0.15 -1.25) (layer F.Fab) (width 0.1))
+    (fp_line (start 0.09 -1.31) (end 4.91 -1.31) (layer F.SilkS) (width 0.12))
+    (fp_line (start 0.09 1.31) (end 4.91 1.31) (layer F.SilkS) (width 0.12))
+    (fp_line (start 0.09 -1.31) (end 0.09 -0.996) (layer F.SilkS) (width 0.12))
+    (fp_line (start 0.09 0.996) (end 0.09 1.31) (layer F.SilkS) (width 0.12))
+    (fp_line (start 4.91 -1.31) (end 4.91 -0.996) (layer F.SilkS) (width 0.12))
+    (fp_line (start 4.91 0.996) (end 4.91 1.31) (layer F.SilkS) (width 0.12))
+    (fp_line (start -1.05 -1.6) (end -1.05 1.6) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -1.05 1.6) (end 6.05 1.6) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 6.05 1.6) (end 6.05 -1.6) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 6.05 -1.6) (end -1.05 -1.6) (layer F.CrtYd) (width 0.05))
+    (pad 1 thru_hole circle (at 0 0 270) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
+      (net 4 VCC))
+    (pad 2 thru_hole circle (at 5 0 270) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
+      (net 2 GND))
+    (model ${KISYS3DMOD}/Capacitors_THT.3dshapes/C_Disc_D4.7mm_W2.5mm_P5.00mm.wrl
+      (at (xyz 0 0 0))
+      (scale (xyz 0.393701 0.393701 0.393701))
+      (rotate (xyz 0 0 0))
+    )
+  )
+
+  (module Capacitors_THT:C_Disc_D4.7mm_W2.5mm_P5.00mm (layer F.Cu) (tedit 593C23B8) (tstamp 593C238D)
+    (at 135.255 114.3 270)
+    (descr "C, Disc series, Radial, pin pitch=5.00mm, , diameter*width=4.7*2.5mm^2, Capacitor, http://www.vishay.com/docs/45233/krseries.pdf")
+    (tags "C Disc series Radial pin pitch 5.00mm  diameter 4.7mm width 2.5mm Capacitor")
+    (path /593C7AE0)
+    (fp_text reference C5 (at 2.54 0 360) (layer F.SilkS)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value 100nF (at -1.905 0 360) (layer F.Fab)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text user %R (at 2.54 0 360) (layer F.Fab)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_line (start 0.15 -1.25) (end 0.15 1.25) (layer F.Fab) (width 0.1))
+    (fp_line (start 0.15 1.25) (end 4.85 1.25) (layer F.Fab) (width 0.1))
+    (fp_line (start 4.85 1.25) (end 4.85 -1.25) (layer F.Fab) (width 0.1))
+    (fp_line (start 4.85 -1.25) (end 0.15 -1.25) (layer F.Fab) (width 0.1))
+    (fp_line (start 0.09 -1.31) (end 4.91 -1.31) (layer F.SilkS) (width 0.12))
+    (fp_line (start 0.09 1.31) (end 4.91 1.31) (layer F.SilkS) (width 0.12))
+    (fp_line (start 0.09 -1.31) (end 0.09 -0.996) (layer F.SilkS) (width 0.12))
+    (fp_line (start 0.09 0.996) (end 0.09 1.31) (layer F.SilkS) (width 0.12))
+    (fp_line (start 4.91 -1.31) (end 4.91 -0.996) (layer F.SilkS) (width 0.12))
+    (fp_line (start 4.91 0.996) (end 4.91 1.31) (layer F.SilkS) (width 0.12))
+    (fp_line (start -1.05 -1.6) (end -1.05 1.6) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -1.05 1.6) (end 6.05 1.6) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 6.05 1.6) (end 6.05 -1.6) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 6.05 -1.6) (end -1.05 -1.6) (layer F.CrtYd) (width 0.05))
+    (pad 1 thru_hole circle (at 0 0 270) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
+      (net 4 VCC))
+    (pad 2 thru_hole circle (at 5 0 270) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
+      (net 2 GND))
+    (model ${KISYS3DMOD}/Capacitors_THT.3dshapes/C_Disc_D4.7mm_W2.5mm_P5.00mm.wrl
+      (at (xyz 0 0 0))
+      (scale (xyz 0.393701 0.393701 0.393701))
+      (rotate (xyz 0 0 0))
+    )
+  )
+
+  (module LEDs:LED_D5.0mm (layer F.Cu) (tedit 587A3A7B) (tstamp 593C26AB)
+    (at 177.165 117.475 90)
+    (descr "LED, diameter 5.0mm, 2 pins, http://cdn-reichelt.de/documents/datenblatt/A500/LL-504BC2E-009.pdf")
+    (tags "LED diameter 5.0mm 2 pins")
+    (path /593CDC46)
+    (fp_text reference D1 (at 1.27 -3.96 90) (layer F.SilkS)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value Power (at 1.27 3.96 90) (layer F.Fab)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_arc (start 1.27 0) (end -1.23 -1.469694) (angle 299.1) (layer F.Fab) (width 0.1))
+    (fp_arc (start 1.27 0) (end -1.29 -1.54483) (angle 148.9) (layer F.SilkS) (width 0.12))
+    (fp_arc (start 1.27 0) (end -1.29 1.54483) (angle -148.9) (layer F.SilkS) (width 0.12))
+    (fp_circle (center 1.27 0) (end 3.77 0) (layer F.Fab) (width 0.1))
+    (fp_circle (center 1.27 0) (end 3.77 0) (layer F.SilkS) (width 0.12))
+    (fp_line (start -1.23 -1.469694) (end -1.23 1.469694) (layer F.Fab) (width 0.1))
+    (fp_line (start -1.29 -1.545) (end -1.29 1.545) (layer F.SilkS) (width 0.12))
+    (fp_line (start -1.95 -3.25) (end -1.95 3.25) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -1.95 3.25) (end 4.5 3.25) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 4.5 3.25) (end 4.5 -3.25) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 4.5 -3.25) (end -1.95 -3.25) (layer F.CrtYd) (width 0.05))
+    (pad 1 thru_hole rect (at 0 0 90) (size 1.8 1.8) (drill 0.9) (layers *.Cu *.Mask)
+      (net 2 GND))
+    (pad 2 thru_hole circle (at 2.54 0 90) (size 1.8 1.8) (drill 0.9) (layers *.Cu *.Mask)
+      (net 14 "Net-(D1-Pad2)"))
+    (model LEDs.3dshapes/LED_D5.0mm.wrl
+      (at (xyz 0 0 0))
+      (scale (xyz 0.393701 0.393701 0.393701))
+      (rotate (xyz 0 0 0))
+    )
+  )
+
+  (module Pin_Headers:Pin_Header_Straight_2x04_Pitch2.54mm (layer F.Cu) (tedit 593C3118) (tstamp 593C26AC)
+    (at 104.14 132.715 90)
+    (descr "Through hole straight pin header, 2x04, 2.54mm pitch, double rows")
+    (tags "Through hole pin header THT 2x04 2.54mm double row")
+    (path /593CC468)
+    (fp_text reference J2 (at 1.27 -2.33 90) (layer F.Fab)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value CONN_02X04 (at 1.27 9.95 90) (layer F.Fab)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_line (start -1.27 -1.27) (end -1.27 8.89) (layer F.Fab) (width 0.1))
+    (fp_line (start -1.27 8.89) (end 3.81 8.89) (layer F.Fab) (width 0.1))
+    (fp_line (start 3.81 8.89) (end 3.81 -1.27) (layer F.Fab) (width 0.1))
+    (fp_line (start 3.81 -1.27) (end -1.27 -1.27) (layer F.Fab) (width 0.1))
+    (fp_line (start -1.33 1.27) (end -1.33 8.95) (layer F.SilkS) (width 0.12))
+    (fp_line (start -1.33 8.95) (end 3.87 8.95) (layer F.SilkS) (width 0.12))
+    (fp_line (start 3.87 8.95) (end 3.87 -1.33) (layer F.SilkS) (width 0.12))
+    (fp_line (start 3.87 -1.33) (end 1.27 -1.33) (layer F.SilkS) (width 0.12))
+    (fp_line (start 1.27 -1.33) (end 1.27 1.27) (layer F.SilkS) (width 0.12))
+    (fp_line (start 1.27 1.27) (end -1.33 1.27) (layer F.SilkS) (width 0.12))
+    (fp_line (start -1.33 0) (end -1.33 -1.33) (layer F.SilkS) (width 0.12))
+    (fp_line (start -1.33 -1.33) (end 0 -1.33) (layer F.SilkS) (width 0.12))
+    (fp_line (start -1.8 -1.8) (end -1.8 9.4) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -1.8 9.4) (end 4.35 9.4) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 4.35 9.4) (end 4.35 -1.8) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 4.35 -1.8) (end -1.8 -1.8) (layer F.CrtYd) (width 0.05))
+    (fp_text user %R (at 1.27 -2.33 90) (layer F.Fab)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (pad 1 thru_hole rect (at 0 0 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
+      (net 13 "Net-(J2-Pad1)"))
+    (pad 2 thru_hole oval (at 2.54 0 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
+      (net 4 VCC))
+    (pad 3 thru_hole oval (at 0 2.54 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
+      (net 8 CLOCK/1))
+    (pad 4 thru_hole oval (at 2.54 2.54 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
+      (net 7 CLOCK))
+    (pad 5 thru_hole oval (at 0 5.08 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
+      (net 9 CLOCK/2))
+    (pad 6 thru_hole oval (at 2.54 5.08 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
+      (net 7 CLOCK))
+    (pad 7 thru_hole oval (at 0 7.62 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
+      (net 10 CLOCK/4))
+    (pad 8 thru_hole oval (at 2.54 7.62 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
+      (net 7 CLOCK))
+    (model ${KISYS3DMOD}/Pin_Headers.3dshapes/Pin_Header_Straight_2x04_Pitch2.54mm.wrl
+      (at (xyz 0.05 -0.15 0))
+      (scale (xyz 1 1 1))
+      (rotate (xyz 0 0 90))
+    )
+  )
+
+  (module Resistors_THT:R_Axial_DIN0207_L6.3mm_D2.5mm_P10.16mm_Horizontal (layer F.Cu) (tedit 593C2F71) (tstamp 593C26BC)
+    (at 187.325 123.825 180)
+    (descr "Resistor, Axial_DIN0207 series, Axial, Horizontal, pin pitch=10.16mm, 0.25W = 1/4W, length*diameter=6.3*2.5mm^2, http://cdn-reichelt.de/documents/datenblatt/B400/1_4W%23YAG.pdf")
+    (tags "Resistor Axial_DIN0207 series Axial Horizontal pin pitch 10.16mm 0.25W = 1/4W length 6.3mm diameter 2.5mm")
+    (path /593CE753)
+    (fp_text reference R4 (at 5.08 0 180) (layer F.SilkS)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value 330 (at -6.985 0 180) (layer F.Fab)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_line (start 1.93 -1.25) (end 1.93 1.25) (layer F.Fab) (width 0.1))
+    (fp_line (start 1.93 1.25) (end 8.23 1.25) (layer F.Fab) (width 0.1))
+    (fp_line (start 8.23 1.25) (end 8.23 -1.25) (layer F.Fab) (width 0.1))
+    (fp_line (start 8.23 -1.25) (end 1.93 -1.25) (layer F.Fab) (width 0.1))
+    (fp_line (start 0 0) (end 1.93 0) (layer F.Fab) (width 0.1))
+    (fp_line (start 10.16 0) (end 8.23 0) (layer F.Fab) (width 0.1))
+    (fp_line (start 1.87 -1.31) (end 1.87 1.31) (layer F.SilkS) (width 0.12))
+    (fp_line (start 1.87 1.31) (end 8.29 1.31) (layer F.SilkS) (width 0.12))
+    (fp_line (start 8.29 1.31) (end 8.29 -1.31) (layer F.SilkS) (width 0.12))
+    (fp_line (start 8.29 -1.31) (end 1.87 -1.31) (layer F.SilkS) (width 0.12))
+    (fp_line (start 0.98 0) (end 1.87 0) (layer F.SilkS) (width 0.12))
+    (fp_line (start 9.18 0) (end 8.29 0) (layer F.SilkS) (width 0.12))
+    (fp_line (start -1.05 -1.6) (end -1.05 1.6) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -1.05 1.6) (end 11.25 1.6) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 11.25 1.6) (end 11.25 -1.6) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 11.25 -1.6) (end -1.05 -1.6) (layer F.CrtYd) (width 0.05))
+    (pad 1 thru_hole circle (at 0 0 180) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
+      (net 4 VCC))
+    (pad 2 thru_hole oval (at 10.16 0 180) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)
+      (net 14 "Net-(D1-Pad2)"))
+    (model Resistors_THT.3dshapes/R_Axial_DIN0207_L6.3mm_D2.5mm_P10.16mm_Horizontal.wrl
+      (at (xyz 0 0 0))
+      (scale (xyz 0.393701 0.393701 0.393701))
+      (rotate (xyz 0 0 0))
+    )
+  )
+
+  (gr_text Clock/4 (at 111.76 134.62 270) (layer F.SilkS)
+    (effects (font (size 1.5 1.5) (thickness 0.3)) (justify left))
+  )
+  (gr_text Clock/2 (at 109.22 134.62 270) (layer F.SilkS)
+    (effects (font (size 1.5 1.5) (thickness 0.3)) (justify left))
+  )
+  (gr_line (start 105.41 128.905) (end 105.41 144.145) (angle 90) (layer F.SilkS) (width 0.2))
+  (gr_line (start 107.95 128.905) (end 107.95 144.145) (angle 90) (layer F.SilkS) (width 0.2))
+  (gr_line (start 110.49 128.905) (end 110.49 144.145) (angle 90) (layer F.SilkS) (width 0.2))
+  (gr_line (start 102.87 144.145) (end 102.87 143.51) (angle 90) (layer F.SilkS) (width 0.2))
+  (gr_line (start 113.03 144.145) (end 102.87 144.145) (angle 90) (layer F.SilkS) (width 0.2))
+  (gr_line (start 113.03 143.51) (end 113.03 144.145) (angle 90) (layer F.SilkS) (width 0.2))
+  (gr_text Clock/1 (at 106.68 134.62 270) (layer F.SilkS)
+    (effects (font (size 1.5 1.5) (thickness 0.3)) (justify left))
+  )
+  (gr_text Enable (at 104.14 134.62 270) (layer F.SilkS)
+    (effects (font (size 1.5 1.5) (thickness 0.3)) (justify left))
+  )
+  (gr_line (start 102.87 133.985) (end 113.03 133.985) (angle 90) (layer F.SilkS) (width 0.2))
+  (gr_line (start 102.87 128.905) (end 113.03 128.905) (angle 90) (layer F.SilkS) (width 0.2))
+  (gr_line (start 113.03 128.905) (end 113.03 143.51) (angle 90) (layer F.SilkS) (width 0.2))
+  (gr_line (start 102.87 128.905) (end 102.87 143.51) (angle 90) (layer F.SilkS) (width 0.2))
+  (gr_line (start 189.23 134.62) (end 191.77 134.62) (angle 90) (layer F.SilkS) (width 0.2))
+  (gr_line (start 189.23 147.32) (end 189.23 134.62) (angle 90) (layer F.SilkS) (width 0.2))
+  (gr_line (start 148.59 147.32) (end 148.59 134.62) (angle 90) (layer F.SilkS) (width 0.2))
+  (gr_line (start 151.13 134.62) (end 151.13 147.32) (angle 90) (layer F.SilkS) (width 0.2))
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+        (xy 168.35888 121.370849) (xy 168.047811 120.905302) (xy 167.665725 120.65) (xy 168.047811 120.394698) (xy 168.35888 119.929151)
+        (xy 168.468113 119.38) (xy 168.35888 118.830849) (xy 168.047811 118.365302) (xy 167.665725 118.11) (xy 168.047811 117.854698)
+        (xy 168.110585 117.76075) (xy 175.63 117.76075) (xy 175.63 118.501309) (xy 175.726673 118.734698) (xy 175.905301 118.913327)
+        (xy 176.13869 119.01) (xy 176.87925 119.01) (xy 177.038 118.85125) (xy 177.038 117.602) (xy 177.292 117.602)
+        (xy 177.292 118.85125) (xy 177.45075 119.01) (xy 178.19131 119.01) (xy 178.424699 118.913327) (xy 178.603327 118.734698)
+        (xy 178.7 118.501309) (xy 178.7 118.488795) (xy 181.879716 118.488795) (xy 182.128106 119.089943) (xy 182.587637 119.550278)
+        (xy 183.188352 119.799716) (xy 183.838795 119.800284) (xy 184.439943 119.551894) (xy 184.900278 119.092363) (xy 185.149716 118.491648)
+        (xy 185.150284 117.841205) (xy 184.901894 117.240057) (xy 184.442363 116.779722) (xy 183.841648 116.530284) (xy 183.191205 116.529716)
+        (xy 182.590057 116.778106) (xy 182.129722 117.237637) (xy 181.880284 117.838352) (xy 181.879716 118.488795) (xy 178.7 118.488795)
+        (xy 178.7 117.76075) (xy 178.54125 117.602) (xy 177.292 117.602) (xy 177.038 117.602) (xy 175.78875 117.602)
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+        (xy 168.047811 115.825302) (xy 167.665725 115.57) (xy 168.047811 115.314698) (xy 168.098396 115.238991) (xy 175.629735 115.238991)
+        (xy 175.862932 115.803371) (xy 176.040092 115.980841) (xy 175.905301 116.036673) (xy 175.726673 116.215302) (xy 175.63 116.448691)
+        (xy 175.63 117.18925) (xy 175.78875 117.348) (xy 177.038 117.348) (xy 177.038 117.328) (xy 177.292 117.328)
+        (xy 177.292 117.348) (xy 178.54125 117.348) (xy 178.7 117.18925) (xy 178.7 116.448691) (xy 178.603327 116.215302)
+        (xy 178.424699 116.036673) (xy 178.290006 115.980881) (xy 178.465551 115.805643) (xy 178.699733 115.24167) (xy 178.700102 114.817532)
+        (xy 182.542073 114.817532) (xy 182.640736 115.084387) (xy 183.250461 115.310908) (xy 183.90046 115.286856) (xy 184.389264 115.084387)
+        (xy 184.487927 114.817532) (xy 183.515 113.844605) (xy 182.542073 114.817532) (xy 178.700102 114.817532) (xy 178.700265 114.631009)
+        (xy 178.467068 114.066629) (xy 178.035643 113.634449) (xy 177.472138 113.400461) (xy 181.869092 113.400461) (xy 181.893144 114.05046)
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+        (xy 184.934387 114.539264) (xy 185.160908 113.929539) (xy 185.141331 113.400461) (xy 188.369092 113.400461) (xy 188.393144 114.05046)
+        (xy 188.595613 114.539264) (xy 188.862468 114.637927) (xy 189.835395 113.665) (xy 188.862468 112.692073) (xy 188.595613 112.790736)
+        (xy 188.369092 113.400461) (xy 185.141331 113.400461) (xy 185.136856 113.27954) (xy 184.934387 112.790736) (xy 184.667532 112.692073)
+        (xy 183.694605 113.665) (xy 183.335395 113.665) (xy 182.362468 112.692073) (xy 182.095613 112.790736) (xy 181.869092 113.400461)
+        (xy 177.472138 113.400461) (xy 177.47167 113.400267) (xy 176.861009 113.399735) (xy 176.296629 113.632932) (xy 175.864449 114.064357)
+        (xy 175.630267 114.62833) (xy 175.629735 115.238991) (xy 168.098396 115.238991) (xy 168.35888 114.849151) (xy 168.468113 114.3)
+        (xy 168.35888 113.750849) (xy 168.047811 113.285302) (xy 167.582264 112.974233) (xy 167.033113 112.865) (xy 166.976887 112.865)
+        (xy 166.427736 112.974233) (xy 165.962189 113.285302) (xy 165.65112 113.750849) (xy 165.541887 114.3) (xy 154.47 114.3)
+        (xy 154.470248 114.015813) (xy 154.252243 113.4882) (xy 154.137933 113.37369) (xy 157.95 113.37369) (xy 157.95 114.01425)
+        (xy 158.10875 114.173) (xy 159.258 114.173) (xy 159.258 113.02375) (xy 159.512 113.02375) (xy 159.512 114.173)
+        (xy 160.66125 114.173) (xy 160.82 114.01425) (xy 160.82 113.37369) (xy 160.723327 113.140301) (xy 160.544698 112.961673)
+        (xy 160.311309 112.865) (xy 159.67075 112.865) (xy 159.512 113.02375) (xy 159.258 113.02375) (xy 159.09925 112.865)
+        (xy 158.458691 112.865) (xy 158.225302 112.961673) (xy 158.046673 113.140301) (xy 157.95 113.37369) (xy 154.137933 113.37369)
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+        (xy 151.60025 114.013309) (xy 151.599752 114.584187) (xy 149.996584 114.584187) (xy 150.053113 114.3) (xy 149.94388 113.750849)
+        (xy 149.632811 113.285302) (xy 149.167264 112.974233) (xy 148.618113 112.865) (xy 148.561887 112.865) (xy 148.012736 112.974233)
+        (xy 147.547189 113.285302) (xy 147.23612 113.750849) (xy 147.126887 114.3) (xy 142.41744 114.3) (xy 142.41744 113.5)
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+        (xy 139.934683 112.896838) (xy 139.718559 113.03591) (xy 139.573569 113.24811) (xy 139.52256 113.5) (xy 139.52256 115.1)
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+        (xy 139.61612 116.290849) (xy 139.506887 116.84) (xy 132.273113 116.84) (xy 132.16388 116.290849) (xy 131.852811 115.825302)
+        (xy 131.470725 115.57) (xy 131.852811 115.314698) (xy 132.16388 114.849151) (xy 132.216584 114.584187) (xy 133.819752 114.584187)
+        (xy 134.037757 115.1118) (xy 134.441077 115.515824) (xy 134.968309 115.73475) (xy 135.539187 115.735248) (xy 136.0668 115.517243)
+        (xy 136.470824 115.113923) (xy 136.68975 114.586691) (xy 136.690248 114.015813) (xy 136.472243 113.4882) (xy 136.068923 113.084176)
+        (xy 135.541691 112.86525) (xy 134.970813 112.864752) (xy 134.4432 113.082757) (xy 134.039176 113.486077) (xy 133.82025 114.013309)
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+        (xy 129.45612 113.750849) (xy 129.346887 114.3) (xy 129.45612 114.849151) (xy 129.767189 115.314698) (xy 130.149275 115.57)
+        (xy 129.767189 115.825302) (xy 129.45612 116.290849) (xy 129.346887 116.84) (xy 129.45612 117.389151) (xy 129.767189 117.854698)
+        (xy 130.149275 118.11) (xy 129.767189 118.365302) (xy 129.45612 118.830849) (xy 129.346887 119.38) (xy 129.45612 119.929151)
+        (xy 129.767189 120.394698) (xy 130.149275 120.65) (xy 129.767189 120.905302) (xy 129.700264 121.005462) (xy 124.997401 116.302599)
+        (xy 124.750839 116.137852) (xy 124.46 116.08) (xy 124.402995 116.08) (xy 124.232811 115.825302) (xy 124.088535 115.728899)
+        (xy 124.225317 115.703162) (xy 124.441441 115.56409) (xy 124.586431 115.35189) (xy 124.63744 115.1) (xy 124.63744 113.5)
+        (xy 124.593162 113.264683) (xy 124.45409 113.048559) (xy 124.24189 112.903569) (xy 123.99 112.85256) (xy 122.39 112.85256)
+        (xy 122.154683 112.896838) (xy 121.938559 113.03591) (xy 121.793569 113.24811) (xy 121.74256 113.5) (xy 121.74256 115.1)
+        (xy 121.786838 115.335317) (xy 121.92591 115.551441) (xy 122.13811 115.696431) (xy 122.293089 115.727815) (xy 122.147189 115.825302)
+        (xy 121.83612 116.290849) (xy 121.726887 116.84) (xy 115.619118 116.84) (xy 115.7468 116.787243) (xy 116.150824 116.383923)
+        (xy 116.36975 115.856691) (xy 116.370248 115.285813) (xy 116.152243 114.7582) (xy 115.748923 114.354176) (xy 115.221691 114.13525)
+        (xy 114.650813 114.134752) (xy 114.1232 114.352757) (xy 113.719176 114.756077) (xy 113.50025 115.283309) (xy 113.499752 115.854187)
+        (xy 101.129752 115.854187) (xy 101.130248 115.285813) (xy 100.912243 114.7582) (xy 100.508923 114.354176) (xy 99.981691 114.13525)
+        (xy 99.410813 114.134752) (xy 98.8832 114.352757) (xy 98.479176 114.756077) (xy 98.26025 115.283309) (xy 98.259752 115.854187)
+        (xy 93.42 115.854187) (xy 93.42 112.47) (xy 182.557774 112.47)
+      )
+    )
+  )
 )
diff --git a/RC6502 Reset Circuit/Reset circuit.net b/RC6502 Reset Circuit/Reset circuit.net
index 768342f..87490fe 100644
--- a/RC6502 Reset Circuit/Reset circuit.net	
+++ b/RC6502 Reset Circuit/Reset circuit.net	
@@ -1,7 +1,7 @@
 (export (version D)
   (design
     (source "D:/ownCloud/Documents/Projects/RC6502/RC6502 Reset Circuit/Reset circuit.sch")
-    (date "15/05/2017 22:21:28")
+    (date "10/06/2017 19:46:12")
     (tool "Eeschema 4.0.6")
     (sheet (number 1) (name /) (tstamps /)
       (title_block
@@ -29,13 +29,13 @@
       (tstamp 5909CC66))
     (comp (ref C1)
       (value 100nF)
-      (footprint Capacitors_THT:C_Disc_D3.0mm_W1.6mm_P2.50mm)
+      (footprint Capacitors_THT:C_Disc_D4.7mm_W2.5mm_P5.00mm)
       (libsource (lib device) (part C))
       (sheetpath (names /) (tstamps /))
       (tstamp 5909CD8B))
     (comp (ref C3)
       (value 100nF)
-      (footprint Capacitors_THT:C_Disc_D3.0mm_W1.6mm_P2.50mm)
+      (footprint Capacitors_THT:C_Disc_D4.7mm_W2.5mm_P5.00mm)
       (libsource (lib device) (part C))
       (sheetpath (names /) (tstamps /))
       (tstamp 5909D33C))
@@ -52,7 +52,7 @@
       (sheetpath (names /) (tstamps /))
       (tstamp 5909D5AC))
     (comp (ref U2)
-      (value 74LS04)
+      (value 74HCT04)
       (footprint Housings_DIP:DIP-14_W7.62mm)
       (libsource (lib 74xx) (part 74LS04))
       (sheetpath (names /) (tstamps /))
@@ -75,12 +75,6 @@
       (libsource (lib Oscillators) (part ACO-xxxMHz))
       (sheetpath (names /) (tstamps /))
       (tstamp 590A1756))
-    (comp (ref J2)
-      (value "XTAL Enable")
-      (footprint Pin_Headers:Pin_Header_Angled_1x02_Pitch2.54mm)
-      (libsource (lib conn) (part CONN_01X02))
-      (sheetpath (names /) (tstamps /))
-      (tstamp 590A1B9F))
     (comp (ref J1)
       (value CONN_01X39)
       (footprint Pin_Headers:Pin_Header_Angled_1x39_Pitch2.54mm)
@@ -89,10 +83,40 @@
       (tstamp 590BF97A))
     (comp (ref C4)
       (value 100nF)
-      (footprint Capacitors_THT:C_Disc_D3.0mm_W1.6mm_P2.50mm)
+      (footprint Capacitors_THT:C_Disc_D4.7mm_W2.5mm_P5.00mm)
       (libsource (lib device) (part C))
       (sheetpath (names /) (tstamps /))
-      (tstamp 591A9FB0)))
+      (tstamp 591A9FB0))
+    (comp (ref U3)
+      (value 74HCT74)
+      (footprint Housings_DIP:DIP-14_W7.62mm_Socket)
+      (libsource (lib 74xx) (part 74LS74))
+      (sheetpath (names /) (tstamps /))
+      (tstamp 593C2A48))
+    (comp (ref C5)
+      (value 100nF)
+      (footprint Capacitors_THT:C_Disc_D4.7mm_W2.5mm_P5.00mm)
+      (libsource (lib device) (part C))
+      (sheetpath (names /) (tstamps /))
+      (tstamp 593C7AE0))
+    (comp (ref J2)
+      (value CONN_02X04)
+      (footprint Pin_Headers:Pin_Header_Straight_2x04_Pitch2.54mm)
+      (libsource (lib conn) (part CONN_02X04))
+      (sheetpath (names /) (tstamps /))
+      (tstamp 593CC468))
+    (comp (ref D1)
+      (value Power)
+      (footprint LEDs:LED_D5.0mm)
+      (libsource (lib device) (part LED))
+      (sheetpath (names /) (tstamps /))
+      (tstamp 593CDC46))
+    (comp (ref R4)
+      (value 330)
+      (footprint Resistors_THT:R_Axial_DIN0207_L6.3mm_D2.5mm_P10.16mm_Horizontal)
+      (libsource (lib device) (part R))
+      (sheetpath (names /) (tstamps /))
+      (tstamp 593CE753)))
   (libparts
     (libpart (lib 74xx) (part 74LS04)
       (description "Hex Inverseur")
@@ -114,6 +138,29 @@
         (pin (num 12) (name ~) (type output))
         (pin (num 13) (name ~) (type input))
         (pin (num 14) (name VCC) (type power_in))))
+    (libpart (lib 74xx) (part 74LS74)
+      (aliases
+        (alias 74HC74))
+      (description "Dual D FlipFlop, Set & Reset")
+      (docs 74xx/74hc_hct74.pdf)
+      (fields
+        (field (name Reference) U)
+        (field (name Value) 74LS74))
+      (pins
+        (pin (num 1) (name Cd) (type input))
+        (pin (num 2) (name D) (type input))
+        (pin (num 3) (name Cp) (type input))
+        (pin (num 4) (name Sd) (type input))
+        (pin (num 5) (name Q) (type output))
+        (pin (num 6) (name ~Q) (type output))
+        (pin (num 7) (name GND) (type power_in))
+        (pin (num 8) (name ~Q) (type output))
+        (pin (num 9) (name Q) (type output))
+        (pin (num 10) (name Sd) (type input))
+        (pin (num 11) (name Cp) (type input))
+        (pin (num 12) (name D) (type input))
+        (pin (num 13) (name Cd) (type input))
+        (pin (num 14) (name VCC) (type power_in))))
     (libpart (lib device) (part C)
       (description "Unpolarized capacitor")
       (footprints
@@ -124,19 +171,6 @@
       (pins
         (pin (num 1) (name ~) (type passive))
         (pin (num 2) (name ~) (type passive))))
-    (libpart (lib conn) (part CONN_01X02)
-      (description "Connector, single row, 01x02, pin header")
-      (footprints
-        (fp Pin_Header_Straight_1X*)
-        (fp Pin_Header_Angled_1X*)
-        (fp Socket_Strip_Straight_1X*)
-        (fp Socket_Strip_Angled_1X*))
-      (fields
-        (field (name Reference) J)
-        (field (name Value) CONN_01X02))
-      (pins
-        (pin (num 1) (name P1) (type passive))
-        (pin (num 2) (name P2) (type passive))))
     (libpart (lib conn) (part CONN_01X39)
       (description "Connector, single row, 01x39, pin header")
       (footprints
@@ -187,6 +221,26 @@
         (pin (num 37) (name P37) (type passive))
         (pin (num 38) (name P38) (type passive))
         (pin (num 39) (name P39) (type passive))))
+    (libpart (lib conn) (part CONN_02X04)
+      (description "Connector, double row, 02x04, pin header")
+      (footprints
+        (fp Pin_Header_Straight_2X*)
+        (fp Pin_Header_Angled_2X*)
+        (fp Socket_Strip_Straight_2X*)
+        (fp Socket_Strip_Angled_2X*)
+        (fp IDC_Header_Straight_*))
+      (fields
+        (field (name Reference) J)
+        (field (name Value) CONN_02X04))
+      (pins
+        (pin (num 1) (name P1) (type passive))
+        (pin (num 2) (name P2) (type passive))
+        (pin (num 3) (name P3) (type passive))
+        (pin (num 4) (name P4) (type passive))
+        (pin (num 5) (name P5) (type passive))
+        (pin (num 6) (name P6) (type passive))
+        (pin (num 7) (name P7) (type passive))
+        (pin (num 8) (name P8) (type passive))))
     (libpart (lib device) (part CP)
       (description "Polarised capacitor")
       (footprints
@@ -215,6 +269,16 @@
         (pin (num 7) (name GND) (type power_in))
         (pin (num 8) (name OUT) (type output))
         (pin (num 14) (name Vcc) (type power_in))))
+    (libpart (lib device) (part LED)
+      (description "LED generic")
+      (footprints
+        (fp LED*))
+      (fields
+        (field (name Reference) D)
+        (field (name Value) LED))
+      (pins
+        (pin (num 1) (name K) (type passive))
+        (pin (num 2) (name A) (type passive))))
     (libpart (lib linear) (part LM555N)
       (aliases
         (alias NE555)
@@ -262,134 +326,181 @@
         (pin (num 1) (name A) (type input))
         (pin (num 2) (name B) (type input)))))
   (libraries
+    (library (logical device)
+      (uri "C:\\Program Files\\KiCad\\share\\kicad\\library\\device.lib"))
+    (library (logical linear)
+      (uri "C:\\Program Files\\KiCad\\share\\kicad\\library\\linear.lib"))
     (library (logical 74xx)
       (uri "C:\\Program Files\\KiCad\\share\\kicad\\library\\74xx.lib"))
-    (library (logical conn)
-      (uri "C:\\Program Files\\KiCad\\share\\kicad\\library\\conn.lib"))
     (library (logical switches)
       (uri "C:\\Program Files\\KiCad\\share\\kicad\\library\\switches.lib"))
     (library (logical Oscillators)
       (uri "C:\\Program Files\\KiCad\\share\\kicad\\library\\Oscillators.lib"))
-    (library (logical linear)
-      (uri "C:\\Program Files\\KiCad\\share\\kicad\\library\\linear.lib"))
-    (library (logical device)
-      (uri "C:\\Program Files\\KiCad\\share\\kicad\\library\\device.lib")))
+    (library (logical conn)
+      (uri "C:\\Program Files\\KiCad\\share\\kicad\\library\\conn.lib")))
   (nets
     (net (code 1) (name "Net-(U1-Pad3)")
       (node (ref U2) (pin 1))
       (node (ref U1) (pin 3)))
-    (net (code 2) (name RESET)
-      (node (ref R3) (pin 1))
-      (node (ref U2) (pin 2))
-      (node (ref J1) (pin 20)))
-    (net (code 3) (name "Net-(J2-Pad2)")
-      (node (ref J2) (pin 2))
-      (node (ref X1) (pin 14)))
-    (net (code 4) (name "Net-(J1-Pad1)")
-      (node (ref J1) (pin 1)))
-    (net (code 5) (name "Net-(J1-Pad2)")
-      (node (ref J1) (pin 2)))
-    (net (code 6) (name "Net-(J1-Pad3)")
-      (node (ref J1) (pin 3)))
-    (net (code 7) (name "Net-(J1-Pad4)")
-      (node (ref J1) (pin 4)))
-    (net (code 8) (name "Net-(J1-Pad5)")
-      (node (ref J1) (pin 5)))
-    (net (code 9) (name "Net-(C2-Pad1)")
+    (net (code 2) (name "Net-(C2-Pad1)")
+      (node (ref U1) (pin 7))
       (node (ref C2) (pin 1))
       (node (ref U1) (pin 6))
-      (node (ref U1) (pin 7))
       (node (ref R2) (pin 2)))
-    (net (code 10) (name "Net-(J1-Pad38)")
-      (node (ref J1) (pin 38)))
-    (net (code 11) (name "Net-(J1-Pad25)")
-      (node (ref J1) (pin 25)))
-    (net (code 12) (name "Net-(J1-Pad35)")
-      (node (ref J1) (pin 35)))
-    (net (code 13) (name "Net-(J1-Pad16)")
-      (node (ref J1) (pin 16)))
-    (net (code 14) (name "Net-(J1-Pad26)")
-      (node (ref J1) (pin 26)))
-    (net (code 15) (name "Net-(J1-Pad36)")
-      (node (ref J1) (pin 36)))
-    (net (code 16) (name "Net-(J1-Pad27)")
-      (node (ref J1) (pin 27)))
-    (net (code 17) (name "Net-(J1-Pad37)")
-      (node (ref J1) (pin 37)))
-    (net (code 18) (name "Net-(J1-Pad28)")
-      (node (ref J1) (pin 28)))
-    (net (code 19) (name "Net-(J1-Pad15)")
-      (node (ref J1) (pin 15)))
-    (net (code 20) (name "Net-(J1-Pad19)")
-      (node (ref J1) (pin 19)))
-    (net (code 21) (name "Net-(J1-Pad29)")
-      (node (ref J1) (pin 29)))
-    (net (code 22) (name "Net-(J1-Pad39)")
-      (node (ref J1) (pin 39)))
-    (net (code 23) (name VCC)
-      (node (ref R3) (pin 2))
-      (node (ref U1) (pin 8))
-      (node (ref J2) (pin 1))
-      (node (ref U2) (pin 14))
-      (node (ref U1) (pin 4))
-      (node (ref R2) (pin 1))
-      (node (ref C3) (pin 1))
-      (node (ref R1) (pin 1))
+    (net (code 3) (name CLOCK/4)
+      (node (ref U3) (pin 9))
+      (node (ref J2) (pin 7)))
+    (net (code 4) (name CLOCK/2)
+      (node (ref J2) (pin 5))
+      (node (ref U3) (pin 5)))
+    (net (code 5) (name CLOCK)
+      (node (ref J2) (pin 4))
+      (node (ref J1) (pin 21))
+      (node (ref J2) (pin 6))
+      (node (ref J2) (pin 8)))
+    (net (code 6) (name "Net-(D1-Pad2)")
+      (node (ref D1) (pin 2))
+      (node (ref R4) (pin 2)))
+    (net (code 7) (name "Net-(J2-Pad1)")
+      (node (ref X1) (pin 14))
+      (node (ref J2) (pin 1)))
+    (net (code 8) (name VCC)
+      (node (ref U3) (pin 14))
+      (node (ref U3) (pin 1))
       (node (ref C4) (pin 1))
-      (node (ref J1) (pin 18)))
-    (net (code 24) (name GND)
-      (node (ref J1) (pin 17))
-      (node (ref X1) (pin 7))
-      (node (ref C1) (pin 2))
-      (node (ref C3) (pin 2))
-      (node (ref C4) (pin 2))
-      (node (ref U2) (pin 7))
-      (node (ref U1) (pin 1))
-      (node (ref SW1) (pin 1))
-      (node (ref C2) (pin 2)))
-    (net (code 25) (name "Net-(J1-Pad31)")
-      (node (ref J1) (pin 31)))
-    (net (code 26) (name "Net-(J1-Pad6)")
-      (node (ref J1) (pin 6)))
-    (net (code 27) (name "Net-(J1-Pad7)")
-      (node (ref J1) (pin 7)))
-    (net (code 28) (name "Net-(J1-Pad8)")
-      (node (ref J1) (pin 8)))
-    (net (code 29) (name "Net-(J1-Pad9)")
-      (node (ref J1) (pin 9)))
-    (net (code 30) (name "Net-(J1-Pad10)")
-      (node (ref J1) (pin 10)))
-    (net (code 31) (name "Net-(J1-Pad30)")
-      (node (ref J1) (pin 30)))
-    (net (code 32) (name "Net-(J1-Pad11)")
-      (node (ref J1) (pin 11)))
-    (net (code 33) (name "Net-(J1-Pad12)")
-      (node (ref J1) (pin 12)))
-    (net (code 34) (name "Net-(J1-Pad22)")
-      (node (ref J1) (pin 22)))
-    (net (code 35) (name "Net-(J1-Pad32)")
-      (node (ref J1) (pin 32)))
-    (net (code 36) (name "Net-(J1-Pad13)")
-      (node (ref J1) (pin 13)))
-    (net (code 37) (name "Net-(J1-Pad23)")
-      (node (ref J1) (pin 23)))
-    (net (code 38) (name "Net-(J1-Pad33)")
-      (node (ref J1) (pin 33)))
-    (net (code 39) (name "Net-(J1-Pad14)")
-      (node (ref J1) (pin 14)))
-    (net (code 40) (name "Net-(J1-Pad24)")
-      (node (ref J1) (pin 24)))
-    (net (code 41) (name "Net-(J1-Pad34)")
-      (node (ref J1) (pin 34)))
-    (net (code 42) (name "Net-(U1-Pad5)")
-      (node (ref U1) (pin 5)))
-    (net (code 43) (name "Net-(C1-Pad1)")
-      (node (ref U1) (pin 2))
+      (node (ref R2) (pin 1))
+      (node (ref U2) (pin 14))
+      (node (ref R3) (pin 2))
+      (node (ref U3) (pin 4))
+      (node (ref U3) (pin 13))
+      (node (ref J1) (pin 18))
+      (node (ref U3) (pin 10))
+      (node (ref J2) (pin 2))
+      (node (ref R4) (pin 1))
+      (node (ref U1) (pin 4))
+      (node (ref U1) (pin 8))
+      (node (ref C5) (pin 1))
+      (node (ref C3) (pin 1))
+      (node (ref R1) (pin 1)))
+    (net (code 9) (name "Net-(C1-Pad1)")
       (node (ref SW1) (pin 2))
+      (node (ref U1) (pin 2))
       (node (ref R1) (pin 2))
       (node (ref C1) (pin 1)))
-    (net (code 44) (name "Net-(X1-Pad1)")
+    (net (code 10) (name "Net-(U2-Pad10)")
+      (node (ref U2) (pin 10)))
+    (net (code 11) (name GND)
+      (node (ref SW1) (pin 1))
+      (node (ref U1) (pin 1))
+      (node (ref C3) (pin 2))
+      (node (ref C1) (pin 2))
+      (node (ref U2) (pin 7))
+      (node (ref C2) (pin 2))
+      (node (ref U3) (pin 7))
+      (node (ref C4) (pin 2))
+      (node (ref X1) (pin 7))
+      (node (ref U2) (pin 11))
+      (node (ref U2) (pin 9))
+      (node (ref U2) (pin 5))
+      (node (ref C5) (pin 2))
+      (node (ref D1) (pin 1))
+      (node (ref J1) (pin 17))
+      (node (ref U2) (pin 3))
+      (node (ref U2) (pin 13)))
+    (net (code 12) (name "Net-(U2-Pad8)")
+      (node (ref U2) (pin 8)))
+    (net (code 13) (name "Net-(U2-Pad6)")
+      (node (ref U2) (pin 6)))
+    (net (code 14) (name "Net-(U2-Pad12)")
+      (node (ref U2) (pin 12)))
+    (net (code 15) (name "Net-(U2-Pad4)")
+      (node (ref U2) (pin 4)))
+    (net (code 16) (name "Net-(U3-Pad12)")
+      (node (ref U3) (pin 8))
+      (node (ref U3) (pin 12)))
+    (net (code 17) (name "Net-(U3-Pad11)")
+      (node (ref U3) (pin 2))
+      (node (ref U3) (pin 6))
+      (node (ref U3) (pin 11)))
+    (net (code 18) (name "Net-(J1-Pad13)")
+      (node (ref J1) (pin 13)))
+    (net (code 19) (name "Net-(J1-Pad25)")
+      (node (ref J1) (pin 25)))
+    (net (code 20) (name "Net-(J1-Pad24)")
+      (node (ref J1) (pin 24)))
+    (net (code 21) (name "Net-(J1-Pad23)")
+      (node (ref J1) (pin 23)))
+    (net (code 22) (name "Net-(J1-Pad22)")
+      (node (ref J1) (pin 22)))
+    (net (code 23) (name "Net-(J1-Pad19)")
+      (node (ref J1) (pin 19)))
+    (net (code 24) (name "Net-(J1-Pad16)")
+      (node (ref J1) (pin 16)))
+    (net (code 25) (name "Net-(J1-Pad15)")
+      (node (ref J1) (pin 15)))
+    (net (code 26) (name "Net-(J1-Pad14)")
+      (node (ref J1) (pin 14)))
+    (net (code 27) (name "Net-(J1-Pad26)")
+      (node (ref J1) (pin 26)))
+    (net (code 28) (name "Net-(J1-Pad12)")
+      (node (ref J1) (pin 12)))
+    (net (code 29) (name "Net-(J1-Pad11)")
+      (node (ref J1) (pin 11)))
+    (net (code 30) (name "Net-(J1-Pad10)")
+      (node (ref J1) (pin 10)))
+    (net (code 31) (name "Net-(J1-Pad9)")
+      (node (ref J1) (pin 9)))
+    (net (code 32) (name "Net-(J1-Pad8)")
+      (node (ref J1) (pin 8)))
+    (net (code 33) (name "Net-(J1-Pad7)")
+      (node (ref J1) (pin 7)))
+    (net (code 34) (name "Net-(J1-Pad6)")
+      (node (ref J1) (pin 6)))
+    (net (code 35) (name "Net-(J1-Pad5)")
+      (node (ref J1) (pin 5)))
+    (net (code 36) (name "Net-(J1-Pad35)")
+      (node (ref J1) (pin 35)))
+    (net (code 37) (name "Net-(X1-Pad1)")
       (node (ref X1) (pin 1)))
-    (net (code 45) (name CLOCK)
-      (node (ref J1) (pin 21))
-      (node (ref X1) (pin 8)))))
\ No newline at end of file
+    (net (code 38) (name "Net-(J1-Pad39)")
+      (node (ref J1) (pin 39)))
+    (net (code 39) (name "Net-(J1-Pad38)")
+      (node (ref J1) (pin 38)))
+    (net (code 40) (name "Net-(J1-Pad37)")
+      (node (ref J1) (pin 37)))
+    (net (code 41) (name "Net-(J1-Pad36)")
+      (node (ref J1) (pin 36)))
+    (net (code 42) (name "Net-(J1-Pad4)")
+      (node (ref J1) (pin 4)))
+    (net (code 43) (name "Net-(J1-Pad34)")
+      (node (ref J1) (pin 34)))
+    (net (code 44) (name "Net-(J1-Pad33)")
+      (node (ref J1) (pin 33)))
+    (net (code 45) (name "Net-(J1-Pad32)")
+      (node (ref J1) (pin 32)))
+    (net (code 46) (name "Net-(J1-Pad31)")
+      (node (ref J1) (pin 31)))
+    (net (code 47) (name "Net-(J1-Pad30)")
+      (node (ref J1) (pin 30)))
+    (net (code 48) (name "Net-(J1-Pad29)")
+      (node (ref J1) (pin 29)))
+    (net (code 49) (name "Net-(J1-Pad28)")
+      (node (ref J1) (pin 28)))
+    (net (code 50) (name "Net-(J1-Pad27)")
+      (node (ref J1) (pin 27)))
+    (net (code 51) (name "Net-(U1-Pad5)")
+      (node (ref U1) (pin 5)))
+    (net (code 52) (name "Net-(J1-Pad3)")
+      (node (ref J1) (pin 3)))
+    (net (code 53) (name "Net-(J1-Pad2)")
+      (node (ref J1) (pin 2)))
+    (net (code 54) (name "Net-(J1-Pad1)")
+      (node (ref J1) (pin 1)))
+    (net (code 55) (name CLOCK/1)
+      (node (ref J2) (pin 3))
+      (node (ref U3) (pin 3))
+      (node (ref X1) (pin 8)))
+    (net (code 56) (name RESET)
+      (node (ref U2) (pin 2))
+      (node (ref J1) (pin 20))
+      (node (ref R3) (pin 1)))))
\ No newline at end of file
diff --git a/RC6502 Reset Circuit/Reset circuit.pro b/RC6502 Reset Circuit/Reset circuit.pro
index e0f4b7e..477fc80 100644
--- a/RC6502 Reset Circuit/Reset circuit.pro	
+++ b/RC6502 Reset Circuit/Reset circuit.pro	
@@ -1,4 +1,4 @@
-update=31/05/2017 01:09:11
+update=10/06/2017 19:55:35
 version=1
 last_client=kicad
 [pcbnew]
diff --git a/RC6502 Reset Circuit/Reset circuit.sch b/RC6502 Reset Circuit/Reset circuit.sch
index ab4cb48..67f1877 100644
--- a/RC6502 Reset Circuit/Reset circuit.sch	
+++ b/RC6502 Reset Circuit/Reset circuit.sch	
@@ -48,7 +48,7 @@ Comment4 ""
 $EndDescr
 Text GLabel 10250 3250 0    60   Input ~ 0
 GND
-Text GLabel 10250 3350 0    60   Input ~ 0
+Text GLabel 10250 3350 0    60   Output ~ 0
 VCC
 Text GLabel 10250 3550 0    60   Input ~ 0
 RESET
@@ -65,7 +65,7 @@ F 3 "" H 7100 3375 50  0001 C CNN
 $EndComp
 Text GLabel 7100 2525 1    60   Input ~ 0
 VCC
-Text GLabel 7100 4250 3    60   Input ~ 0
+Text GLabel 7100 4250 3    60   Output ~ 0
 GND
 $Comp
 L R R1
@@ -84,7 +84,7 @@ U 1 1 5909CD8B
 P 6100 3825
 F 0 "C1" H 6125 3925 50  0000 L CNN
 F 1 "100nF" H 6125 3725 50  0000 L CNN
-F 2 "Capacitors_THT:C_Disc_D3.0mm_W1.6mm_P2.50mm" H 6138 3675 50  0001 C CNN
+F 2 "Capacitors_THT:C_Disc_D4.7mm_W2.5mm_P5.00mm" H 6138 3675 50  0001 C CNN
 F 3 "" H 6100 3825 50  0001 C CNN
 	1    6100 3825
 	1    0    0    -1  
@@ -95,7 +95,7 @@ U 1 1 5909D33C
 P 8400 3225
 F 0 "C3" H 8425 3325 50  0000 L CNN
 F 1 "100nF" H 8425 3125 50  0000 L CNN
-F 2 "Capacitors_THT:C_Disc_D3.0mm_W1.6mm_P2.50mm" H 8438 3075 50  0001 C CNN
+F 2 "Capacitors_THT:C_Disc_D4.7mm_W2.5mm_P5.00mm" H 8438 3075 50  0001 C CNN
 F 3 "" H 8400 3225 50  0001 C CNN
 	1    8400 3225
 	1    0    0    -1  
@@ -127,7 +127,7 @@ L 74LS04 U2
 U 1 1 5909E441
 P 8175 1800
 F 0 "U2" H 8370 1915 50  0000 C CNN
-F 1 "74LS04" H 8365 1675 50  0000 C CNN
+F 1 "74HCT04" H 8365 1675 50  0000 C CNN
 F 2 "Housings_DIP:DIP-14_W7.62mm" H 8175 1800 50  0001 C CNN
 F 3 "" H 8175 1800 50  0001 C CNN
 	1    8175 1800
@@ -204,21 +204,109 @@ F 3 "" H 4175 3400 50  0001 C CNN
 	1    4275 3400
 	1    0    0    -1  
 $EndComp
-$Comp
-L CONN_01X02 J2
-U 1 1 590A1B9F
-P 5000 2850
-F 0 "J2" H 5000 3000 50  0000 C CNN
-F 1 "XTAL Enable" V 5100 2850 50  0000 C CNN
-F 2 "Pin_Headers:Pin_Header_Angled_1x02_Pitch2.54mm" H 5000 2850 50  0001 C CNN
-F 3 "" H 5000 2850 50  0001 C CNN
-	1    5000 2850
-	0    1    1    0   
-$EndComp
-Text GLabel 4575 3400 2    60   Input ~ 0
-CLOCK
+Text GLabel 4700 3400 2    60   Output ~ 0
+CLOCK/1
 Text GLabel 10250 3650 0    60   Input ~ 0
 CLOCK
+$Comp
+L CONN_01X39 J1
+U 1 1 590BF97A
+P 10450 3550
+F 0 "J1" H 10450 5550 50  0000 C CNN
+F 1 "CONN_01X39" V 10550 3550 50  0000 C CNN
+F 2 "Pin_Headers:Pin_Header_Angled_1x39_Pitch2.54mm" H 10450 3550 50  0001 C CNN
+F 3 "" H 10450 3550 50  0001 C CNN
+	1    10450 3550
+	1    0    0    -1  
+$EndComp
+Text GLabel 1100 1850 3    60   Output ~ 0
+GND
+Text GLabel 1100 1100 1    60   Input ~ 0
+VCC
+$Comp
+L C C4
+U 1 1 591A9FB0
+P 1100 1475
+F 0 "C4" H 1125 1575 50  0000 L CNN
+F 1 "100nF" H 1125 1375 50  0000 L CNN
+F 2 "Capacitors_THT:C_Disc_D4.7mm_W2.5mm_P5.00mm" H 1138 1325 50  0001 C CNN
+F 3 "" H 1100 1475 50  0001 C CNN
+	1    1100 1475
+	1    0    0    -1  
+$EndComp
+$Comp
+L 74LS74 U3
+U 1 1 593C2A48
+P 2025 6700
+F 0 "U3" H 2175 7000 50  0000 C CNN
+F 1 "74HCT74" H 2325 6405 50  0000 C CNN
+F 2 "Housings_DIP:DIP-14_W7.62mm_Socket" H 2025 6700 50  0001 C CNN
+F 3 "" H 2025 6700 50  0001 C CNN
+	1    2025 6700
+	1    0    0    -1  
+$EndComp
+$Comp
+L 74LS74 U3
+U 2 1 593C2BAB
+P 3650 6700
+F 0 "U3" H 3800 7000 50  0000 C CNN
+F 1 "74HCT74" H 3950 6405 50  0000 C CNN
+F 2 "Housings_DIP:DIP-14_W7.62mm_Socket" H 3650 6700 50  0001 C CNN
+F 3 "" H 3650 6700 50  0001 C CNN
+	2    3650 6700
+	1    0    0    -1  
+$EndComp
+Text GLabel 5550 2850 2    60   Output ~ 0
+CLOCK
+Text GLabel 4900 2750 0    60   Input ~ 0
+CLOCK/1
+Text GLabel 1425 6700 0    60   Input ~ 0
+CLOCK/1
+Text GLabel 4900 2850 0    60   Input ~ 0
+CLOCK/2
+Text GLabel 4900 2950 0    60   Input ~ 0
+CLOCK/4
+Text GLabel 2625 6275 1    60   Output ~ 0
+CLOCK/2
+Text GLabel 4250 6250 1    60   Output ~ 0
+CLOCK/4
+Text GLabel 2025 5450 1    60   Input ~ 0
+VCC
+Text GLabel 4725 6900 1    60   Input ~ 0
+VCC
+$Comp
+L C C5
+U 1 1 593C7AE0
+P 1500 1475
+F 0 "C5" H 1525 1575 50  0000 L CNN
+F 1 "100nF" H 1525 1375 50  0000 L CNN
+F 2 "Capacitors_THT:C_Disc_D4.7mm_W2.5mm_P5.00mm" H 1538 1325 50  0001 C CNN
+F 3 "" H 1500 1475 50  0001 C CNN
+	1    1500 1475
+	1    0    0    -1  
+$EndComp
+$Comp
+L CONN_02X04 J2
+U 1 1 593CC468
+P 5150 2800
+F 0 "J2" H 5150 3050 50  0000 C CNN
+F 1 "CONN_02X04" H 5150 2550 50  0000 C CNN
+F 2 "Pin_Headers:Pin_Header_Straight_2x04_Pitch2.54mm" H 5150 1600 50  0001 C CNN
+F 3 "" H 5150 1600 50  0001 C CNN
+	1    5150 2800
+	1    0    0    -1  
+$EndComp
+$Comp
+L LED D1
+U 1 1 593CDC46
+P 2275 1725
+F 0 "D1" H 2275 1825 50  0000 C CNN
+F 1 "Power" H 2275 1625 50  0000 C CNN
+F 2 "LEDs:LED_D5.0mm" H 2275 1725 50  0001 C CNN
+F 3 "" H 2275 1725 50  0001 C CNN
+	1    2275 1725
+	0    -1   -1   0   
+$EndComp
 Wire Wire Line
 	7100 2525 7100 2975
 Wire Wire Line
@@ -238,7 +326,7 @@ Connection ~ 6100 4150
 Wire Wire Line
 	6600 3575 6450 3575
 Wire Wire Line
-	6450 3575 6450 2650
+	6450 2650 6450 3575
 Connection ~ 6450 2650
 Wire Wire Line
 	8400 2650 8400 3075
@@ -289,39 +377,171 @@ Wire Wire Line
 Connection ~ 5650 4150
 Connection ~ 6100 2650
 Wire Wire Line
-	5050 2650 8400 2650
-Wire Wire Line
-	4950 2650 4275 2650
+	5400 2650 8400 2650
 Wire Wire Line
 	4275 2650 4275 3100
-$Comp
-L CONN_01X39 J1
-U 1 1 590BF97A
-P 10450 3550
-F 0 "J1" H 10450 5550 50  0000 C CNN
-F 1 "CONN_01X39" V 10550 3550 50  0000 C CNN
-F 2 "Pin_Headers:Pin_Header_Angled_1x39_Pitch2.54mm" H 10450 3550 50  0001 C CNN
-F 3 "" H 10450 3550 50  0001 C CNN
-	1    10450 3550
-	1    0    0    -1  
-$EndComp
-Text GLabel 1100 1850 3    60   Output ~ 0
-GND
-Text GLabel 1100 1100 1    60   Input ~ 0
-VCC
-$Comp
-L C C4
-U 1 1 591A9FB0
-P 1100 1475
-F 0 "C4" H 1125 1575 50  0000 L CNN
-F 1 "100nF" H 1125 1375 50  0000 L CNN
-F 2 "Capacitors_THT:C_Disc_D3.0mm_W1.6mm_P2.50mm" H 1138 1325 50  0001 C CNN
-F 3 "" H 1100 1475 50  0001 C CNN
-	1    1100 1475
-	1    0    0    -1  
-$EndComp
 Wire Wire Line
-	1100 1325 1100 1100
+	1100 1100 1100 1325
 Wire Wire Line
 	1100 1625 1100 1850
+Wire Wire Line
+	5400 2850 5550 2850
+Wire Wire Line
+	5475 2950 5400 2950
+Wire Wire Line
+	5475 2750 5475 2950
+Connection ~ 5475 2850
+Wire Wire Line
+	5400 2750 5475 2750
+Wire Wire Line
+	2625 6500 2625 6275
+Wire Wire Line
+	4250 6250 4250 6500
+Wire Wire Line
+	2625 6900 2875 6900
+Wire Wire Line
+	2875 6900 2875 6700
+Wire Wire Line
+	2875 6700 3050 6700
+Wire Wire Line
+	1425 6500 875  6500
+Wire Wire Line
+	875  6500 875  7325
+Wire Wire Line
+	875  7325 2675 7325
+Wire Wire Line
+	2675 7325 2675 6900
+Connection ~ 2675 6900
+Wire Wire Line
+	3050 6500 2975 6500
+Wire Wire Line
+	2975 6500 2975 7325
+Wire Wire Line
+	2975 7325 4250 7325
+Wire Wire Line
+	4250 7325 4250 6900
+Wire Wire Line
+	2025 5450 2025 6150
+Connection ~ 2025 5650
+Wire Wire Line
+	3650 7250 3650 7475
+Wire Wire Line
+	2025 7250 2025 7475
+Wire Wire Line
+	3650 6150 3650 5650
+Wire Wire Line
+	3650 5650 2025 5650
+Wire Wire Line
+	2025 7475 4725 7475
+Wire Wire Line
+	4725 7475 4725 6900
+Connection ~ 3650 7475
+Wire Wire Line
+	1100 1225 1500 1225
+Wire Wire Line
+	1500 1225 1500 1325
+Connection ~ 1100 1225
+Wire Wire Line
+	1500 1625 1500 1750
+Wire Wire Line
+	1500 1750 1100 1750
+Connection ~ 1100 1750
+Wire Wire Line
+	4575 3400 4700 3400
+Wire Wire Line
+	4900 2650 4275 2650
+$Comp
+L R R4
+U 1 1 593CE753
+P 2275 1350
+F 0 "R4" V 2355 1350 50  0000 C CNN
+F 1 "330" V 2275 1350 50  0000 C CNN
+F 2 "Resistors_THT:R_Axial_DIN0207_L6.3mm_D2.5mm_P10.16mm_Horizontal" V 2205 1350 50  0001 C CNN
+F 3 "" H 2275 1350 50  0001 C CNN
+	1    2275 1350
+	1    0    0    -1  
+$EndComp
+Text GLabel 2275 1075 1    60   Input ~ 0
+VCC
+Text GLabel 2275 2000 3    60   Output ~ 0
+GND
+Wire Wire Line
+	2275 1075 2275 1200
+Wire Wire Line
+	2275 1500 2275 1575
+Wire Wire Line
+	2275 1875 2275 2000
+$Comp
+L 74LS04 U2
+U 2 1 593CF341
+P 10925 975
+F 0 "U2" H 11120 1090 50  0000 C CNN
+F 1 "74HCT04" H 11115 850 50  0000 C CNN
+F 2 "Housings_DIP:DIP-14_W7.62mm" H 10925 975 50  0001 C CNN
+F 3 "" H 10925 975 50  0001 C CNN
+	2    10925 975 
+	0    -1   -1   0   
+$EndComp
+$Comp
+L 74LS04 U2
+U 3 1 593CF3C4
+P 10500 975
+F 0 "U2" H 10695 1090 50  0000 C CNN
+F 1 "74HCT04" H 10690 850 50  0000 C CNN
+F 2 "Housings_DIP:DIP-14_W7.62mm" H 10500 975 50  0001 C CNN
+F 3 "" H 10500 975 50  0001 C CNN
+	3    10500 975 
+	0    -1   -1   0   
+$EndComp
+$Comp
+L 74LS04 U2
+U 4 1 593CF44E
+P 10075 975
+F 0 "U2" H 10270 1090 50  0000 C CNN
+F 1 "74HCT04" H 10265 850 50  0000 C CNN
+F 2 "Housings_DIP:DIP-14_W7.62mm" H 10075 975 50  0001 C CNN
+F 3 "" H 10075 975 50  0001 C CNN
+	4    10075 975 
+	0    -1   -1   0   
+$EndComp
+$Comp
+L 74LS04 U2
+U 5 1 593CF4D7
+P 9650 975
+F 0 "U2" H 9845 1090 50  0000 C CNN
+F 1 "74HCT04" H 9840 850 50  0000 C CNN
+F 2 "Housings_DIP:DIP-14_W7.62mm" H 9650 975 50  0001 C CNN
+F 3 "" H 9650 975 50  0001 C CNN
+	5    9650 975 
+	0    -1   -1   0   
+$EndComp
+$Comp
+L 74LS04 U2
+U 6 1 593CF56B
+P 9225 975
+F 0 "U2" H 9420 1090 50  0000 C CNN
+F 1 "74HCT04" H 9415 850 50  0000 C CNN
+F 2 "Housings_DIP:DIP-14_W7.62mm" H 9225 975 50  0001 C CNN
+F 3 "" H 9225 975 50  0001 C CNN
+	6    9225 975 
+	0    -1   -1   0   
+$EndComp
+Wire Wire Line
+	9225 1425 10925 1425
+Connection ~ 9650 1425
+Connection ~ 10075 1425
+Connection ~ 10500 1425
+NoConn ~ 10925 525 
+NoConn ~ 10500 525 
+NoConn ~ 10075 525 
+NoConn ~ 9650 525 
+NoConn ~ 9225 525 
+Wire Wire Line
+	10925 1425 10925 1600
+Text GLabel 10925 1600 3    60   Input ~ 0
+GND
+Text Notes 7400 7500 0    60   ~ 0
+RC6502 Reset Circuit
+Text Notes 10575 7650 0    60   ~ 0
+B
 $EndSCHEMATC
diff --git a/RC6502 Reset Circuit/Reset circuit.xml b/RC6502 Reset Circuit/Reset circuit.xml
new file mode 100644
index 0000000..762e6a2
--- /dev/null
+++ b/RC6502 Reset Circuit/Reset circuit.xml	
@@ -0,0 +1,638 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<export version="D">
+  <design>
+    <source>D:/ownCloud/Documents/Projects/RC6502/RC6502 Reset Circuit/Reset circuit.sch</source>
+    <date>10/06/2017 19:54:17</date>
+    <tool>Eeschema 4.0.6</tool>
+    <sheet number="1" name="/" tstamps="/">
+      <title_block>
+        <title/>
+        <company/>
+        <rev/>
+        <date/>
+        <source>Reset circuit.sch</source>
+        <comment number="1" value=""/>
+        <comment number="2" value=""/>
+        <comment number="3" value=""/>
+        <comment number="4" value=""/>
+      </title_block>
+    </sheet>
+  </design>
+  <components>
+    <comp ref="U1">
+      <value>NE555</value>
+      <footprint>Housings_DIP:DIP-8_W7.62mm</footprint>
+      <libsource lib="linear" part="NE555"/>
+      <sheetpath names="/" tstamps="/"/>
+      <tstamp>590A44E3</tstamp>
+    </comp>
+    <comp ref="R1">
+      <value>1M</value>
+      <footprint>Resistors_THT:R_Axial_DIN0207_L6.3mm_D2.5mm_P10.16mm_Horizontal</footprint>
+      <libsource lib="device" part="R"/>
+      <sheetpath names="/" tstamps="/"/>
+      <tstamp>5909CC66</tstamp>
+    </comp>
+    <comp ref="C1">
+      <value>100nF</value>
+      <footprint>Capacitors_THT:C_Disc_D4.7mm_W2.5mm_P5.00mm</footprint>
+      <libsource lib="device" part="C"/>
+      <sheetpath names="/" tstamps="/"/>
+      <tstamp>5909CD8B</tstamp>
+    </comp>
+    <comp ref="C3">
+      <value>100nF</value>
+      <footprint>Capacitors_THT:C_Disc_D4.7mm_W2.5mm_P5.00mm</footprint>
+      <libsource lib="device" part="C"/>
+      <sheetpath names="/" tstamps="/"/>
+      <tstamp>5909D33C</tstamp>
+    </comp>
+    <comp ref="R2">
+      <value>47k</value>
+      <footprint>Resistors_THT:R_Axial_DIN0207_L6.3mm_D2.5mm_P10.16mm_Horizontal</footprint>
+      <libsource lib="device" part="R"/>
+      <sheetpath names="/" tstamps="/"/>
+      <tstamp>5909D4EB</tstamp>
+    </comp>
+    <comp ref="C2">
+      <value>10uF</value>
+      <footprint>Capacitors_THT:CP_Radial_D4.0mm_P2.00mm</footprint>
+      <libsource lib="device" part="CP"/>
+      <sheetpath names="/" tstamps="/"/>
+      <tstamp>5909D5AC</tstamp>
+    </comp>
+    <comp ref="U2">
+      <value>74HCT04</value>
+      <footprint>Housings_DIP:DIP-14_W7.62mm</footprint>
+      <libsource lib="74xx" part="74LS04"/>
+      <sheetpath names="/" tstamps="/"/>
+      <tstamp>5909E441</tstamp>
+    </comp>
+    <comp ref="SW1">
+      <value>RESET</value>
+      <footprint>Buttons_Switches_THT:SW_PUSH_6mm</footprint>
+      <libsource lib="switches" part="SW_SPST"/>
+      <sheetpath names="/" tstamps="/"/>
+      <tstamp>5909ECDD</tstamp>
+    </comp>
+    <comp ref="R3">
+      <value>1k</value>
+      <footprint>Resistors_THT:R_Axial_DIN0207_L6.3mm_D2.5mm_P10.16mm_Horizontal</footprint>
+      <libsource lib="device" part="R"/>
+      <sheetpath names="/" tstamps="/"/>
+      <tstamp>590A060A</tstamp>
+    </comp>
+    <comp ref="X1">
+      <value>1MHz</value>
+      <footprint>Oscillators:Oscillator_DIP-14</footprint>
+      <libsource lib="Oscillators" part="ACO-xxxMHz"/>
+      <sheetpath names="/" tstamps="/"/>
+      <tstamp>590A1756</tstamp>
+    </comp>
+    <comp ref="J1">
+      <value>CONN_01X39</value>
+      <footprint>Pin_Headers:Pin_Header_Angled_1x39_Pitch2.54mm</footprint>
+      <libsource lib="conn" part="CONN_01X39"/>
+      <sheetpath names="/" tstamps="/"/>
+      <tstamp>590BF97A</tstamp>
+    </comp>
+    <comp ref="C4">
+      <value>100nF</value>
+      <footprint>Capacitors_THT:C_Disc_D4.7mm_W2.5mm_P5.00mm</footprint>
+      <libsource lib="device" part="C"/>
+      <sheetpath names="/" tstamps="/"/>
+      <tstamp>591A9FB0</tstamp>
+    </comp>
+    <comp ref="U3">
+      <value>74HCT74</value>
+      <footprint>Housings_DIP:DIP-14_W7.62mm_Socket</footprint>
+      <libsource lib="74xx" part="74LS74"/>
+      <sheetpath names="/" tstamps="/"/>
+      <tstamp>593C2A48</tstamp>
+    </comp>
+    <comp ref="C5">
+      <value>100nF</value>
+      <footprint>Capacitors_THT:C_Disc_D4.7mm_W2.5mm_P5.00mm</footprint>
+      <libsource lib="device" part="C"/>
+      <sheetpath names="/" tstamps="/"/>
+      <tstamp>593C7AE0</tstamp>
+    </comp>
+    <comp ref="J2">
+      <value>CONN_02X04</value>
+      <footprint>Pin_Headers:Pin_Header_Straight_2x04_Pitch2.54mm</footprint>
+      <libsource lib="conn" part="CONN_02X04"/>
+      <sheetpath names="/" tstamps="/"/>
+      <tstamp>593CC468</tstamp>
+    </comp>
+    <comp ref="D1">
+      <value>Power</value>
+      <footprint>LEDs:LED_D5.0mm</footprint>
+      <libsource lib="device" part="LED"/>
+      <sheetpath names="/" tstamps="/"/>
+      <tstamp>593CDC46</tstamp>
+    </comp>
+    <comp ref="R4">
+      <value>330</value>
+      <footprint>Resistors_THT:R_Axial_DIN0207_L6.3mm_D2.5mm_P10.16mm_Horizontal</footprint>
+      <libsource lib="device" part="R"/>
+      <sheetpath names="/" tstamps="/"/>
+      <tstamp>593CE753</tstamp>
+    </comp>
+  </components>
+  <libparts>
+    <libpart lib="74xx" part="74LS04">
+      <description>Hex Inverseur</description>
+      <fields>
+        <field name="Reference">U</field>
+        <field name="Value">74LS04</field>
+      </fields>
+      <pins>
+        <pin num="1" name="~" type="input"/>
+        <pin num="2" name="~" type="output"/>
+        <pin num="3" name="~" type="input"/>
+        <pin num="4" name="~" type="output"/>
+        <pin num="5" name="~" type="input"/>
+        <pin num="6" name="~" type="output"/>
+        <pin num="7" name="GND" type="power_in"/>
+        <pin num="8" name="~" type="output"/>
+        <pin num="9" name="~" type="input"/>
+        <pin num="10" name="~" type="output"/>
+        <pin num="11" name="~" type="input"/>
+        <pin num="12" name="~" type="output"/>
+        <pin num="13" name="~" type="input"/>
+        <pin num="14" name="VCC" type="power_in"/>
+      </pins>
+    </libpart>
+    <libpart lib="74xx" part="74LS74">
+      <aliases>
+        <alias>74HC74</alias>
+      </aliases>
+      <description>Dual D FlipFlop, Set &amp; Reset</description>
+      <docs>74xx/74hc_hct74.pdf</docs>
+      <fields>
+        <field name="Reference">U</field>
+        <field name="Value">74LS74</field>
+      </fields>
+      <pins>
+        <pin num="1" name="Cd" type="input"/>
+        <pin num="2" name="D" type="input"/>
+        <pin num="3" name="Cp" type="input"/>
+        <pin num="4" name="Sd" type="input"/>
+        <pin num="5" name="Q" type="output"/>
+        <pin num="6" name="~Q" type="output"/>
+        <pin num="7" name="GND" type="power_in"/>
+        <pin num="8" name="~Q" type="output"/>
+        <pin num="9" name="Q" type="output"/>
+        <pin num="10" name="Sd" type="input"/>
+        <pin num="11" name="Cp" type="input"/>
+        <pin num="12" name="D" type="input"/>
+        <pin num="13" name="Cd" type="input"/>
+        <pin num="14" name="VCC" type="power_in"/>
+      </pins>
+    </libpart>
+    <libpart lib="device" part="C">
+      <description>Unpolarized capacitor</description>
+      <footprints>
+        <fp>C_*</fp>
+      </footprints>
+      <fields>
+        <field name="Reference">C</field>
+        <field name="Value">C</field>
+      </fields>
+      <pins>
+        <pin num="1" name="~" type="passive"/>
+        <pin num="2" name="~" type="passive"/>
+      </pins>
+    </libpart>
+    <libpart lib="conn" part="CONN_01X39">
+      <description>Connector, single row, 01x39, pin header</description>
+      <footprints>
+        <fp>Pin_Header_Straight_1X*</fp>
+        <fp>Pin_Header_Angled_1X*</fp>
+        <fp>Socket_Strip_Straight_1X*</fp>
+        <fp>Socket_Strip_Angled_1X*</fp>
+      </footprints>
+      <fields>
+        <field name="Reference">J</field>
+        <field name="Value">CONN_01X39</field>
+      </fields>
+      <pins>
+        <pin num="1" name="P1" type="passive"/>
+        <pin num="2" name="P2" type="passive"/>
+        <pin num="3" name="P3" type="passive"/>
+        <pin num="4" name="P4" type="passive"/>
+        <pin num="5" name="P5" type="passive"/>
+        <pin num="6" name="P6" type="passive"/>
+        <pin num="7" name="P7" type="passive"/>
+        <pin num="8" name="P8" type="passive"/>
+        <pin num="9" name="P9" type="passive"/>
+        <pin num="10" name="P10" type="passive"/>
+        <pin num="11" name="P11" type="passive"/>
+        <pin num="12" name="P12" type="passive"/>
+        <pin num="13" name="P13" type="passive"/>
+        <pin num="14" name="P14" type="passive"/>
+        <pin num="15" name="P15" type="passive"/>
+        <pin num="16" name="P16" type="passive"/>
+        <pin num="17" name="P17" type="passive"/>
+        <pin num="18" name="P18" type="passive"/>
+        <pin num="19" name="P19" type="passive"/>
+        <pin num="20" name="P20" type="passive"/>
+        <pin num="21" name="P21" type="passive"/>
+        <pin num="22" name="P22" type="passive"/>
+        <pin num="23" name="P23" type="passive"/>
+        <pin num="24" name="P24" type="passive"/>
+        <pin num="25" name="P25" type="passive"/>
+        <pin num="26" name="P26" type="passive"/>
+        <pin num="27" name="P27" type="passive"/>
+        <pin num="28" name="P28" type="passive"/>
+        <pin num="29" name="P29" type="passive"/>
+        <pin num="30" name="P30" type="passive"/>
+        <pin num="31" name="P31" type="passive"/>
+        <pin num="32" name="P32" type="passive"/>
+        <pin num="33" name="P33" type="passive"/>
+        <pin num="34" name="P34" type="passive"/>
+        <pin num="35" name="P35" type="passive"/>
+        <pin num="36" name="P36" type="passive"/>
+        <pin num="37" name="P37" type="passive"/>
+        <pin num="38" name="P38" type="passive"/>
+        <pin num="39" name="P39" type="passive"/>
+      </pins>
+    </libpart>
+    <libpart lib="conn" part="CONN_02X04">
+      <description>Connector, double row, 02x04, pin header</description>
+      <footprints>
+        <fp>Pin_Header_Straight_2X*</fp>
+        <fp>Pin_Header_Angled_2X*</fp>
+        <fp>Socket_Strip_Straight_2X*</fp>
+        <fp>Socket_Strip_Angled_2X*</fp>
+        <fp>IDC_Header_Straight_*</fp>
+      </footprints>
+      <fields>
+        <field name="Reference">J</field>
+        <field name="Value">CONN_02X04</field>
+      </fields>
+      <pins>
+        <pin num="1" name="P1" type="passive"/>
+        <pin num="2" name="P2" type="passive"/>
+        <pin num="3" name="P3" type="passive"/>
+        <pin num="4" name="P4" type="passive"/>
+        <pin num="5" name="P5" type="passive"/>
+        <pin num="6" name="P6" type="passive"/>
+        <pin num="7" name="P7" type="passive"/>
+        <pin num="8" name="P8" type="passive"/>
+      </pins>
+    </libpart>
+    <libpart lib="device" part="CP">
+      <description>Polarised capacitor</description>
+      <footprints>
+        <fp>CP_*</fp>
+      </footprints>
+      <fields>
+        <field name="Reference">C</field>
+        <field name="Value">CP</field>
+      </fields>
+      <pins>
+        <pin num="1" name="~" type="passive"/>
+        <pin num="2" name="~" type="passive"/>
+      </pins>
+    </libpart>
+    <libpart lib="Oscillators" part="DGOF5S3">
+      <aliases>
+        <alias>ACO-xxxMHz</alias>
+        <alias>GTXO-S14T</alias>
+        <alias>TCXO-14</alias>
+      </aliases>
+      <description>HCMOS Crystal Clock Oscillator, DIP14-style metal package</description>
+      <docs>http://www.conwin.com/datasheets/cx/cx030.pdf</docs>
+      <footprints>
+        <fp>Oscillator*DIP*14*</fp>
+      </footprints>
+      <fields>
+        <field name="Reference">X</field>
+        <field name="Value">DGOF5S3</field>
+        <field name="Footprint">Oscillators:Oscillator_DIP-14</field>
+      </fields>
+      <pins>
+        <pin num="1" name="NC" type="NotConnected"/>
+        <pin num="7" name="GND" type="power_in"/>
+        <pin num="8" name="OUT" type="output"/>
+        <pin num="14" name="Vcc" type="power_in"/>
+      </pins>
+    </libpart>
+    <libpart lib="device" part="LED">
+      <description>LED generic</description>
+      <footprints>
+        <fp>LED*</fp>
+      </footprints>
+      <fields>
+        <field name="Reference">D</field>
+        <field name="Value">LED</field>
+      </fields>
+      <pins>
+        <pin num="1" name="K" type="passive"/>
+        <pin num="2" name="A" type="passive"/>
+      </pins>
+    </libpart>
+    <libpart lib="linear" part="LM555N">
+      <aliases>
+        <alias>NE555</alias>
+        <alias>ICM7555</alias>
+        <alias>LMC555</alias>
+        <alias>TLC555</alias>
+        <alias>NA555</alias>
+        <alias>SE555</alias>
+        <alias>SA555</alias>
+      </aliases>
+      <description>555-series timer IC</description>
+      <docs>http://www.ti.com/lit/ds/symlink/ne555.pdf</docs>
+      <footprints>
+        <fp>SOIC*Pitch1.27mm*</fp>
+        <fp>DIP*W7.62mm*</fp>
+        <fp>TSSOP*Pitch0.65mm*</fp>
+      </footprints>
+      <fields>
+        <field name="Reference">U</field>
+        <field name="Value">LM555N</field>
+      </fields>
+      <pins>
+        <pin num="1" name="GND" type="power_in"/>
+        <pin num="2" name="TR" type="input"/>
+        <pin num="3" name="Q" type="output"/>
+        <pin num="4" name="R" type="input"/>
+        <pin num="5" name="CV" type="input"/>
+        <pin num="6" name="THR" type="input"/>
+        <pin num="7" name="DIS" type="input"/>
+        <pin num="8" name="VCC" type="power_in"/>
+      </pins>
+    </libpart>
+    <libpart lib="device" part="R">
+      <description>Resistor</description>
+      <footprints>
+        <fp>R_*</fp>
+        <fp>R_*</fp>
+      </footprints>
+      <fields>
+        <field name="Reference">R</field>
+        <field name="Value">R</field>
+      </fields>
+      <pins>
+        <pin num="1" name="~" type="passive"/>
+        <pin num="2" name="~" type="passive"/>
+      </pins>
+    </libpart>
+    <libpart lib="switches" part="SW_SPST">
+      <description>Single Pole Single Throw (SPST) switch</description>
+      <fields>
+        <field name="Reference">SW</field>
+        <field name="Value">SW_SPST</field>
+      </fields>
+      <pins>
+        <pin num="1" name="A" type="input"/>
+        <pin num="2" name="B" type="input"/>
+      </pins>
+    </libpart>
+  </libparts>
+  <libraries>
+    <library logical="device">
+      <uri>C:\Program Files\KiCad\share\kicad\library\device.lib</uri>
+    </library>
+    <library logical="linear">
+      <uri>C:\Program Files\KiCad\share\kicad\library\linear.lib</uri>
+    </library>
+    <library logical="74xx">
+      <uri>C:\Program Files\KiCad\share\kicad\library\74xx.lib</uri>
+    </library>
+    <library logical="switches">
+      <uri>C:\Program Files\KiCad\share\kicad\library\switches.lib</uri>
+    </library>
+    <library logical="Oscillators">
+      <uri>C:\Program Files\KiCad\share\kicad\library\Oscillators.lib</uri>
+    </library>
+    <library logical="conn">
+      <uri>C:\Program Files\KiCad\share\kicad\library\conn.lib</uri>
+    </library>
+  </libraries>
+  <nets>
+    <net code="1" name="Net-(U1-Pad3)">
+      <node ref="U2" pin="1"/>
+      <node ref="U1" pin="3"/>
+    </net>
+    <net code="2" name="Net-(C2-Pad1)">
+      <node ref="U1" pin="7"/>
+      <node ref="C2" pin="1"/>
+      <node ref="U1" pin="6"/>
+      <node ref="R2" pin="2"/>
+    </net>
+    <net code="3" name="CLOCK/4">
+      <node ref="U3" pin="9"/>
+      <node ref="J2" pin="7"/>
+    </net>
+    <net code="4" name="CLOCK/2">
+      <node ref="J2" pin="5"/>
+      <node ref="U3" pin="5"/>
+    </net>
+    <net code="5" name="CLOCK">
+      <node ref="J2" pin="4"/>
+      <node ref="J1" pin="21"/>
+      <node ref="J2" pin="6"/>
+      <node ref="J2" pin="8"/>
+    </net>
+    <net code="6" name="Net-(D1-Pad2)">
+      <node ref="D1" pin="2"/>
+      <node ref="R4" pin="2"/>
+    </net>
+    <net code="7" name="Net-(J2-Pad1)">
+      <node ref="X1" pin="14"/>
+      <node ref="J2" pin="1"/>
+    </net>
+    <net code="8" name="VCC">
+      <node ref="U3" pin="14"/>
+      <node ref="U3" pin="1"/>
+      <node ref="C4" pin="1"/>
+      <node ref="R2" pin="1"/>
+      <node ref="U2" pin="14"/>
+      <node ref="R3" pin="2"/>
+      <node ref="U3" pin="4"/>
+      <node ref="U3" pin="13"/>
+      <node ref="J1" pin="18"/>
+      <node ref="U3" pin="10"/>
+      <node ref="J2" pin="2"/>
+      <node ref="R4" pin="1"/>
+      <node ref="U1" pin="4"/>
+      <node ref="U1" pin="8"/>
+      <node ref="C5" pin="1"/>
+      <node ref="C3" pin="1"/>
+      <node ref="R1" pin="1"/>
+    </net>
+    <net code="9" name="Net-(C1-Pad1)">
+      <node ref="SW1" pin="2"/>
+      <node ref="U1" pin="2"/>
+      <node ref="R1" pin="2"/>
+      <node ref="C1" pin="1"/>
+    </net>
+    <net code="10" name="Net-(U2-Pad10)">
+      <node ref="U2" pin="10"/>
+    </net>
+    <net code="11" name="GND">
+      <node ref="SW1" pin="1"/>
+      <node ref="U1" pin="1"/>
+      <node ref="C3" pin="2"/>
+      <node ref="C1" pin="2"/>
+      <node ref="U2" pin="7"/>
+      <node ref="C2" pin="2"/>
+      <node ref="U3" pin="7"/>
+      <node ref="C4" pin="2"/>
+      <node ref="X1" pin="7"/>
+      <node ref="U2" pin="11"/>
+      <node ref="U2" pin="9"/>
+      <node ref="U2" pin="5"/>
+      <node ref="C5" pin="2"/>
+      <node ref="D1" pin="1"/>
+      <node ref="J1" pin="17"/>
+      <node ref="U2" pin="3"/>
+      <node ref="U2" pin="13"/>
+    </net>
+    <net code="12" name="Net-(U2-Pad8)">
+      <node ref="U2" pin="8"/>
+    </net>
+    <net code="13" name="Net-(U2-Pad6)">
+      <node ref="U2" pin="6"/>
+    </net>
+    <net code="14" name="Net-(U2-Pad12)">
+      <node ref="U2" pin="12"/>
+    </net>
+    <net code="15" name="Net-(U2-Pad4)">
+      <node ref="U2" pin="4"/>
+    </net>
+    <net code="16" name="Net-(U3-Pad12)">
+      <node ref="U3" pin="8"/>
+      <node ref="U3" pin="12"/>
+    </net>
+    <net code="17" name="Net-(U3-Pad11)">
+      <node ref="U3" pin="2"/>
+      <node ref="U3" pin="6"/>
+      <node ref="U3" pin="11"/>
+    </net>
+    <net code="18" name="Net-(J1-Pad13)">
+      <node ref="J1" pin="13"/>
+    </net>
+    <net code="19" name="Net-(J1-Pad25)">
+      <node ref="J1" pin="25"/>
+    </net>
+    <net code="20" name="Net-(J1-Pad24)">
+      <node ref="J1" pin="24"/>
+    </net>
+    <net code="21" name="Net-(J1-Pad23)">
+      <node ref="J1" pin="23"/>
+    </net>
+    <net code="22" name="Net-(J1-Pad22)">
+      <node ref="J1" pin="22"/>
+    </net>
+    <net code="23" name="Net-(J1-Pad19)">
+      <node ref="J1" pin="19"/>
+    </net>
+    <net code="24" name="Net-(J1-Pad16)">
+      <node ref="J1" pin="16"/>
+    </net>
+    <net code="25" name="Net-(J1-Pad15)">
+      <node ref="J1" pin="15"/>
+    </net>
+    <net code="26" name="Net-(J1-Pad14)">
+      <node ref="J1" pin="14"/>
+    </net>
+    <net code="27" name="Net-(J1-Pad26)">
+      <node ref="J1" pin="26"/>
+    </net>
+    <net code="28" name="Net-(J1-Pad12)">
+      <node ref="J1" pin="12"/>
+    </net>
+    <net code="29" name="Net-(J1-Pad11)">
+      <node ref="J1" pin="11"/>
+    </net>
+    <net code="30" name="Net-(J1-Pad10)">
+      <node ref="J1" pin="10"/>
+    </net>
+    <net code="31" name="Net-(J1-Pad9)">
+      <node ref="J1" pin="9"/>
+    </net>
+    <net code="32" name="Net-(J1-Pad8)">
+      <node ref="J1" pin="8"/>
+    </net>
+    <net code="33" name="Net-(J1-Pad7)">
+      <node ref="J1" pin="7"/>
+    </net>
+    <net code="34" name="Net-(J1-Pad6)">
+      <node ref="J1" pin="6"/>
+    </net>
+    <net code="35" name="Net-(J1-Pad5)">
+      <node ref="J1" pin="5"/>
+    </net>
+    <net code="36" name="Net-(J1-Pad35)">
+      <node ref="J1" pin="35"/>
+    </net>
+    <net code="37" name="Net-(X1-Pad1)">
+      <node ref="X1" pin="1"/>
+    </net>
+    <net code="38" name="Net-(J1-Pad39)">
+      <node ref="J1" pin="39"/>
+    </net>
+    <net code="39" name="Net-(J1-Pad38)">
+      <node ref="J1" pin="38"/>
+    </net>
+    <net code="40" name="Net-(J1-Pad37)">
+      <node ref="J1" pin="37"/>
+    </net>
+    <net code="41" name="Net-(J1-Pad36)">
+      <node ref="J1" pin="36"/>
+    </net>
+    <net code="42" name="Net-(J1-Pad4)">
+      <node ref="J1" pin="4"/>
+    </net>
+    <net code="43" name="Net-(J1-Pad34)">
+      <node ref="J1" pin="34"/>
+    </net>
+    <net code="44" name="Net-(J1-Pad33)">
+      <node ref="J1" pin="33"/>
+    </net>
+    <net code="45" name="Net-(J1-Pad32)">
+      <node ref="J1" pin="32"/>
+    </net>
+    <net code="46" name="Net-(J1-Pad31)">
+      <node ref="J1" pin="31"/>
+    </net>
+    <net code="47" name="Net-(J1-Pad30)">
+      <node ref="J1" pin="30"/>
+    </net>
+    <net code="48" name="Net-(J1-Pad29)">
+      <node ref="J1" pin="29"/>
+    </net>
+    <net code="49" name="Net-(J1-Pad28)">
+      <node ref="J1" pin="28"/>
+    </net>
+    <net code="50" name="Net-(J1-Pad27)">
+      <node ref="J1" pin="27"/>
+    </net>
+    <net code="51" name="Net-(U1-Pad5)">
+      <node ref="U1" pin="5"/>
+    </net>
+    <net code="52" name="Net-(J1-Pad3)">
+      <node ref="J1" pin="3"/>
+    </net>
+    <net code="53" name="Net-(J1-Pad2)">
+      <node ref="J1" pin="2"/>
+    </net>
+    <net code="54" name="Net-(J1-Pad1)">
+      <node ref="J1" pin="1"/>
+    </net>
+    <net code="55" name="CLOCK/1">
+      <node ref="J2" pin="3"/>
+      <node ref="U3" pin="3"/>
+      <node ref="X1" pin="8"/>
+    </net>
+    <net code="56" name="RESET">
+      <node ref="U2" pin="2"/>
+      <node ref="J1" pin="20"/>
+      <node ref="R3" pin="1"/>
+    </net>
+  </nets>
+</export>
diff --git a/RC6502 Reset Circuit/export/Reset circuit-B.Cu.gbl b/RC6502 Reset Circuit/export/Reset circuit-B.Cu.gbl
index a84b421..245178b 100644
--- a/RC6502 Reset Circuit/export/Reset circuit-B.Cu.gbl	
+++ b/RC6502 Reset Circuit/export/Reset circuit-B.Cu.gbl	
@@ -1,7 +1,7 @@
 G04 #@! TF.FileFunction,Copper,L2,Bot,Signal*
 %FSLAX46Y46*%
 G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)*
-G04 Created by KiCad (PCBNEW 4.0.6) date 05/15/17 22:27:35*
+G04 Created by KiCad (PCBNEW 4.0.6) date 06/10/17 19:53:39*
 %MOMM*%
 %LPD*%
 G01*
@@ -15,72 +15,66 @@ G04 APERTURE LIST*
 %ADD16C,1.200000*%
 %ADD17R,1.700000X1.700000*%
 %ADD18O,1.700000X1.700000*%
-%ADD19C,0.600000*%
-%ADD20C,0.250000*%
+%ADD19R,1.800000X1.800000*%
+%ADD20C,1.800000*%
+%ADD21C,0.600000*%
+%ADD22C,0.250000*%
+%ADD23C,0.254000*%
 G04 APERTURE END LIST*
 D10*
 D11*
-X147320000Y-127000000D03*
+X187325000Y-133985000D03*
 D12*
-X157480000Y-127000000D03*
+X177165000Y-133985000D03*
 D11*
-X147320000Y-119380000D03*
+X187325000Y-128905000D03*
 D12*
-X157480000Y-119380000D03*
+X177165000Y-128905000D03*
 D13*
-X180340000Y-122610000D03*
-X180340000Y-118110000D03*
-X186840000Y-122610000D03*
-X186840000Y-118110000D03*
+X183515000Y-118165000D03*
+X183515000Y-113665000D03*
+X190015000Y-118165000D03*
+X190015000Y-113665000D03*
 D14*
-X130810000Y-119380000D03*
+X159385000Y-114300000D03*
 D12*
-X138430000Y-127000000D03*
-X130810000Y-121920000D03*
-X138430000Y-124460000D03*
-X130810000Y-124460000D03*
-X138430000Y-121920000D03*
-X130810000Y-127000000D03*
-X138430000Y-119380000D03*
+X167005000Y-121920000D03*
+X159385000Y-116840000D03*
+X167005000Y-119380000D03*
+X159385000Y-119380000D03*
+X167005000Y-116840000D03*
+X159385000Y-121920000D03*
+X167005000Y-114300000D03*
 D14*
-X114300000Y-119380000D03*
+X140970000Y-114300000D03*
 D12*
-X121920000Y-134620000D03*
-X114300000Y-121920000D03*
-X121920000Y-132080000D03*
-X114300000Y-124460000D03*
-X121920000Y-129540000D03*
-X114300000Y-127000000D03*
-X121920000Y-127000000D03*
-X114300000Y-129540000D03*
-X121920000Y-124460000D03*
-X114300000Y-132080000D03*
-X121920000Y-121920000D03*
-X114300000Y-134620000D03*
-X121920000Y-119380000D03*
-D11*
-X138430000Y-132080000D03*
-X138430000Y-134580000D03*
+X148590000Y-129540000D03*
+X140970000Y-116840000D03*
+X148590000Y-127000000D03*
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+X140970000Y-121920000D03*
+X148590000Y-121920000D03*
+X140970000Y-124460000D03*
+X148590000Y-119380000D03*
+X140970000Y-127000000D03*
+X148590000Y-116840000D03*
+X140970000Y-129540000D03*
+X148590000Y-114300000D03*
 D15*
-X165100000Y-133350000D03*
+X163195000Y-136525000D03*
 D16*
-X165100000Y-135350000D03*
+X163195000Y-138525000D03*
 D11*
-X130810000Y-132080000D03*
-X130810000Y-134580000D03*
-X147320000Y-133350000D03*
+X177165000Y-139065000D03*
 D12*
-X157480000Y-133350000D03*
-D17*
-X100330000Y-115570000D03*
-D18*
-X102870000Y-115570000D03*
+X187325000Y-139065000D03*
 D14*
-X97790000Y-123190000D03*
+X99695000Y-123190000D03*
 D11*
-X105410000Y-123190000D03*
-X105410000Y-138430000D03*
-X97790000Y-138430000D03*
+X99695000Y-115570000D03*
+X114935000Y-115570000D03*
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 D17*
 X190500000Y-146050000D03*
 D18*
@@ -122,131 +116,3573 @@ X101600000Y-146050000D03*
 X99060000Y-146050000D03*
 X96520000Y-146050000D03*
 X93980000Y-146050000D03*
+D14*
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+D12*
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 D11*
-X119380000Y-139065000D03*
-X116880000Y-139065000D03*
+X167005000Y-126365000D03*
+X167005000Y-131365000D03*
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+X153035000Y-114300000D03*
+X153035000Y-119300000D03*
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 D19*
-X140970000Y-138430000D03*
-X130810000Y-138430000D03*
-X125730000Y-138430000D03*
-X124460000Y-142240000D03*
+X177165000Y-117475000D03*
 D20*
-X138430000Y-132080000D02*
-X138430000Y-129540000D01*
-X138430000Y-129540000D02*
+X177165000Y-114935000D03*
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 M02*
diff --git a/RC6502 Reset Circuit/export/Reset circuit-B.Mask.gbs b/RC6502 Reset Circuit/export/Reset circuit-B.Mask.gbs
index eb81cc5..3156beb 100644
--- a/RC6502 Reset Circuit/export/Reset circuit-B.Mask.gbs	
+++ b/RC6502 Reset Circuit/export/Reset circuit-B.Mask.gbs	
@@ -1,7 +1,7 @@
 G04 #@! TF.FileFunction,Soldermask,Bot*
 %FSLAX46Y46*%
 G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)*
-G04 Created by KiCad (PCBNEW 4.0.6) date 05/15/17 22:27:35*
+G04 Created by KiCad (PCBNEW 4.0.6) date 06/10/17 19:53:39*
 %MOMM*%
 %LPD*%
 G01*
@@ -15,70 +15,63 @@ G04 APERTURE LIST*
 %ADD16C,1.600000*%
 %ADD17R,2.100000X2.100000*%
 %ADD18O,2.100000X2.100000*%
+%ADD19R,2.200000X2.200000*%
+%ADD20C,2.200000*%
 G04 APERTURE END LIST*
 D10*
 D11*
-X147320000Y-127000000D03*
+X187325000Y-133985000D03*
 D12*
-X157480000Y-127000000D03*
+X177165000Y-133985000D03*
 D11*
-X147320000Y-119380000D03*
+X187325000Y-128905000D03*
 D12*
-X157480000Y-119380000D03*
+X177165000Y-128905000D03*
 D13*
-X180340000Y-122610000D03*
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-X186840000Y-122610000D03*
-X186840000Y-118110000D03*
+X183515000Y-118165000D03*
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+X190015000Y-118165000D03*
+X190015000Y-113665000D03*
 D14*
-X130810000Y-119380000D03*
+X159385000Y-114300000D03*
 D12*
-X138430000Y-127000000D03*
-X130810000Y-121920000D03*
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+X159385000Y-119380000D03*
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+X167005000Y-114300000D03*
 D14*
-X114300000Y-119380000D03*
+X140970000Y-114300000D03*
 D12*
-X121920000Y-134620000D03*
-X114300000Y-121920000D03*
-X121920000Y-132080000D03*
-X114300000Y-124460000D03*
-X121920000Y-129540000D03*
-X114300000Y-127000000D03*
-X121920000Y-127000000D03*
-X114300000Y-129540000D03*
-X121920000Y-124460000D03*
-X114300000Y-132080000D03*
-X121920000Y-121920000D03*
-X114300000Y-134620000D03*
-X121920000Y-119380000D03*
-D11*
-X138430000Y-132080000D03*
-X138430000Y-134580000D03*
+X148590000Y-129540000D03*
+X140970000Y-116840000D03*
+X148590000Y-127000000D03*
+X140970000Y-119380000D03*
+X148590000Y-124460000D03*
+X140970000Y-121920000D03*
+X148590000Y-121920000D03*
+X140970000Y-124460000D03*
+X148590000Y-119380000D03*
+X140970000Y-127000000D03*
+X148590000Y-116840000D03*
+X140970000Y-129540000D03*
+X148590000Y-114300000D03*
 D15*
-X165100000Y-133350000D03*
+X163195000Y-136525000D03*
 D16*
-X165100000Y-135350000D03*
+X163195000Y-138525000D03*
 D11*
-X130810000Y-132080000D03*
-X130810000Y-134580000D03*
-X147320000Y-133350000D03*
+X177165000Y-139065000D03*
 D12*
-X157480000Y-133350000D03*
-D17*
-X100330000Y-115570000D03*
-D18*
-X102870000Y-115570000D03*
+X187325000Y-139065000D03*
 D14*
-X97790000Y-123190000D03*
+X99695000Y-123190000D03*
 D11*
-X105410000Y-123190000D03*
-X105410000Y-138430000D03*
-X97790000Y-138430000D03*
+X99695000Y-115570000D03*
+X114935000Y-115570000D03*
+X114935000Y-123190000D03*
 D17*
 X190500000Y-146050000D03*
 D18*
@@ -120,7 +113,47 @@ X101600000Y-146050000D03*
 X99060000Y-146050000D03*
 X96520000Y-146050000D03*
 X93980000Y-146050000D03*
+D14*
+X123190000Y-114300000D03*
+D12*
+X130810000Y-129540000D03*
+X123190000Y-116840000D03*
+X130810000Y-127000000D03*
+X123190000Y-119380000D03*
+X130810000Y-124460000D03*
+X123190000Y-121920000D03*
+X130810000Y-121920000D03*
+X123190000Y-124460000D03*
+X130810000Y-119380000D03*
+X123190000Y-127000000D03*
+X130810000Y-116840000D03*
+X123190000Y-129540000D03*
+X130810000Y-114300000D03*
 D11*
-X119380000Y-139065000D03*
-X116880000Y-139065000D03*
+X167005000Y-126365000D03*
+X167005000Y-131365000D03*
+X159385000Y-126365000D03*
+X159385000Y-131365000D03*
+X153035000Y-114300000D03*
+X153035000Y-119300000D03*
+X135255000Y-114300000D03*
+X135255000Y-119300000D03*
+D19*
+X177165000Y-117475000D03*
+D20*
+X177165000Y-114935000D03*
+D17*
+X104140000Y-132715000D03*
+D18*
+X104140000Y-130175000D03*
+X106680000Y-132715000D03*
+X106680000Y-130175000D03*
+X109220000Y-132715000D03*
+X109220000Y-130175000D03*
+X111760000Y-132715000D03*
+X111760000Y-130175000D03*
+D11*
+X187325000Y-123825000D03*
+D12*
+X177165000Y-123825000D03*
 M02*
diff --git a/RC6502 Reset Circuit/export/Reset circuit-B.Paste.gbp b/RC6502 Reset Circuit/export/Reset circuit-B.Paste.gbp
index 6085161..ef3610d 100644
--- a/RC6502 Reset Circuit/export/Reset circuit-B.Paste.gbp	
+++ b/RC6502 Reset Circuit/export/Reset circuit-B.Paste.gbp	
@@ -1,7 +1,7 @@
 G04 #@! TF.FileFunction,Paste,Bot*
 %FSLAX46Y46*%
 G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)*
-G04 Created by KiCad (PCBNEW 4.0.6) date 05/15/17 22:27:35*
+G04 Created by KiCad (PCBNEW 4.0.6) date 06/10/17 19:53:39*
 %MOMM*%
 %LPD*%
 G01*
diff --git a/RC6502 Reset Circuit/export/Reset circuit-B.SilkS.gbo b/RC6502 Reset Circuit/export/Reset circuit-B.SilkS.gbo
index 1355b3a..179849f 100644
--- a/RC6502 Reset Circuit/export/Reset circuit-B.SilkS.gbo	
+++ b/RC6502 Reset Circuit/export/Reset circuit-B.SilkS.gbo	
@@ -1,7 +1,7 @@
 G04 #@! TF.FileFunction,Legend,Bot*
 %FSLAX46Y46*%
 G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)*
-G04 Created by KiCad (PCBNEW 4.0.6) date 05/15/17 22:27:35*
+G04 Created by KiCad (PCBNEW 4.0.6) date 06/10/17 19:53:39*
 %MOMM*%
 %LPD*%
 G01*
diff --git a/RC6502 Reset Circuit/export/Reset circuit-Dwgs.User.gbr b/RC6502 Reset Circuit/export/Reset circuit-Dwgs.User.gbr
index 3027ace..7298bdf 100644
--- a/RC6502 Reset Circuit/export/Reset circuit-Dwgs.User.gbr	
+++ b/RC6502 Reset Circuit/export/Reset circuit-Dwgs.User.gbr	
@@ -1,7 +1,7 @@
 G04 #@! TF.FileFunction,Drawing*
 %FSLAX46Y46*%
 G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)*
-G04 Created by KiCad (PCBNEW 4.0.6) date 05/15/17 22:27:35*
+G04 Created by KiCad (PCBNEW 4.0.6) date 06/10/17 19:53:39*
 %MOMM*%
 %LPD*%
 G01*
diff --git a/RC6502 Reset Circuit/export/Reset circuit-Edge.Cuts.gm1 b/RC6502 Reset Circuit/export/Reset circuit-Edge.Cuts.gm1
index e351371..e11addc 100644
--- a/RC6502 Reset Circuit/export/Reset circuit-Edge.Cuts.gm1	
+++ b/RC6502 Reset Circuit/export/Reset circuit-Edge.Cuts.gm1	
@@ -1,7 +1,7 @@
 G04 #@! TF.FileFunction,Profile,NP*
 %FSLAX46Y46*%
 G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)*
-G04 Created by KiCad (PCBNEW 4.0.6) date 05/15/17 22:27:35*
+G04 Created by KiCad (PCBNEW 4.0.6) date 06/10/17 19:53:39*
 %MOMM*%
 %LPD*%
 G01*
@@ -11,12 +11,12 @@ G04 APERTURE LIST*
 G04 APERTURE END LIST*
 D10*
 D11*
+X92710000Y-147320000D02*
+X92710000Y-111760000D01*
+X191770000Y-111760000D02*
+X191770000Y-147320000D01*
+X92710000Y-111760000D02*
+X191770000Y-111760000D01*
 X191770000Y-147320000D02*
 X92710000Y-147320000D01*
-X92710000Y-114300000D02*
-X191770000Y-114300000D01*
-X92710000Y-147320000D02*
-X92710000Y-114300000D01*
-X191770000Y-147320000D02*
-X191770000Y-114300000D01*
 M02*
diff --git a/RC6502 Reset Circuit/export/Reset circuit-F.Cu.gtl b/RC6502 Reset Circuit/export/Reset circuit-F.Cu.gtl
index 018ca3a..e80c0cf 100644
--- a/RC6502 Reset Circuit/export/Reset circuit-F.Cu.gtl	
+++ b/RC6502 Reset Circuit/export/Reset circuit-F.Cu.gtl	
@@ -1,7 +1,7 @@
 G04 #@! TF.FileFunction,Copper,L1,Top,Signal*
 %FSLAX46Y46*%
 G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)*
-G04 Created by KiCad (PCBNEW 4.0.6) date 05/15/17 22:27:35*
+G04 Created by KiCad (PCBNEW 4.0.6) date 06/10/17 19:53:39*
 %MOMM*%
 %LPD*%
 G01*
@@ -15,72 +15,65 @@ G04 APERTURE LIST*
 %ADD16C,1.200000*%
 %ADD17R,1.700000X1.700000*%
 %ADD18O,1.700000X1.700000*%
-%ADD19C,0.600000*%
-%ADD20C,0.250000*%
+%ADD19R,1.800000X1.800000*%
+%ADD20C,1.800000*%
+%ADD21C,0.600000*%
+%ADD22C,0.250000*%
 G04 APERTURE END LIST*
 D10*
 D11*
-X147320000Y-127000000D03*
+X187325000Y-133985000D03*
 D12*
-X157480000Y-127000000D03*
+X177165000Y-133985000D03*
 D11*
-X147320000Y-119380000D03*
+X187325000Y-128905000D03*
 D12*
-X157480000Y-119380000D03*
+X177165000Y-128905000D03*
 D13*
-X180340000Y-122610000D03*
-X180340000Y-118110000D03*
-X186840000Y-122610000D03*
-X186840000Y-118110000D03*
+X183515000Y-118165000D03*
+X183515000Y-113665000D03*
+X190015000Y-118165000D03*
+X190015000Y-113665000D03*
 D14*
-X130810000Y-119380000D03*
+X159385000Y-114300000D03*
 D12*
-X138430000Y-127000000D03*
-X130810000Y-121920000D03*
-X138430000Y-124460000D03*
-X130810000Y-124460000D03*
-X138430000Y-121920000D03*
-X130810000Y-127000000D03*
-X138430000Y-119380000D03*
+X167005000Y-121920000D03*
+X159385000Y-116840000D03*
+X167005000Y-119380000D03*
+X159385000Y-119380000D03*
+X167005000Y-116840000D03*
+X159385000Y-121920000D03*
+X167005000Y-114300000D03*
 D14*
-X114300000Y-119380000D03*
+X140970000Y-114300000D03*
 D12*
-X121920000Y-134620000D03*
-X114300000Y-121920000D03*
-X121920000Y-132080000D03*
-X114300000Y-124460000D03*
-X121920000Y-129540000D03*
-X114300000Y-127000000D03*
-X121920000Y-127000000D03*
-X114300000Y-129540000D03*
-X121920000Y-124460000D03*
-X114300000Y-132080000D03*
-X121920000Y-121920000D03*
-X114300000Y-134620000D03*
-X121920000Y-119380000D03*
-D11*
-X138430000Y-132080000D03*
-X138430000Y-134580000D03*
+X148590000Y-129540000D03*
+X140970000Y-116840000D03*
+X148590000Y-127000000D03*
+X140970000Y-119380000D03*
+X148590000Y-124460000D03*
+X140970000Y-121920000D03*
+X148590000Y-121920000D03*
+X140970000Y-124460000D03*
+X148590000Y-119380000D03*
+X140970000Y-127000000D03*
+X148590000Y-116840000D03*
+X140970000Y-129540000D03*
+X148590000Y-114300000D03*
 D15*
-X165100000Y-133350000D03*
+X163195000Y-136525000D03*
 D16*
-X165100000Y-135350000D03*
+X163195000Y-138525000D03*
 D11*
-X130810000Y-132080000D03*
-X130810000Y-134580000D03*
-X147320000Y-133350000D03*
+X177165000Y-139065000D03*
 D12*
-X157480000Y-133350000D03*
-D17*
-X100330000Y-115570000D03*
-D18*
-X102870000Y-115570000D03*
+X187325000Y-139065000D03*
 D14*
-X97790000Y-123190000D03*
+X99695000Y-123190000D03*
 D11*
-X105410000Y-123190000D03*
-X105410000Y-138430000D03*
-X97790000Y-138430000D03*
+X99695000Y-115570000D03*
+X114935000Y-115570000D03*
+X114935000Y-123190000D03*
 D17*
 X190500000Y-146050000D03*
 D18*
@@ -122,115 +115,337 @@ X101600000Y-146050000D03*
 X99060000Y-146050000D03*
 X96520000Y-146050000D03*
 X93980000Y-146050000D03*
+D14*
+X123190000Y-114300000D03*
+D12*
+X130810000Y-129540000D03*
+X123190000Y-116840000D03*
+X130810000Y-127000000D03*
+X123190000Y-119380000D03*
+X130810000Y-124460000D03*
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+X130810000Y-119380000D03*
+X123190000Y-127000000D03*
+X130810000Y-116840000D03*
+X123190000Y-129540000D03*
+X130810000Y-114300000D03*
 D11*
-X119380000Y-139065000D03*
-X116880000Y-139065000D03*
+X167005000Y-126365000D03*
+X167005000Y-131365000D03*
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+X153035000Y-114300000D03*
+X153035000Y-119300000D03*
+X135255000Y-114300000D03*
+X135255000Y-119300000D03*
 D19*
-X140970000Y-138430000D03*
-X130810000Y-138430000D03*
-X125730000Y-138430000D03*
-X124460000Y-142240000D03*
+X177165000Y-117475000D03*
 D20*
-X138430000Y-132080000D02*
-X142240000Y-132080000D01*
-X146050000Y-129540000D02*
-X156210000Y-129540000D01*
-X143510000Y-132080000D02*
-X146050000Y-129540000D01*
-X142240000Y-132080000D02*
-X143510000Y-132080000D01*
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-X175950000Y-127000000D01*
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-X186840000Y-122610000D01*
-X157480000Y-128270000D02*
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+D17*
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+D21*
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+D22*
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+X182935000Y-118165000D01*
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 X157480000Y-127000000D01*
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+X127000000Y-114300000D01*
+X127000000Y-114300000D02*
+X130810000Y-114300000D01*
+X135255000Y-114300000D02*
+X130810000Y-114300000D01*
+X148590000Y-114300000D02*
+X152400000Y-114300000D01*
+X177165000Y-139065000D02*
+X175260000Y-139065000D01*
 X144780000Y-140970000D02*
-X138430000Y-140970000D01*
-X149860000Y-146050000D02*
-X152400000Y-143510000D01*
-X156940000Y-143510000D02*
-X165100000Y-135350000D01*
-X152400000Y-143510000D02*
-X156940000Y-143510000D01*
-X130810000Y-119380000D02*
-X133350000Y-119380000D01*
-X134620000Y-120650000D02*
-X134620000Y-134580000D01*
-X133350000Y-119380000D02*
-X134620000Y-120650000D01*
-X138430000Y-134580000D02*
-X134620000Y-134580000D01*
-X134620000Y-134580000D02*
-X130810000Y-134580000D01*
-X138430000Y-134580000D02*
-X138430000Y-140970000D01*
-X114300000Y-134620000D02*
-X114300000Y-138430000D01*
-X116840000Y-140970000D02*
-X138430000Y-140970000D01*
-X138430000Y-121920000D02*
-X138430000Y-124460000D01*
-X138430000Y-121920000D02*
-X156210000Y-121920000D01*
-X157480000Y-120650000D02*
+X142240000Y-143510000D01*
+X173355000Y-140970000D02*
+X149860000Y-140970000D01*
+X175260000Y-139065000D02*
+X173355000Y-140970000D01*
+X142240000Y-146050000D02*
+X142240000Y-143510000D01*
+X142240000Y-143510000D02*
+X142240000Y-139065000D01*
+X142240000Y-116840000D02*
+X140970000Y-116840000D01*
+X143510000Y-118110000D02*
+X142240000Y-116840000D01*
+X143510000Y-134620000D02*
+X143510000Y-118110000D01*
+X142240000Y-139065000D02*
+X143510000Y-137795000D01*
+X159385000Y-119380000D02*
 X157480000Y-119380000D01*
-X156210000Y-121920000D02*
-X157480000Y-120650000D01*
-X111760000Y-138430000D02*
-X111760000Y-142240000D01*
-X113030000Y-143510000D02*
-X116840000Y-143510000D01*
-X111760000Y-142240000D02*
-X113030000Y-143510000D01*
-X147320000Y-133350000D02*
-X146050000Y-133350000D01*
-X144780000Y-134620000D02*
-X140970000Y-138430000D01*
-X130810000Y-138430000D02*
-X125730000Y-138430000D01*
-X124460000Y-142240000D02*
-X124460000Y-143510000D01*
-X146050000Y-133350000D02*
-X144780000Y-134620000D01*
-X114300000Y-121920000D02*
-X113030000Y-121920000D01*
-X139700000Y-143510000D02*
-X142240000Y-146050000D01*
-X116840000Y-143510000D02*
-X124460000Y-143510000D01*
-X124460000Y-143510000D02*
-X139700000Y-143510000D01*
-X111760000Y-123190000D02*
-X111760000Y-138430000D01*
-X113030000Y-121920000D02*
-X111760000Y-123190000D01*
-X130810000Y-124460000D02*
-X123190000Y-116840000D01*
-X114300000Y-118110000D02*
-X114300000Y-119380000D01*
-X115570000Y-116840000D02*
-X114300000Y-118110000D01*
-X123190000Y-116840000D02*
-X115570000Y-116840000D01*
-X102870000Y-115570000D02*
-X102870000Y-120650000D01*
-X102870000Y-120650000D02*
-X105410000Y-123190000D01*
+X142240000Y-113030000D02*
+X140970000Y-114300000D01*
+X155575000Y-113030000D02*
+X142240000Y-113030000D01*
+X156845000Y-114300000D02*
+X155575000Y-113030000D01*
+X156845000Y-118745000D02*
+X156845000Y-114300000D01*
+X157480000Y-119380000D02*
+X156845000Y-118745000D01*
+X111760000Y-130175000D02*
+X110490000Y-131445000D01*
+X109220000Y-130175000D02*
+X110490000Y-131445000D01*
+X138430000Y-144145000D02*
+X139700000Y-145415000D01*
+X115570000Y-144145000D02*
+X138430000Y-144145000D01*
+X110490000Y-131445000D02*
+X110490000Y-142875000D01*
+X110490000Y-142875000D02*
+X111760000Y-144145000D01*
+X111760000Y-144145000D02*
+X115570000Y-144145000D01*
+X139700000Y-145415000D02*
+X139700000Y-146050000D01*
+X106680000Y-132715000D02*
+X105410000Y-131445000D01*
+X105410000Y-126365000D02*
+X107950000Y-123825000D01*
+X105410000Y-131445000D02*
+X105410000Y-126365000D01*
+X109220000Y-115570000D02*
+X107950000Y-116840000D01*
+X107950000Y-123825000D02*
+X107950000Y-116840000D01*
+X109220000Y-115570000D02*
+X114935000Y-115570000D01*
+X123190000Y-119380000D02*
+X118745000Y-119380000D01*
+X118745000Y-119380000D02*
+X114935000Y-115570000D01*
+X109220000Y-132715000D02*
+X107950000Y-131445000D01*
+X109855000Y-124460000D02*
+X111760000Y-124460000D01*
+X107950000Y-126365000D02*
+X109855000Y-124460000D01*
+X107950000Y-131445000D02*
+X107950000Y-126365000D01*
+X111760000Y-124460000D02*
+X123190000Y-124460000D01*
+X111760000Y-132715000D02*
+X112395000Y-132715000D01*
+X112395000Y-132715000D02*
+X116840000Y-128270000D01*
+X130810000Y-127000000D02*
+X129540000Y-128270000D01*
+X129540000Y-128270000D02*
+X116840000Y-128270000D01*
+X130810000Y-129540000D02*
+X131445000Y-129540000D01*
+X131445000Y-129540000D02*
+X132715000Y-128270000D01*
+X132715000Y-128270000D02*
+X132715000Y-127635000D01*
+X132715000Y-120650000D02*
+X131445000Y-119380000D01*
+X132715000Y-127635000D02*
+X132715000Y-120650000D01*
+X131445000Y-119380000D02*
+X130810000Y-119380000D01*
+X104140000Y-132715000D02*
+X103505000Y-132715000D01*
+X103505000Y-132715000D02*
+X101600000Y-130810000D01*
+X101600000Y-117475000D02*
+X99695000Y-115570000D01*
+X101600000Y-130810000D02*
+X101600000Y-117475000D01*
+X177165000Y-114935000D02*
+X175895000Y-114935000D01*
+X175260000Y-115570000D02*
+X175260000Y-116205000D01*
+X175895000Y-114935000D02*
+X175260000Y-115570000D01*
+X177165000Y-123825000D02*
+X175895000Y-123825000D01*
+X175260000Y-121920000D02*
+X175260000Y-116205000D01*
+X175895000Y-123825000D02*
+X175260000Y-123190000D01*
+X175260000Y-123190000D02*
+X175260000Y-121920000D01*
+X176530000Y-114935000D02*
+X177165000Y-114935000D01*
 M02*
diff --git a/RC6502 Reset Circuit/export/Reset circuit-F.Mask.gts b/RC6502 Reset Circuit/export/Reset circuit-F.Mask.gts
index e93d099..5e79d33 100644
--- a/RC6502 Reset Circuit/export/Reset circuit-F.Mask.gts	
+++ b/RC6502 Reset Circuit/export/Reset circuit-F.Mask.gts	
@@ -1,7 +1,7 @@
 G04 #@! TF.FileFunction,Soldermask,Top*
 %FSLAX46Y46*%
 G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)*
-G04 Created by KiCad (PCBNEW 4.0.6) date 05/15/17 22:27:35*
+G04 Created by KiCad (PCBNEW 4.0.6) date 06/10/17 19:53:39*
 %MOMM*%
 %LPD*%
 G01*
@@ -15,70 +15,63 @@ G04 APERTURE LIST*
 %ADD16C,1.600000*%
 %ADD17R,2.100000X2.100000*%
 %ADD18O,2.100000X2.100000*%
+%ADD19R,2.200000X2.200000*%
+%ADD20C,2.200000*%
 G04 APERTURE END LIST*
 D10*
 D11*
-X147320000Y-127000000D03*
+X187325000Y-133985000D03*
 D12*
-X157480000Y-127000000D03*
+X177165000Y-133985000D03*
 D11*
-X147320000Y-119380000D03*
+X187325000Y-128905000D03*
 D12*
-X157480000Y-119380000D03*
+X177165000Y-128905000D03*
 D13*
-X180340000Y-122610000D03*
-X180340000Y-118110000D03*
-X186840000Y-122610000D03*
-X186840000Y-118110000D03*
+X183515000Y-118165000D03*
+X183515000Y-113665000D03*
+X190015000Y-118165000D03*
+X190015000Y-113665000D03*
 D14*
-X130810000Y-119380000D03*
+X159385000Y-114300000D03*
 D12*
-X138430000Y-127000000D03*
-X130810000Y-121920000D03*
-X138430000Y-124460000D03*
-X130810000Y-124460000D03*
-X138430000Y-121920000D03*
-X130810000Y-127000000D03*
-X138430000Y-119380000D03*
+X167005000Y-121920000D03*
+X159385000Y-116840000D03*
+X167005000Y-119380000D03*
+X159385000Y-119380000D03*
+X167005000Y-116840000D03*
+X159385000Y-121920000D03*
+X167005000Y-114300000D03*
 D14*
-X114300000Y-119380000D03*
+X140970000Y-114300000D03*
 D12*
-X121920000Y-134620000D03*
-X114300000Y-121920000D03*
-X121920000Y-132080000D03*
-X114300000Y-124460000D03*
-X121920000Y-129540000D03*
-X114300000Y-127000000D03*
-X121920000Y-127000000D03*
-X114300000Y-129540000D03*
-X121920000Y-124460000D03*
-X114300000Y-132080000D03*
-X121920000Y-121920000D03*
-X114300000Y-134620000D03*
-X121920000Y-119380000D03*
-D11*
-X138430000Y-132080000D03*
-X138430000Y-134580000D03*
+X148590000Y-129540000D03*
+X140970000Y-116840000D03*
+X148590000Y-127000000D03*
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+X148590000Y-121920000D03*
+X140970000Y-124460000D03*
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+X140970000Y-127000000D03*
+X148590000Y-116840000D03*
+X140970000Y-129540000D03*
+X148590000Y-114300000D03*
 D15*
-X165100000Y-133350000D03*
+X163195000Y-136525000D03*
 D16*
-X165100000Y-135350000D03*
+X163195000Y-138525000D03*
 D11*
-X130810000Y-132080000D03*
-X130810000Y-134580000D03*
-X147320000Y-133350000D03*
+X177165000Y-139065000D03*
 D12*
-X157480000Y-133350000D03*
-D17*
-X100330000Y-115570000D03*
-D18*
-X102870000Y-115570000D03*
+X187325000Y-139065000D03*
 D14*
-X97790000Y-123190000D03*
+X99695000Y-123190000D03*
 D11*
-X105410000Y-123190000D03*
-X105410000Y-138430000D03*
-X97790000Y-138430000D03*
+X99695000Y-115570000D03*
+X114935000Y-115570000D03*
+X114935000Y-123190000D03*
 D17*
 X190500000Y-146050000D03*
 D18*
@@ -120,7 +113,47 @@ X101600000Y-146050000D03*
 X99060000Y-146050000D03*
 X96520000Y-146050000D03*
 X93980000Y-146050000D03*
+D14*
+X123190000Y-114300000D03*
+D12*
+X130810000Y-129540000D03*
+X123190000Y-116840000D03*
+X130810000Y-127000000D03*
+X123190000Y-119380000D03*
+X130810000Y-124460000D03*
+X123190000Y-121920000D03*
+X130810000Y-121920000D03*
+X123190000Y-124460000D03*
+X130810000Y-119380000D03*
+X123190000Y-127000000D03*
+X130810000Y-116840000D03*
+X123190000Y-129540000D03*
+X130810000Y-114300000D03*
 D11*
-X119380000Y-139065000D03*
-X116880000Y-139065000D03*
+X167005000Y-126365000D03*
+X167005000Y-131365000D03*
+X159385000Y-126365000D03*
+X159385000Y-131365000D03*
+X153035000Y-114300000D03*
+X153035000Y-119300000D03*
+X135255000Y-114300000D03*
+X135255000Y-119300000D03*
+D19*
+X177165000Y-117475000D03*
+D20*
+X177165000Y-114935000D03*
+D17*
+X104140000Y-132715000D03*
+D18*
+X104140000Y-130175000D03*
+X106680000Y-132715000D03*
+X106680000Y-130175000D03*
+X109220000Y-132715000D03*
+X109220000Y-130175000D03*
+X111760000Y-132715000D03*
+X111760000Y-130175000D03*
+D11*
+X187325000Y-123825000D03*
+D12*
+X177165000Y-123825000D03*
 M02*
diff --git a/RC6502 Reset Circuit/export/Reset circuit-F.Paste.gtp b/RC6502 Reset Circuit/export/Reset circuit-F.Paste.gtp
index 36cf2a0..284a53d 100644
--- a/RC6502 Reset Circuit/export/Reset circuit-F.Paste.gtp	
+++ b/RC6502 Reset Circuit/export/Reset circuit-F.Paste.gtp	
@@ -1,7 +1,7 @@
 G04 #@! TF.FileFunction,Paste,Top*
 %FSLAX46Y46*%
 G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)*
-G04 Created by KiCad (PCBNEW 4.0.6) date 05/15/17 22:27:35*
+G04 Created by KiCad (PCBNEW 4.0.6) date 06/10/17 19:53:39*
 %MOMM*%
 %LPD*%
 G01*
diff --git a/RC6502 Reset Circuit/export/Reset circuit-F.SilkS.gto b/RC6502 Reset Circuit/export/Reset circuit-F.SilkS.gto
index ba0fc18..bbee935 100644
--- a/RC6502 Reset Circuit/export/Reset circuit-F.SilkS.gto	
+++ b/RC6502 Reset Circuit/export/Reset circuit-F.SilkS.gto	
@@ -1,7 +1,7 @@
 G04 #@! TF.FileFunction,Legend,Top*
 %FSLAX46Y46*%
 G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)*
-G04 Created by KiCad (PCBNEW 4.0.6) date 05/15/17 22:27:35*
+G04 Created by KiCad (PCBNEW 4.0.6) date 06/10/17 19:53:39*
 %MOMM*%
 %LPD*%
 G01*
@@ -14,865 +14,1089 @@ G04 APERTURE LIST*
 G04 APERTURE END LIST*
 D10*
 D11*
-X139164286Y-138374286D02*
-X139092857Y-138302857D01*
-X139021429Y-138088571D01*
-X139021429Y-137945714D01*
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-X140450000Y-137731429D01*
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-X140450000Y-138302857D01*
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-X139021429Y-139231429D02*
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diff --git a/RC6502 Reset Circuit/export/Reset circuit.drl b/RC6502 Reset Circuit/export/Reset circuit.drl
index 9b605f6..3edbda4 100644
--- a/RC6502 Reset Circuit/export/Reset circuit.drl	
+++ b/RC6502 Reset Circuit/export/Reset circuit.drl	
@@ -1,74 +1,106 @@
 M48
-;DRILL file {KiCad 4.0.6} date 05/15/17 22:27:42
+;DRILL file {KiCad 4.0.6} date 06/10/17 19:53:42
 ;FORMAT={2:4/ absolute / inch / suppress leading zeros}
 FMAT,2
 INCH,TZ
 T1C0.016
 T2C0.024
 T3C0.031
-T4C0.039
-T5C0.043
+T4C0.035
+T5C0.039
+T6C0.043
 %
 G90
 G05
 M72
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-X65000Y-53287
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 T4
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+T5
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 X43000Y-57500
+X44000Y-51250
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 X44000Y-57500
 X45000Y-57500
 X46000Y-57500
@@ -101,10 +133,10 @@ X72000Y-57500
 X73000Y-57500
 X74000Y-57500
 X75000Y-57500
-T5
-X71000Y-46500
-X71000Y-48272
-X73559Y-46500
-X73559Y-48272
+T6
+X72250Y-44750
+X72250Y-46522
+X74809Y-44750
+X74809Y-46522
 T0
 M30
diff --git a/RC6502 Reset Circuit/export/Reset circuit.pdf b/RC6502 Reset Circuit/export/Reset circuit.pdf
index 0553961..5750b96 100644
Binary files a/RC6502 Reset Circuit/export/Reset circuit.pdf and b/RC6502 Reset Circuit/export/Reset circuit.pdf differ
diff --git a/RC6502 Reset Circuit/export/pcb.png b/RC6502 Reset Circuit/export/pcb.png
index d50606a..9b62362 100644
Binary files a/RC6502 Reset Circuit/export/pcb.png and b/RC6502 Reset Circuit/export/pcb.png differ