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https://github.com/tebl/RC6502-Apple-1-Replica.git
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Updated net lists
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@ -346,15 +346,15 @@
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(module Resistors_THT:R_Axial_DIN0207_L6.3mm_D2.5mm_P10.16mm_Horizontal (layer F.Cu) (tedit 590E3CFF) (tstamp 590A3AC0)
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(module Resistors_THT:R_Axial_DIN0207_L6.3mm_D2.5mm_P10.16mm_Horizontal (layer F.Cu) (tedit 5918ADFF) (tstamp 590A3AC0)
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(at 111.76 128.27 90)
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(descr "Resistor, Axial_DIN0207 series, Axial, Horizontal, pin pitch=10.16mm, 0.25W = 1/4W, length*diameter=6.3*2.5mm^2, http://cdn-reichelt.de/documents/datenblatt/B400/1_4W%23YAG.pdf")
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(tags "Resistor Axial_DIN0207 series Axial Horizontal pin pitch 10.16mm 0.25W = 1/4W length 6.3mm diameter 2.5mm")
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(path /590BED30)
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(fp_text reference R1 (at 3.81 -2.54 90) (layer F.SilkS)
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(fp_text reference R1 (at 5.08 -2.54 90) (layer F.SilkS)
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(effects (font (size 1 1) (thickness 0.15)))
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)
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(fp_text value 10k (at 6.35 -2.54 90) (layer F.SilkS)
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(fp_text value 10k (at 5.08 0 90) (layer F.SilkS)
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(effects (font (size 1 1) (thickness 0.15)))
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)
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(fp_line (start 1.93 -1.25) (end 1.93 1.25) (layer F.Fab) (width 0.1))
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@ -384,15 +384,15 @@
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)
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)
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(module Capacitors_THT:C_Disc_D4.7mm_W2.5mm_P5.00mm (layer F.Cu) (tedit 590E3CE1) (tstamp 590E0B87)
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(module Capacitors_THT:C_Disc_D4.7mm_W2.5mm_P5.00mm (layer F.Cu) (tedit 5918ADF6) (tstamp 590E0B87)
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(at 140.97 115.57 180)
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(descr "C, Disc series, Radial, pin pitch=5.00mm, , diameter*width=4.7*2.5mm^2, Capacitor, http://www.vishay.com/docs/45233/krseries.pdf")
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(tags "C Disc series Radial pin pitch 5.00mm diameter 4.7mm width 2.5mm Capacitor")
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(path /590DFF39)
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(fp_text reference C1 (at 5.08 2.54 180) (layer F.SilkS)
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(fp_text reference C1 (at 2.54 2.54 180) (layer F.SilkS)
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(effects (font (size 1 1) (thickness 0.15)))
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)
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(fp_text value 100nF (at 1.27 2.54 180) (layer F.SilkS)
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(fp_text value 100nF (at 2.54 0 180) (layer F.SilkS)
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(effects (font (size 1 1) (thickness 0.15)))
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)
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(fp_line (start 0.15 -1.25) (end 0.15 1.25) (layer F.Fab) (width 0.1))
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@ -420,15 +420,15 @@
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)
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)
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(module Capacitors_THT:C_Disc_D4.7mm_W2.5mm_P5.00mm (layer F.Cu) (tedit 590E3CEE) (tstamp 590E0B8D)
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(module Capacitors_THT:C_Disc_D4.7mm_W2.5mm_P5.00mm (layer F.Cu) (tedit 5918AE06) (tstamp 590E0B8D)
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(at 99.06 137.16)
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(descr "C, Disc series, Radial, pin pitch=5.00mm, , diameter*width=4.7*2.5mm^2, Capacitor, http://www.vishay.com/docs/45233/krseries.pdf")
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(tags "C Disc series Radial pin pitch 5.00mm diameter 4.7mm width 2.5mm Capacitor")
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(path /590E0960)
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(fp_text reference C2 (at 0 -2.54) (layer F.SilkS)
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(fp_text reference C2 (at 2.54 -2.54) (layer F.SilkS)
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(effects (font (size 1 1) (thickness 0.15)))
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)
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(fp_text value 100nF (at 3.81 -2.54) (layer F.SilkS)
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(fp_text value 100nF (at 2.54 0) (layer F.SilkS)
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(effects (font (size 1 1) (thickness 0.15)))
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)
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(fp_line (start 0.15 -1.25) (end 0.15 1.25) (layer F.Fab) (width 0.1))
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@ -1,7 +1,7 @@
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(export (version D)
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(design
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(source "D:/ownCloud/Documents/Projects/RC6502/RC6502 RAM/RC6502 RAM.sch")
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(date "06/05/2017 21:17:26")
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(date "14/05/2017 21:19:26")
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(tool "Eeschema 4.0.6")
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(sheet (number 1) (name /) (tstamps /)
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(title_block
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@ -231,14 +231,14 @@
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(pin (num 1) (name ~) (type passive))
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(pin (num 2) (name ~) (type passive)))))
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(libraries
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(library (logical memory)
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(uri "C:\\Program Files\\KiCad\\share\\kicad\\library\\memory.lib"))
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(library (logical device)
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(uri "C:\\Program Files\\KiCad\\share\\kicad\\library\\device.lib"))
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(library (logical conn)
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(uri "C:\\Program Files\\KiCad\\share\\kicad\\library\\conn.lib"))
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(library (logical 74xx)
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(uri "C:\\Program Files\\KiCad\\share\\kicad\\library\\74xx.lib")))
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(uri "C:\\Program Files\\KiCad\\share\\kicad\\library\\74xx.lib"))
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(library (logical memory)
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(uri "C:\\Program Files\\KiCad\\share\\kicad\\library\\memory.lib")))
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(nets
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(net (code 1) (name "Net-(J3-Pad23)")
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(node (ref J3) (pin 23)))
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