From 6f96e5c739ebfce6f081ad9dbb5f6e704a57bb4f Mon Sep 17 00:00:00 2001 From: Unknown Date: Sun, 14 May 2017 21:51:30 +0200 Subject: [PATCH] Added oscillator to CPU board --- RC6502 CPU/RC6502 CPU-cache.lib | 36 ++++ RC6502 CPU/RC6502 CPU.kicad_pcb | 309 +++++++++++++++++++++++++++---- RC6502 CPU/RC6502 CPU.net | 314 +++++++++++++++++++------------- RC6502 CPU/RC6502 CPU.pro | 7 +- RC6502 CPU/RC6502 CPU.sch | 299 +++++++++++++++++------------- 5 files changed, 671 insertions(+), 294 deletions(-) diff --git a/RC6502 CPU/RC6502 CPU-cache.lib b/RC6502 CPU/RC6502 CPU-cache.lib index 2f53e2d..9951ed6 100644 --- a/RC6502 CPU/RC6502 CPU-cache.lib +++ b/RC6502 CPU/RC6502 CPU-cache.lib @@ -176,6 +176,42 @@ X P39 39 -200 -1900 150 R 50 50 1 1 P ENDDRAW ENDDEF # +# CXO_DIP14 +# +DEF CXO_DIP14 X 0 10 Y Y 1 F N +F0 "X" -200 250 50 H V L CNN +F1 "CXO_DIP14" 50 -250 50 H V L CNN +F2 "Oscillators:Oscillator_DIP-14" 450 -350 50 H I C CNN +F3 "" -100 0 50 H I C CNN +ALIAS TFT680 GTXO-14T +$FPLIST + Oscillator*DIP*14* +$ENDFPLIST +DRAW +S -200 200 200 -200 0 1 10 f +P 9 0 1 0 -75 -25 -50 -25 -50 25 -25 25 -25 -25 0 -25 0 25 25 25 25 -25 N +X EN 1 -300 0 100 R 50 50 1 1 I +X GND 7 0 -300 100 U 50 50 1 1 W +X OUT 8 300 0 100 L 50 50 1 1 O +X Vcc 14 0 300 100 D 50 50 1 1 W +ENDDRAW +ENDDEF +# +# Jumper_NO_Small +# +DEF Jumper_NO_Small JP 0 30 N N 1 F N +F0 "JP" 0 80 50 H V C CNN +F1 "Jumper_NO_Small" 10 -60 50 H V C CNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +C -40 0 20 0 1 0 N +C 40 0 20 0 1 0 N +X 1 1 -100 0 40 R 50 50 0 1 P +X 2 2 100 0 40 L 50 50 0 1 P +ENDDRAW +ENDDEF +# # R # DEF R R 0 0 N Y 1 F N diff --git a/RC6502 CPU/RC6502 CPU.kicad_pcb b/RC6502 CPU/RC6502 CPU.kicad_pcb index ac8e088..34561ec 100644 --- a/RC6502 CPU/RC6502 CPU.kicad_pcb +++ b/RC6502 CPU/RC6502 CPU.kicad_pcb @@ -1,15 +1,15 @@ (kicad_pcb (version 4) (host pcbnew 4.0.6) (general - (links 52) + (links 57) (no_connects 0) (area 92.634999 91.364999 191.845001 141.045001) (thickness 1.6) - (drawings 51) - (tracks 283) + (drawings 59) + (tracks 301) (zones 0) - (modules 10) - (nets 37) + (modules 13) + (nets 39) ) (page A4) @@ -127,6 +127,8 @@ (net 34 "Net-(J2-Pad1)") (net 35 "Net-(J3-Pad2)") (net 36 "Net-(R1-Pad1)") + (net 37 "Net-(JP1-Pad1)") + (net 38 "Net-(JP2-Pad2)") (net_class Default "This is the default net class." (clearance 0.2) @@ -165,6 +167,8 @@ (add_net NMI) (add_net "Net-(J2-Pad1)") (add_net "Net-(J3-Pad2)") + (add_net "Net-(JP1-Pad1)") + (add_net "Net-(JP2-Pad2)") (add_net "Net-(R1-Pad1)") (add_net PHI2) (add_net R/W) @@ -1361,12 +1365,12 @@ ) ) - (module Housings_DIP:DIP-14_W7.62mm_Socket (layer F.Cu) (tedit 590E409F) (tstamp 590CEAE6) + (module Housings_DIP:DIP-14_W7.62mm_Socket (layer F.Cu) (tedit 5918AC44) (tstamp 590CEAE6) (at 97.79 110.49) (descr "14-lead dip package, row spacing 7.62 mm (300 mils), Socket") (tags "DIL DIP PDIP 2.54mm 7.62mm 300mil Socket") (path /590BCEA0) - (fp_text reference U2 (at 3.81 -2.39) (layer F.SilkS) + (fp_text reference U2 (at -2.54 15.24 90) (layer F.SilkS) (effects (font (size 1 1) (thickness 0.15))) ) (fp_text value 74HCT04 (at -2.54 10.16 90) (layer F.SilkS) @@ -1423,15 +1427,15 @@ ) ) - (module Capacitors_THT:C_Disc_D4.7mm_W2.5mm_P5.00mm (layer F.Cu) (tedit 590DA7CF) (tstamp 590DA656) + (module Capacitors_THT:C_Disc_D4.7mm_W2.5mm_P5.00mm (layer F.Cu) (tedit 5918B3F2) (tstamp 590DA656) (at 109.22 115.57 270) (descr "C, Disc series, Radial, pin pitch=5.00mm, , diameter*width=4.7*2.5mm^2, Capacitor, http://www.vishay.com/docs/45233/krseries.pdf") (tags "C Disc series Radial pin pitch 5.00mm diameter 4.7mm width 2.5mm Capacitor") (path /590DA9CE) - (fp_text reference C1 (at 7.62 0 270) (layer F.SilkS) + (fp_text reference C1 (at -2.54 0 360) (layer F.SilkS) (effects (font (size 1 1) (thickness 0.15))) ) - (fp_text value 100nF (at -3.81 0 450) (layer F.Fab) + (fp_text value 100nF (at 2.54 0 450) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (fp_line (start 0.15 -1.25) (end 0.15 1.25) (layer F.Fab) (width 0.1)) @@ -1459,12 +1463,12 @@ ) ) - (module Capacitors_THT:C_Disc_D4.7mm_W2.5mm_P5.00mm (layer F.Cu) (tedit 590E416E) (tstamp 590DA8D6) + (module Capacitors_THT:C_Disc_D4.7mm_W2.5mm_P5.00mm (layer F.Cu) (tedit 5918B3FF) (tstamp 590DA8D6) (at 146.05 129.54) (descr "C, Disc series, Radial, pin pitch=5.00mm, , diameter*width=4.7*2.5mm^2, Capacitor, http://www.vishay.com/docs/45233/krseries.pdf") (tags "C Disc series Radial pin pitch 5.00mm diameter 4.7mm width 2.5mm Capacitor") (path /590DB42B) - (fp_text reference C2 (at 7.62 0) (layer F.SilkS) + (fp_text reference C2 (at 7.62 0 180) (layer F.SilkS) (effects (font (size 1 1) (thickness 0.15))) ) (fp_text value 100nF (at 2.54 0) (layer F.Fab) @@ -1495,6 +1499,217 @@ ) ) + (module Pin_Headers:Pin_Header_Angled_1x02_Pitch2.54mm (layer F.Cu) (tedit 5918B4AA) (tstamp 5918B229) + (at 165.1 92.71 90) + (descr "Through hole angled pin header, 1x02, 2.54mm pitch, 6mm pin length, single row") + (tags "Through hole angled pin header THT 1x02 2.54mm single row") + (path /5918C6D4) + (fp_text reference JP1 (at 4.315 -2.27 90) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value "XTAL Power" (at 6.35 5.08 90) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start 1.4 -1.27) (end 1.4 1.27) (layer F.Fab) (width 0.1)) + (fp_line (start 1.4 1.27) (end 3.9 1.27) (layer F.Fab) (width 0.1)) + (fp_line (start 3.9 1.27) (end 3.9 -1.27) (layer F.Fab) (width 0.1)) + (fp_line (start 3.9 -1.27) (end 1.4 -1.27) (layer F.Fab) (width 0.1)) + (fp_line (start 0 -0.32) (end 0 0.32) (layer F.Fab) (width 0.1)) + (fp_line (start 0 0.32) (end 9.9 0.32) (layer F.Fab) (width 0.1)) + (fp_line (start 9.9 0.32) (end 9.9 -0.32) (layer F.Fab) (width 0.1)) + (fp_line (start 9.9 -0.32) (end 0 -0.32) (layer F.Fab) (width 0.1)) + (fp_line (start 1.4 1.27) (end 1.4 3.81) (layer F.Fab) (width 0.1)) + (fp_line (start 1.4 3.81) (end 3.9 3.81) (layer F.Fab) (width 0.1)) + (fp_line (start 3.9 3.81) (end 3.9 1.27) (layer F.Fab) (width 0.1)) + (fp_line (start 3.9 1.27) (end 1.4 1.27) (layer F.Fab) (width 0.1)) + (fp_line (start 0 2.22) (end 0 2.86) (layer F.Fab) (width 0.1)) + (fp_line (start 0 2.86) (end 9.9 2.86) (layer F.Fab) (width 0.1)) + (fp_line (start 9.9 2.86) (end 9.9 2.22) (layer F.Fab) (width 0.1)) + (fp_line (start 9.9 2.22) (end 0 2.22) (layer F.Fab) (width 0.1)) + (fp_line (start 1.34 -1.33) (end 1.34 1.27) (layer F.SilkS) (width 0.12)) + (fp_line (start 1.34 1.27) (end 3.96 1.27) (layer F.SilkS) (width 0.12)) + (fp_line (start 3.96 1.27) (end 3.96 -1.33) (layer F.SilkS) (width 0.12)) + (fp_line (start 3.96 -1.33) (end 1.34 -1.33) (layer F.SilkS) (width 0.12)) + (fp_line (start 3.96 -0.38) (end 3.96 0.38) (layer F.SilkS) (width 0.12)) + (fp_line (start 3.96 0.38) (end 9.96 0.38) (layer F.SilkS) (width 0.12)) + (fp_line (start 9.96 0.38) (end 9.96 -0.38) (layer F.SilkS) (width 0.12)) + (fp_line (start 9.96 -0.38) (end 3.96 -0.38) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.91 -0.38) (end 1.34 -0.38) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.91 0.38) (end 1.34 0.38) (layer F.SilkS) (width 0.12)) + (fp_line (start 3.96 -0.26) (end 9.96 -0.26) (layer F.SilkS) (width 0.12)) + (fp_line (start 3.96 -0.14) (end 9.96 -0.14) (layer F.SilkS) (width 0.12)) + (fp_line (start 3.96 -0.02) (end 9.96 -0.02) (layer F.SilkS) (width 0.12)) + (fp_line (start 3.96 0.1) (end 9.96 0.1) (layer F.SilkS) (width 0.12)) + (fp_line (start 3.96 0.22) (end 9.96 0.22) (layer F.SilkS) (width 0.12)) + (fp_line (start 3.96 0.34) (end 9.96 0.34) (layer F.SilkS) (width 0.12)) + (fp_line (start 1.34 1.27) (end 1.34 3.87) (layer F.SilkS) (width 0.12)) + (fp_line (start 1.34 3.87) (end 3.96 3.87) (layer F.SilkS) (width 0.12)) + (fp_line (start 3.96 3.87) (end 3.96 1.27) (layer F.SilkS) (width 0.12)) + (fp_line (start 3.96 1.27) (end 1.34 1.27) (layer F.SilkS) (width 0.12)) + (fp_line (start 3.96 2.16) (end 3.96 2.92) (layer F.SilkS) (width 0.12)) + (fp_line (start 3.96 2.92) (end 9.96 2.92) (layer F.SilkS) (width 0.12)) + (fp_line (start 9.96 2.92) (end 9.96 2.16) (layer F.SilkS) (width 0.12)) + (fp_line (start 9.96 2.16) (end 3.96 2.16) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.91 2.16) (end 1.34 2.16) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.91 2.92) (end 1.34 2.92) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.27 0) (end -1.27 -1.27) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.27 -1.27) (end 0 -1.27) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.8 -1.8) (end -1.8 4.35) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.8 4.35) (end 10.4 4.35) (layer F.CrtYd) (width 0.05)) + (fp_line (start 10.4 4.35) (end 10.4 -1.8) (layer F.CrtYd) (width 0.05)) + (fp_line (start 10.4 -1.8) (end -1.8 -1.8) (layer F.CrtYd) (width 0.05)) + (fp_text user %R (at 4.315 -2.27 90) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (pad 1 thru_hole rect (at 0 0 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) + (net 37 "Net-(JP1-Pad1)")) + (pad 2 thru_hole oval (at 0 2.54 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) + (net 18 VCC)) + (model ${KISYS3DMOD}/Pin_Headers.3dshapes/Pin_Header_Angled_1x02_Pitch2.54mm.wrl + (at (xyz 0 -0.05 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 90)) + ) + ) + + (module Pin_Headers:Pin_Header_Angled_1x02_Pitch2.54mm (layer F.Cu) (tedit 5918B4A7) (tstamp 5918B22F) + (at 154.94 92.71 90) + (descr "Through hole angled pin header, 1x02, 2.54mm pitch, 6mm pin length, single row") + (tags "Through hole angled pin header THT 1x02 2.54mm single row") + (path /5918CD82) + (fp_text reference JP2 (at 4.315 -2.27 90) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value "XTAL Enable" (at 6.35 5.08 90) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start 1.4 -1.27) (end 1.4 1.27) (layer F.Fab) (width 0.1)) + (fp_line (start 1.4 1.27) (end 3.9 1.27) (layer F.Fab) (width 0.1)) + (fp_line (start 3.9 1.27) (end 3.9 -1.27) (layer F.Fab) (width 0.1)) + (fp_line (start 3.9 -1.27) (end 1.4 -1.27) (layer F.Fab) (width 0.1)) + (fp_line (start 0 -0.32) (end 0 0.32) (layer F.Fab) (width 0.1)) + (fp_line (start 0 0.32) (end 9.9 0.32) (layer F.Fab) (width 0.1)) + (fp_line (start 9.9 0.32) (end 9.9 -0.32) (layer F.Fab) (width 0.1)) + (fp_line (start 9.9 -0.32) (end 0 -0.32) (layer F.Fab) (width 0.1)) + (fp_line (start 1.4 1.27) (end 1.4 3.81) (layer F.Fab) (width 0.1)) + (fp_line (start 1.4 3.81) (end 3.9 3.81) (layer F.Fab) (width 0.1)) + (fp_line (start 3.9 3.81) (end 3.9 1.27) (layer F.Fab) (width 0.1)) + (fp_line (start 3.9 1.27) (end 1.4 1.27) (layer F.Fab) (width 0.1)) + (fp_line (start 0 2.22) (end 0 2.86) (layer F.Fab) (width 0.1)) + (fp_line (start 0 2.86) (end 9.9 2.86) (layer F.Fab) (width 0.1)) + (fp_line (start 9.9 2.86) (end 9.9 2.22) (layer F.Fab) (width 0.1)) + (fp_line (start 9.9 2.22) (end 0 2.22) (layer F.Fab) (width 0.1)) + (fp_line (start 1.34 -1.33) (end 1.34 1.27) (layer F.SilkS) (width 0.12)) + (fp_line (start 1.34 1.27) (end 3.96 1.27) (layer F.SilkS) (width 0.12)) + (fp_line (start 3.96 1.27) (end 3.96 -1.33) (layer F.SilkS) (width 0.12)) + (fp_line (start 3.96 -1.33) (end 1.34 -1.33) (layer F.SilkS) (width 0.12)) + (fp_line (start 3.96 -0.38) (end 3.96 0.38) (layer F.SilkS) (width 0.12)) + (fp_line (start 3.96 0.38) (end 9.96 0.38) (layer F.SilkS) (width 0.12)) + (fp_line (start 9.96 0.38) (end 9.96 -0.38) (layer F.SilkS) (width 0.12)) + (fp_line (start 9.96 -0.38) (end 3.96 -0.38) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.91 -0.38) (end 1.34 -0.38) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.91 0.38) (end 1.34 0.38) (layer F.SilkS) (width 0.12)) + (fp_line (start 3.96 -0.26) (end 9.96 -0.26) (layer F.SilkS) (width 0.12)) + (fp_line (start 3.96 -0.14) (end 9.96 -0.14) (layer F.SilkS) (width 0.12)) + (fp_line (start 3.96 -0.02) (end 9.96 -0.02) (layer F.SilkS) (width 0.12)) + (fp_line (start 3.96 0.1) (end 9.96 0.1) (layer F.SilkS) (width 0.12)) + (fp_line (start 3.96 0.22) (end 9.96 0.22) (layer F.SilkS) (width 0.12)) + (fp_line (start 3.96 0.34) (end 9.96 0.34) (layer F.SilkS) (width 0.12)) + (fp_line (start 1.34 1.27) (end 1.34 3.87) (layer F.SilkS) (width 0.12)) + (fp_line (start 1.34 3.87) (end 3.96 3.87) (layer F.SilkS) (width 0.12)) + (fp_line (start 3.96 3.87) (end 3.96 1.27) (layer F.SilkS) (width 0.12)) + (fp_line (start 3.96 1.27) (end 1.34 1.27) (layer F.SilkS) (width 0.12)) + (fp_line (start 3.96 2.16) (end 3.96 2.92) (layer F.SilkS) (width 0.12)) + (fp_line (start 3.96 2.92) (end 9.96 2.92) (layer F.SilkS) (width 0.12)) + (fp_line (start 9.96 2.92) (end 9.96 2.16) (layer F.SilkS) (width 0.12)) + (fp_line (start 9.96 2.16) (end 3.96 2.16) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.91 2.16) (end 1.34 2.16) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.91 2.92) (end 1.34 2.92) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.27 0) (end -1.27 -1.27) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.27 -1.27) (end 0 -1.27) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.8 -1.8) (end -1.8 4.35) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.8 4.35) (end 10.4 4.35) (layer F.CrtYd) (width 0.05)) + (fp_line (start 10.4 4.35) (end 10.4 -1.8) (layer F.CrtYd) (width 0.05)) + (fp_line (start 10.4 -1.8) (end -1.8 -1.8) (layer F.CrtYd) (width 0.05)) + (fp_text user %R (at 4.315 -2.27 90) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (pad 1 thru_hole rect (at 0 0 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) + (net 21 CLOCK)) + (pad 2 thru_hole oval (at 0 2.54 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) + (net 38 "Net-(JP2-Pad2)")) + (model ${KISYS3DMOD}/Pin_Headers.3dshapes/Pin_Header_Angled_1x02_Pitch2.54mm.wrl + (at (xyz 0 -0.05 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 90)) + ) + ) + + (module Oscillators:Oscillator_DIP-14 (layer F.Cu) (tedit 5918B3C0) (tstamp 5918B237) + (at 172.72 102.87) + (descr "Oscillator, DIP14, http://cdn-reichelt.de/documents/datenblatt/B400/OSZI.pdf") + (tags oscillator) + (path /5918B14F) + (fp_text reference X1 (at 6.35 -3.81) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 1Mhz (at 10.16 -3.81) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text user %R (at 6.35 -3.81) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start 18.22 2.79) (end 18.22 -10.41) (layer F.CrtYd) (width 0.05)) + (fp_line (start 18.22 -10.41) (end -2.98 -10.41) (layer F.CrtYd) (width 0.05)) + (fp_line (start -2.98 -10.41) (end -2.98 2.79) (layer F.CrtYd) (width 0.05)) + (fp_line (start -2.98 2.79) (end 18.22 2.79) (layer F.CrtYd) (width 0.05)) + (fp_line (start 16.97 1.19) (end 16.97 -8.81) (layer F.Fab) (width 0.1)) + (fp_line (start -1.38 -9.16) (end 16.62 -9.16) (layer F.Fab) (width 0.1)) + (fp_line (start -1.73 1.54) (end -1.73 -8.81) (layer F.Fab) (width 0.1)) + (fp_line (start -1.73 1.54) (end 16.62 1.54) (layer F.Fab) (width 0.1)) + (fp_line (start -2.83 -9.51) (end -2.83 2.64) (layer F.SilkS) (width 0.12)) + (fp_line (start 17.32 -10.26) (end -2.08 -10.26) (layer F.SilkS) (width 0.12)) + (fp_line (start 18.07 1.89) (end 18.07 -9.51) (layer F.SilkS) (width 0.12)) + (fp_line (start -2.83 2.64) (end 17.32 2.64) (layer F.SilkS) (width 0.12)) + (fp_line (start -2.73 2.54) (end 17.32 2.54) (layer F.Fab) (width 0.1)) + (fp_line (start 17.97 -9.51) (end 17.97 1.89) (layer F.Fab) (width 0.1)) + (fp_line (start -2.08 -10.16) (end 17.32 -10.16) (layer F.Fab) (width 0.1)) + (fp_line (start -2.73 2.54) (end -2.73 -9.51) (layer F.Fab) (width 0.1)) + (fp_arc (start 16.62 1.19) (end 16.97 1.19) (angle 90) (layer F.Fab) (width 0.1)) + (fp_arc (start 16.62 -8.81) (end 16.62 -9.16) (angle 90) (layer F.Fab) (width 0.1)) + (fp_arc (start -1.38 -8.81) (end -1.73 -8.81) (angle 90) (layer F.Fab) (width 0.1)) + (fp_arc (start 17.32 1.89) (end 18.07 1.89) (angle 90) (layer F.SilkS) (width 0.12)) + (fp_arc (start 17.32 -9.51) (end 17.32 -10.26) (angle 90) (layer F.SilkS) (width 0.12)) + (fp_arc (start -2.08 -9.51) (end -2.83 -9.51) (angle 90) (layer F.SilkS) (width 0.12)) + (fp_arc (start 17.32 1.89) (end 17.97 1.89) (angle 90) (layer F.Fab) (width 0.1)) + (fp_arc (start 17.32 -9.51) (end 17.32 -10.16) (angle 90) (layer F.Fab) (width 0.1)) + (fp_arc (start -2.08 -9.51) (end -2.73 -9.51) (angle 90) (layer F.Fab) (width 0.1)) + (pad 1 thru_hole rect (at 0 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask)) + (pad 14 thru_hole circle (at 0 -7.62) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 37 "Net-(JP1-Pad1)")) + (pad 8 thru_hole circle (at 15.24 -7.62) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 38 "Net-(JP2-Pad2)")) + (pad 7 thru_hole circle (at 15.24 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 17 GND)) + (model ${KISYS3DMOD}/Oscillators.3dshapes/Oscillator_DIP-14.wrl + (at (xyz 0 0 0)) + (scale (xyz 0.3937 0.3937 0.3937)) + (rotate (xyz 0 0 0)) + ) + ) + + (gr_text "XTAL\nPower" (at 166.37 95.25 270) (layer F.SilkS) + (effects (font (size 1.5 1.5) (thickness 0.3)) (justify left)) + ) + (gr_text "XTAL\nEnable" (at 156.21 95.25 270) (layer F.SilkS) + (effects (font (size 1.5 1.5) (thickness 0.3)) (justify left)) + ) + (gr_line (start 168.91 104.14) (end 168.91 91.44) (angle 90) (layer F.SilkS) (width 0.2)) + (gr_line (start 163.83 104.14) (end 168.91 104.14) (angle 90) (layer F.SilkS) (width 0.2)) + (gr_line (start 163.83 91.44) (end 163.83 104.14) (angle 90) (layer F.SilkS) (width 0.2)) + (gr_line (start 158.75 104.14) (end 158.75 91.44) (angle 90) (layer F.SilkS) (width 0.2)) + (gr_line (start 153.67 104.14) (end 158.75 104.14) (angle 90) (layer F.SilkS) (width 0.2)) + (gr_line (start 153.67 91.44) (end 153.67 104.14) (angle 90) (layer F.SilkS) (width 0.2)) (gr_text "NMI bus\nEnable" (at 115.57 95.25 270) (layer F.SilkS) (effects (font (size 1.5 1.5) (thickness 0.3)) (justify left)) ) @@ -1572,7 +1787,7 @@ (gr_line (start 100.33 128.27) (end 100.33 140.97) (angle 90) (layer F.SilkS) (width 0.2)) (gr_line (start 97.79 128.27) (end 100.33 128.27) (angle 90) (layer F.SilkS) (width 0.2)) (gr_line (start 97.79 140.97) (end 97.79 128.27) (angle 90) (layer F.SilkS) (width 0.2)) - (gr_text "RC6502 CPU\nRevision A" (at 175.26 95.25) (layer F.SilkS) + (gr_text "RC6502 CPU\nRevision A" (at 134.62 99.568) (layer F.SilkS) (effects (font (size 1.5 1.5) (thickness 0.3)) (justify left)) ) (gr_line (start 191.77 140.97) (end 92.71 140.97) (angle 90) (layer Edge.Cuts) (width 0.15)) @@ -1628,6 +1843,10 @@ (segment (start 154.94 139.7) (end 154.94 128.27) (width 0.25) (layer F.Cu) (net 15)) (segment (start 152.4 128.27) (end 149.86 125.73) (width 0.25) (layer F.Cu) (net 16) (tstamp 590CEC09)) (segment (start 152.4 139.7) (end 152.4 128.27) (width 0.25) (layer F.Cu) (net 16)) + (segment (start 187.96 102.87) (end 187.96 105.41) (width 0.25) (layer F.Cu) (net 17)) + (via (at 181.61 114.3) (size 0.6) (drill 0.4) (layers F.Cu B.Cu) (net 17)) + (segment (start 181.61 111.76) (end 181.61 114.3) (width 0.25) (layer F.Cu) (net 17) (tstamp 5918B270)) + (segment (start 187.96 105.41) (end 181.61 111.76) (width 0.25) (layer F.Cu) (net 17) (tstamp 5918B26C)) (segment (start 149.86 137.16) (end 143.51 130.81) (width 0.25) (layer B.Cu) (net 17)) (segment (start 143.51 130.81) (end 142.24 130.81) (width 0.25) (layer B.Cu) (net 17) (tstamp 590DAB35)) (segment (start 149.86 139.7) (end 149.86 137.16) (width 0.25) (layer B.Cu) (net 17)) @@ -1657,30 +1876,33 @@ (segment (start 181.61 128.27) (end 181.61 123.19) (width 0.25) (layer B.Cu) (net 17) (tstamp 590CED64)) (segment (start 180.34 129.54) (end 181.61 128.27) (width 0.25) (layer B.Cu) (net 17) (tstamp 590CED62)) (segment (start 181.61 123.19) (end 181.61 115.57) (width 0.25) (layer B.Cu) (net 17) (tstamp 590CED8F)) + (segment (start 130.81 93.98) (end 152.4 93.98) (width 0.25) (layer F.Cu) (net 18)) + (segment (start 165.1 106.68) (end 168.91 106.68) (width 0.25) (layer B.Cu) (net 18) (tstamp 590D02B9)) + (via (at 165.1 106.68) (size 0.6) (drill 0.4) (layers F.Cu B.Cu) (net 18)) + (segment (start 152.4 93.98) (end 165.1 106.68) (width 0.25) (layer F.Cu) (net 18) (tstamp 5918B2B5)) + (segment (start 167.64 92.71) (end 167.64 105.41) (width 0.25) (layer B.Cu) (net 18)) + (segment (start 167.64 105.41) (end 168.91 106.68) (width 0.25) (layer B.Cu) (net 18) (tstamp 5918B289)) (segment (start 147.32 125.73) (end 147.32 128.27) (width 0.25) (layer F.Cu) (net 18)) (segment (start 147.32 128.27) (end 146.05 129.54) (width 0.25) (layer F.Cu) (net 18) (tstamp 590DAA98)) (segment (start 147.32 137.16) (end 147.32 130.81) (width 0.25) (layer F.Cu) (net 18)) (segment (start 147.32 130.81) (end 146.05 129.54) (width 0.25) (layer F.Cu) (net 18) (tstamp 590DAA92)) (segment (start 181.61 130.81) (end 187.96 130.81) (width 0.25) (layer B.Cu) (net 18) (tstamp 590CFA98)) + (segment (start 147.32 137.16) (end 151.13 133.35) (width 0.25) (layer F.Cu) (net 18)) + (via (at 151.13 133.35) (size 0.6) (drill 0.4) (layers F.Cu B.Cu) (net 18)) + (segment (start 151.13 133.35) (end 153.67 130.81) (width 0.25) (layer B.Cu) (net 18) (tstamp 590CFA8A)) + (segment (start 181.61 107.95) (end 190.5 116.84) (width 0.25) (layer B.Cu) (net 18)) + (segment (start 190.5 116.84) (end 190.5 118.11) (width 0.25) (layer B.Cu) (net 18) (tstamp 590D02A1)) + (segment (start 190.5 118.11) (end 190.5 121.92) (width 0.25) (layer B.Cu) (net 18) (tstamp 590D029D)) + (segment (start 190.5 128.27) (end 190.5 121.92) (width 0.25) (layer B.Cu) (net 18) (tstamp 590CFAAB)) + (segment (start 187.96 130.81) (end 190.5 128.27) (width 0.25) (layer B.Cu) (net 18) (tstamp 590CFAA1)) + (segment (start 180.34 106.68) (end 181.61 107.95) (width 0.25) (layer B.Cu) (net 18) (tstamp 590D01B2)) + (segment (start 179.07 106.68) (end 180.34 106.68) (width 0.25) (layer B.Cu) (net 18) (tstamp 590D01AD)) + (segment (start 168.91 106.68) (end 179.07 106.68) (width 0.25) (layer B.Cu) (net 18) (tstamp 5918B291)) (segment (start 153.67 130.81) (end 181.61 130.81) (width 0.25) (layer B.Cu) (net 18) (tstamp 590CFA8B)) (segment (start 109.22 115.57) (end 109.22 114.3) (width 0.25) (layer F.Cu) (net 18)) (segment (start 109.22 114.3) (end 105.41 110.49) (width 0.25) (layer F.Cu) (net 18) (tstamp 590DA6F6)) (segment (start 110.49 110.49) (end 110.49 114.3) (width 0.25) (layer F.Cu) (net 18)) (segment (start 110.49 114.3) (end 109.22 115.57) (width 0.25) (layer F.Cu) (net 18) (tstamp 590DA6F1)) - (segment (start 151.13 93.98) (end 152.4 93.98) (width 0.25) (layer B.Cu) (net 18)) - (segment (start 151.13 93.98) (end 130.81 93.98) (width 0.25) (layer B.Cu) (net 18) (tstamp 590D01A9)) - (segment (start 165.1 106.68) (end 179.07 106.68) (width 0.25) (layer B.Cu) (net 18) (tstamp 590D02B9)) - (segment (start 179.07 106.68) (end 180.34 106.68) (width 0.25) (layer B.Cu) (net 18) (tstamp 590D01AD)) - (segment (start 180.34 106.68) (end 181.61 107.95) (width 0.25) (layer B.Cu) (net 18) (tstamp 590D01B2)) - (segment (start 187.96 130.81) (end 190.5 128.27) (width 0.25) (layer B.Cu) (net 18) (tstamp 590CFAA1)) - (segment (start 190.5 128.27) (end 190.5 121.92) (width 0.25) (layer B.Cu) (net 18) (tstamp 590CFAAB)) - (segment (start 190.5 118.11) (end 190.5 121.92) (width 0.25) (layer B.Cu) (net 18) (tstamp 590D029D)) - (segment (start 190.5 116.84) (end 190.5 118.11) (width 0.25) (layer B.Cu) (net 18) (tstamp 590D02A1)) - (segment (start 181.61 107.95) (end 190.5 116.84) (width 0.25) (layer B.Cu) (net 18)) - (segment (start 152.4 93.98) (end 165.1 106.68) (width 0.25) (layer B.Cu) (net 18) (tstamp 590D02B3)) - (segment (start 151.13 133.35) (end 153.67 130.81) (width 0.25) (layer B.Cu) (net 18) (tstamp 590CFA8A)) - (via (at 151.13 133.35) (size 0.6) (drill 0.4) (layers F.Cu B.Cu) (net 18)) - (segment (start 147.32 137.16) (end 151.13 133.35) (width 0.25) (layer F.Cu) (net 18)) (segment (start 105.41 109.22) (end 102.87 106.68) (width 0.25) (layer F.Cu) (net 18)) (segment (start 105.41 109.22) (end 105.41 110.49) (width 0.25) (layer F.Cu) (net 18) (tstamp 590CF555)) (segment (start 96.52 105.41) (end 97.79 106.68) (width 0.25) (layer F.Cu) (net 18) (tstamp 590CF548)) @@ -1710,19 +1932,22 @@ (segment (start 142.24 134.62) (end 139.7 132.08) (width 0.25) (layer F.Cu) (net 20) (tstamp 590CF638)) (segment (start 129.54 111.76) (end 129.54 110.49) (width 0.25) (layer F.Cu) (net 20) (tstamp 590CF650)) (segment (start 125.73 115.57) (end 129.54 111.76) (width 0.25) (layer F.Cu) (net 20) (tstamp 590CF79F)) + (segment (start 154.94 92.71) (end 151.13 96.52) (width 0.25) (layer B.Cu) (net 21) (status 400000)) + (segment (start 143.51 104.14) (end 151.13 96.52) (width 0.25) (layer B.Cu) (net 21) (tstamp 5918B2DD)) + (segment (start 143.51 104.14) (end 137.16 110.49) (width 0.25) (layer B.Cu) (net 21)) (segment (start 124.46 130.81) (end 123.19 129.54) (width 0.25) (layer F.Cu) (net 21)) - (segment (start 123.19 116.84) (end 124.46 115.57) (width 0.25) (layer F.Cu) (net 21) (tstamp 590CF7CA)) - (segment (start 123.19 129.54) (end 123.19 116.84) (width 0.25) (layer F.Cu) (net 21) (tstamp 590CF7C9)) - (segment (start 139.7 137.16) (end 139.7 135.89) (width 0.25) (layer F.Cu) (net 21)) - (segment (start 138.43 134.62) (end 137.16 134.62) (width 0.25) (layer F.Cu) (net 21) (tstamp 590CF6D0)) - (segment (start 139.7 135.89) (end 138.43 134.62) (width 0.25) (layer F.Cu) (net 21) (tstamp 590CF6CF)) - (segment (start 137.16 110.49) (end 134.62 113.03) (width 0.25) (layer B.Cu) (net 21)) - (segment (start 127 113.03) (end 124.46 115.57) (width 0.25) (layer F.Cu) (net 21) (tstamp 590CF6B3)) - (via (at 127 113.03) (size 0.6) (drill 0.4) (layers F.Cu B.Cu) (net 21)) - (segment (start 134.62 113.03) (end 127 113.03) (width 0.25) (layer B.Cu) (net 21) (tstamp 590CF6A9)) - (segment (start 139.7 137.16) (end 139.7 139.7) (width 0.25) (layer F.Cu) (net 21) (tstamp 590CF6C9)) - (segment (start 128.27 134.62) (end 137.16 134.62) (width 0.25) (layer F.Cu) (net 21) (tstamp 590CF6BC)) (segment (start 124.46 130.81) (end 128.27 134.62) (width 0.25) (layer F.Cu) (net 21) (tstamp 590CF7A9)) + (segment (start 128.27 134.62) (end 137.16 134.62) (width 0.25) (layer F.Cu) (net 21) (tstamp 590CF6BC)) + (segment (start 139.7 137.16) (end 139.7 139.7) (width 0.25) (layer F.Cu) (net 21) (tstamp 590CF6C9)) + (segment (start 134.62 113.03) (end 127 113.03) (width 0.25) (layer B.Cu) (net 21) (tstamp 590CF6A9)) + (via (at 127 113.03) (size 0.6) (drill 0.4) (layers F.Cu B.Cu) (net 21)) + (segment (start 127 113.03) (end 124.46 115.57) (width 0.25) (layer F.Cu) (net 21) (tstamp 590CF6B3)) + (segment (start 137.16 110.49) (end 134.62 113.03) (width 0.25) (layer B.Cu) (net 21)) + (segment (start 139.7 135.89) (end 138.43 134.62) (width 0.25) (layer F.Cu) (net 21) (tstamp 590CF6CF)) + (segment (start 138.43 134.62) (end 137.16 134.62) (width 0.25) (layer F.Cu) (net 21) (tstamp 590CF6D0)) + (segment (start 139.7 137.16) (end 139.7 135.89) (width 0.25) (layer F.Cu) (net 21)) + (segment (start 123.19 129.54) (end 123.19 116.84) (width 0.25) (layer F.Cu) (net 21) (tstamp 590CF7C9)) + (segment (start 123.19 116.84) (end 124.46 115.57) (width 0.25) (layer F.Cu) (net 21) (tstamp 590CF7CA)) (segment (start 127 92.71) (end 124.46 95.25) (width 0.25) (layer B.Cu) (net 22)) (segment (start 124.46 95.25) (end 124.46 96.52) (width 0.25) (layer B.Cu) (net 22) (tstamp 590D0120)) (segment (start 130.81 133.35) (end 128.27 133.35) (width 0.25) (layer B.Cu) (net 22) (tstamp 590CF7DA)) @@ -1860,5 +2085,13 @@ (segment (start 121.92 123.19) (end 120.65 121.92) (width 0.25) (layer B.Cu) (net 36) (tstamp 590CF90C)) (segment (start 123.19 123.19) (end 121.92 123.19) (width 0.25) (layer B.Cu) (net 36) (tstamp 590CF90A)) (segment (start 129.54 123.19) (end 123.19 123.19) (width 0.25) (layer B.Cu) (net 36) (tstamp 590CF907)) + (segment (start 165.1 92.71) (end 165.1 93.98) (width 0.25) (layer F.Cu) (net 37)) + (segment (start 166.37 95.25) (end 172.72 95.25) (width 0.25) (layer F.Cu) (net 37) (tstamp 5918B2F8)) + (segment (start 165.1 93.98) (end 166.37 95.25) (width 0.25) (layer F.Cu) (net 37) (tstamp 5918B2F5)) + (segment (start 157.48 92.71) (end 157.48 93.98) (width 0.25) (layer F.Cu) (net 38) (status 400000)) + (segment (start 186.69 97.79) (end 187.96 96.52) (width 0.25) (layer F.Cu) (net 38) (tstamp 5918B303)) + (segment (start 187.96 96.52) (end 187.96 95.25) (width 0.25) (layer F.Cu) (net 38) (tstamp 5918B30B)) + (segment (start 161.29 97.79) (end 186.69 97.79) (width 0.25) (layer F.Cu) (net 38) (tstamp 5918B36A)) + (segment (start 157.48 93.98) (end 161.29 97.79) (width 0.25) (layer F.Cu) (net 38) (tstamp 5918B367)) ) diff --git a/RC6502 CPU/RC6502 CPU.net b/RC6502 CPU/RC6502 CPU.net index a57b857..c194b6f 100644 --- a/RC6502 CPU/RC6502 CPU.net +++ b/RC6502 CPU/RC6502 CPU.net @@ -1,7 +1,7 @@ (export (version D) (design (source "D:/ownCloud/Documents/Projects/RC6502/RC6502 CPU/RC6502 CPU.sch") - (date "06/05/2017 12:42:45") + (date "14/05/2017 21:42:41") (tool "Eeschema 4.0.6") (sheet (number 1) (name /) (tstamps /) (title_block @@ -74,7 +74,25 @@ (footprint Capacitors_THT:C_Disc_D4.7mm_W2.5mm_P5.00mm) (libsource (lib device) (part C)) (sheetpath (names /) (tstamps /)) - (tstamp 590DB42B))) + (tstamp 590DB42B)) + (comp (ref X1) + (value CXO_DIP14) + (footprint Oscillators:Oscillator_DIP-14) + (libsource (lib Oscillators) (part CXO_DIP14)) + (sheetpath (names /) (tstamps /)) + (tstamp 5918B14F)) + (comp (ref JP1) + (value "XTAL Power") + (footprint Pin_Headers:Pin_Header_Angled_1x02_Pitch2.54mm) + (libsource (lib device) (part Jumper_NO_Small)) + (sheetpath (names /) (tstamps /)) + (tstamp 5918C6D4)) + (comp (ref JP2) + (value "XTAL Enable") + (footprint Pin_Headers:Pin_Header_Angled_1x02_Pitch2.54mm) + (libsource (lib device) (part Jumper_NO_Small)) + (sheetpath (names /) (tstamps /)) + (tstamp 5918CD82))) (libparts (libpart (lib 74xx) (part 74HCT04) (aliases @@ -173,6 +191,31 @@ (pin (num 37) (name P37) (type passive)) (pin (num 38) (name P38) (type passive)) (pin (num 39) (name P39) (type passive)))) + (libpart (lib Oscillators) (part CXO_DIP14) + (aliases + (alias TFT680) + (alias GTXO-14T)) + (description "Crystal Clock Oscillator, DIP14-style metal package") + (docs http://cdn-reichelt.de/documents/datenblatt/B400/OSZI.pdf) + (footprints + (fp Oscillator*DIP*14*)) + (fields + (field (name Reference) X) + (field (name Value) CXO_DIP14) + (field (name Footprint) Oscillators:Oscillator_DIP-14)) + (pins + (pin (num 1) (name EN) (type input)) + (pin (num 7) (name GND) (type power_in)) + (pin (num 8) (name OUT) (type output)) + (pin (num 14) (name Vcc) (type power_in)))) + (libpart (lib device) (part Jumper_NO_Small) + (description "Jumper, normally open") + (fields + (field (name Reference) JP) + (field (name Value) Jumper_NO_Small)) + (pins + (pin (num 1) (name 1) (type passive)) + (pin (num 2) (name 2) (type passive)))) (libpart (lib device) (part R) (description Resistor) (footprints @@ -232,152 +275,165 @@ (libraries (library (logical 74xx) (uri "C:\\Program Files\\KiCad\\share\\kicad\\library\\74xx.lib")) - (library (logical conn) - (uri "C:\\Program Files\\KiCad\\share\\kicad\\library\\conn.lib")) + (library (logical 65xx) + (uri "D:\\ownCloud\\Documents\\Projects\\RC6502\\RC6502 CPU\\65xx.lib")) + (library (logical Oscillators) + (uri "C:\\Program Files\\KiCad\\share\\kicad\\library\\Oscillators.lib")) (library (logical device) (uri "C:\\Program Files\\KiCad\\share\\kicad\\library\\device.lib")) - (library (logical 65xx) - (uri "D:\\ownCloud\\Documents\\Projects\\RC6502\\RC6502 CPU\\65xx.lib"))) + (library (logical conn) + (uri "C:\\Program Files\\KiCad\\share\\kicad\\library\\conn.lib"))) (nets - (net (code 1) (name "Net-(R1-Pad1)") - (node (ref U1) (pin 2)) - (node (ref R1) (pin 1))) - (net (code 2) (name R/W) + (net (code 1) (name "Net-(U1-Pad35)") + (node (ref U1) (pin 35))) + (net (code 2) (name "Net-(U1-Pad36)") + (node (ref U1) (pin 36))) + (net (code 3) (name "Net-(U1-Pad5)") + (node (ref U1) (pin 5))) + (net (code 4) (name "Net-(U1-Pad3)") + (node (ref U1) (pin 3))) + (net (code 5) (name "Net-(U1-Pad7)") + (node (ref U1) (pin 7))) + (net (code 6) (name R/W) (node (ref U2) (pin 1)) (node (ref J1) (pin 24)) (node (ref U1) (pin 34))) - (net (code 3) (name VCC) - (node (ref C1) (pin 1)) - (node (ref U2) (pin 14)) + (net (code 7) (name VCC) (node (ref J1) (pin 18)) - (node (ref C2) (pin 1)) (node (ref U1) (pin 38)) - (node (ref U1) (pin 8)) + (node (ref JP1) (pin 2)) + (node (ref C1) (pin 1)) + (node (ref C2) (pin 1)) + (node (ref R3) (pin 2)) (node (ref R2) (pin 2)) (node (ref R1) (pin 2)) - (node (ref R3) (pin 2))) - (net (code 4) (name RD) - (node (ref J1) (pin 25)) - (node (ref U2) (pin 2))) - (net (code 5) (name "Net-(J1-Pad35)") + (node (ref U1) (pin 8)) + (node (ref U2) (pin 14))) + (net (code 8) (name RD) + (node (ref U2) (pin 2)) + (node (ref J1) (pin 25))) + (net (code 9) (name "Net-(X1-Pad1)") + (node (ref X1) (pin 1))) + (net (code 10) (name "Net-(JP1-Pad1)") + (node (ref JP1) (pin 1)) + (node (ref X1) (pin 14))) + (net (code 11) (name "Net-(JP2-Pad2)") + (node (ref X1) (pin 8)) + (node (ref JP2) (pin 2))) + (net (code 12) (name "Net-(J1-Pad35)") (node (ref J1) (pin 35))) - (net (code 6) (name "Net-(J1-Pad36)") + (net (code 13) (name "Net-(J1-Pad36)") (node (ref J1) (pin 36))) - (net (code 7) (name "Net-(J1-Pad38)") + (net (code 14) (name "Net-(J1-Pad38)") (node (ref J1) (pin 38))) - (net (code 8) (name "Net-(J1-Pad39)") + (net (code 15) (name "Net-(J1-Pad39)") (node (ref J1) (pin 39))) - (net (code 9) (name "Net-(J2-Pad1)") - (node (ref U1) (pin 4)) - (node (ref J2) (pin 1)) - (node (ref R2) (pin 1))) - (net (code 10) (name "Net-(J3-Pad2)") - (node (ref J3) (pin 2)) - (node (ref R3) (pin 1)) - (node (ref U1) (pin 6))) - (net (code 11) (name "Net-(U1-Pad35)") - (node (ref U1) (pin 35))) - (net (code 12) (name "Net-(U1-Pad36)") - (node (ref U1) (pin 36))) - (net (code 13) (name "Net-(U1-Pad5)") - (node (ref U1) (pin 5))) - (net (code 14) (name "Net-(U1-Pad3)") - (node (ref U1) (pin 3))) - (net (code 15) (name "Net-(U1-Pad7)") - (node (ref U1) (pin 7))) - (net (code 16) (name GND) - (node (ref C1) (pin 2)) - (node (ref J1) (pin 23)) - (node (ref J1) (pin 26)) - (node (ref C2) (pin 2)) - (node (ref U1) (pin 1)) - (node (ref U2) (pin 7)) - (node (ref U1) (pin 21)) - (node (ref J1) (pin 17))) - (net (code 17) (name IRQ) - (node (ref J1) (pin 22)) - (node (ref J2) (pin 2))) - (net (code 18) (name NMI) - (node (ref J3) (pin 1)) - (node (ref J1) (pin 37))) - (net (code 19) (name PHI2) - (node (ref J1) (pin 19)) - (node (ref U1) (pin 39))) - (net (code 20) (name CLOCK) - (node (ref U1) (pin 37)) - (node (ref J1) (pin 21))) - (net (code 21) (name A7) - (node (ref J1) (pin 9)) - (node (ref U1) (pin 16))) - (net (code 22) (name D7) - (node (ref J1) (pin 34)) - (node (ref U1) (pin 26))) - (net (code 23) (name A8) - (node (ref J1) (pin 8)) - (node (ref U1) (pin 17))) - (net (code 24) (name D6) - (node (ref U1) (pin 27)) - (node (ref J1) (pin 33))) - (net (code 25) (name A9) - (node (ref U1) (pin 18)) - (node (ref J1) (pin 7))) - (net (code 26) (name D5) - (node (ref U1) (pin 28)) - (node (ref J1) (pin 32))) - (net (code 27) (name A10) - (node (ref J1) (pin 6)) - (node (ref U1) (pin 19))) - (net (code 28) (name D4) - (node (ref J1) (pin 31)) - (node (ref U1) (pin 29))) - (net (code 29) (name A0) - (node (ref U1) (pin 9)) - (node (ref J1) (pin 16))) - (net (code 30) (name A1) - (node (ref U1) (pin 10)) - (node (ref J1) (pin 15))) - (net (code 31) (name A11) - (node (ref J1) (pin 5)) - (node (ref U1) (pin 20))) - (net (code 32) (name D3) - (node (ref U1) (pin 30)) - (node (ref J1) (pin 30))) - (net (code 33) (name RESET) - (node (ref U1) (pin 40)) - (node (ref J1) (pin 20))) - (net (code 34) (name A2) - (node (ref J1) (pin 14)) - (node (ref U1) (pin 11))) - (net (code 35) (name D2) - (node (ref J1) (pin 29)) - (node (ref U1) (pin 31))) - (net (code 36) (name A3) + (net (code 16) (name NMI) + (node (ref J1) (pin 37)) + (node (ref J3) (pin 1))) + (net (code 17) (name A3) (node (ref J1) (pin 13)) (node (ref U1) (pin 12))) - (net (code 37) (name A12) + (net (code 18) (name GND) + (node (ref X1) (pin 7)) + (node (ref U2) (pin 7)) + (node (ref J1) (pin 23)) + (node (ref U1) (pin 21)) + (node (ref J1) (pin 26)) + (node (ref C1) (pin 2)) + (node (ref C2) (pin 2)) + (node (ref J1) (pin 17)) + (node (ref U1) (pin 1))) + (net (code 19) (name A2) + (node (ref J1) (pin 14)) + (node (ref U1) (pin 11))) + (net (code 20) (name A1) + (node (ref J1) (pin 15)) + (node (ref U1) (pin 10))) + (net (code 21) (name A0) + (node (ref U1) (pin 9)) + (node (ref J1) (pin 16))) + (net (code 22) (name PHI2) + (node (ref U1) (pin 39)) + (node (ref J1) (pin 19))) + (net (code 23) (name A12) (node (ref U1) (pin 22)) (node (ref J1) (pin 4))) - (net (code 38) (name D1) - (node (ref J1) (pin 28)) - (node (ref U1) (pin 32))) - (net (code 39) (name A4) - (node (ref U1) (pin 13)) - (node (ref J1) (pin 12))) - (net (code 40) (name A13) + (net (code 24) (name "Net-(R1-Pad1)") + (node (ref R1) (pin 1)) + (node (ref U1) (pin 2))) + (net (code 25) (name "Net-(J2-Pad1)") + (node (ref R2) (pin 1)) + (node (ref J2) (pin 1)) + (node (ref U1) (pin 4))) + (net (code 26) (name "Net-(J3-Pad2)") + (node (ref R3) (pin 1)) + (node (ref U1) (pin 6)) + (node (ref J3) (pin 2))) + (net (code 27) (name A15) + (node (ref J1) (pin 1)) + (node (ref U1) (pin 25))) + (net (code 28) (name A14) + (node (ref U1) (pin 24)) + (node (ref J1) (pin 2))) + (net (code 29) (name A13) (node (ref U1) (pin 23)) (node (ref J1) (pin 3))) - (net (code 41) (name D0) - (node (ref U1) (pin 33)) - (node (ref J1) (pin 27))) - (net (code 42) (name A5) - (node (ref J1) (pin 11)) - (node (ref U1) (pin 14))) - (net (code 43) (name A14) - (node (ref J1) (pin 2)) - (node (ref U1) (pin 24))) - (net (code 44) (name A6) + (net (code 30) (name A11) + (node (ref J1) (pin 5)) + (node (ref U1) (pin 20))) + (net (code 31) (name A10) + (node (ref J1) (pin 6)) + (node (ref U1) (pin 19))) + (net (code 32) (name A9) + (node (ref J1) (pin 7)) + (node (ref U1) (pin 18))) + (net (code 33) (name A8) + (node (ref J1) (pin 8)) + (node (ref U1) (pin 17))) + (net (code 34) (name A7) + (node (ref U1) (pin 16)) + (node (ref J1) (pin 9))) + (net (code 35) (name A6) (node (ref U1) (pin 15)) (node (ref J1) (pin 10))) - (net (code 45) (name A15) - (node (ref J1) (pin 1)) - (node (ref U1) (pin 25))))) \ No newline at end of file + (net (code 36) (name A5) + (node (ref U1) (pin 14)) + (node (ref J1) (pin 11))) + (net (code 37) (name A4) + (node (ref U1) (pin 13)) + (node (ref J1) (pin 12))) + (net (code 38) (name IRQ) + (node (ref J2) (pin 2)) + (node (ref J1) (pin 22))) + (net (code 39) (name D5) + (node (ref U1) (pin 28)) + (node (ref J1) (pin 32))) + (net (code 40) (name D4) + (node (ref U1) (pin 29)) + (node (ref J1) (pin 31))) + (net (code 41) (name D3) + (node (ref U1) (pin 30)) + (node (ref J1) (pin 30))) + (net (code 42) (name RESET) + (node (ref U1) (pin 40)) + (node (ref J1) (pin 20))) + (net (code 43) (name D2) + (node (ref U1) (pin 31)) + (node (ref J1) (pin 29))) + (net (code 44) (name D1) + (node (ref J1) (pin 28)) + (node (ref U1) (pin 32))) + (net (code 45) (name D0) + (node (ref U1) (pin 33)) + (node (ref J1) (pin 27))) + (net (code 46) (name D7) + (node (ref J1) (pin 34)) + (node (ref U1) (pin 26))) + (net (code 47) (name D6) + (node (ref J1) (pin 33)) + (node (ref U1) (pin 27))) + (net (code 48) (name CLOCK) + (node (ref J1) (pin 21)) + (node (ref JP2) (pin 1)) + (node (ref U1) (pin 37))))) \ No newline at end of file diff --git a/RC6502 CPU/RC6502 CPU.pro b/RC6502 CPU/RC6502 CPU.pro index 8a1b235..dd71b9b 100644 --- a/RC6502 CPU/RC6502 CPU.pro +++ b/RC6502 CPU/RC6502 CPU.pro @@ -1,4 +1,4 @@ -update=06/05/2017 12:57:09 +update=14/05/2017 21:25:43 version=1 last_client=kicad [pcbnew] @@ -23,6 +23,8 @@ ModuleOutlineThickness=0.150000000000 [cvpcb] version=1 NetIExt=net +[general] +version=1 [eeschema] version=1 LibDir= @@ -58,5 +60,4 @@ LibName28=contrib LibName29=valves LibName30=C:/Program Files/KiCad/share/kicad/library/Zilog LibName31=65xx -[general] -version=1 +LibName32=C:/Program Files/KiCad/share/kicad/library/Oscillators diff --git a/RC6502 CPU/RC6502 CPU.sch b/RC6502 CPU/RC6502 CPU.sch index 07dce4b..4ded2ee 100644 --- a/RC6502 CPU/RC6502 CPU.sch +++ b/RC6502 CPU/RC6502 CPU.sch @@ -30,6 +30,7 @@ LIBS:contrib LIBS:valves LIBS:Zilog LIBS:65xx +LIBS:Oscillators LIBS:RC6502 CPU-cache EELAYER 25 0 EELAYER END @@ -51,43 +52,43 @@ Text GLabel 9350 3200 0 60 Output ~ 0 VCC Text GLabel 9350 3300 0 60 Input ~ 0 PHI2 -Text GLabel 4800 2700 2 60 Output ~ 0 +Text GLabel 3300 1700 2 60 Output ~ 0 PHI2 -Text GLabel 4800 2600 2 60 Input ~ 0 +Text GLabel 3300 1600 2 60 Input ~ 0 RESET Text GLabel 9350 3400 0 60 Output ~ 0 RESET $Comp L R R1 U 1 1 590BA496 -P 2550 2700 -F 0 "R1" V 2630 2700 50 0000 C CNN -F 1 "10k" V 2550 2700 50 0000 C CNN -F 2 "Resistors_THT:R_Axial_DIN0207_L6.3mm_D2.5mm_P10.16mm_Horizontal" V 2480 2700 50 0001 C CNN -F 3 "" H 2550 2700 50 0001 C CNN - 1 2550 2700 +P 1050 1700 +F 0 "R1" V 1130 1700 50 0000 C CNN +F 1 "10k" V 1050 1700 50 0000 C CNN +F 2 "Resistors_THT:R_Axial_DIN0207_L6.3mm_D2.5mm_P10.16mm_Horizontal" V 980 1700 50 0001 C CNN +F 3 "" H 1050 1700 50 0001 C CNN + 1 1050 1700 0 1 1 0 $EndComp $Comp L R R2 U 1 1 590BA57A -P 2550 2900 -F 0 "R2" V 2630 2900 50 0000 C CNN -F 1 "10k" V 2550 2900 50 0000 C CNN -F 2 "Resistors_THT:R_Axial_DIN0207_L6.3mm_D2.5mm_P10.16mm_Horizontal" V 2480 2900 50 0001 C CNN -F 3 "" H 2550 2900 50 0001 C CNN - 1 2550 2900 +P 1050 1900 +F 0 "R2" V 1130 1900 50 0000 C CNN +F 1 "10k" V 1050 1900 50 0000 C CNN +F 2 "Resistors_THT:R_Axial_DIN0207_L6.3mm_D2.5mm_P10.16mm_Horizontal" V 980 1900 50 0001 C CNN +F 3 "" H 1050 1900 50 0001 C CNN + 1 1050 1900 0 1 1 0 $EndComp $Comp L R R3 U 1 1 590BA5A2 -P 2550 3100 -F 0 "R3" V 2630 3100 50 0000 C CNN -F 1 "10k" V 2550 3100 50 0000 C CNN -F 2 "Resistors_THT:R_Axial_DIN0207_L6.3mm_D2.5mm_P10.16mm_Horizontal" V 2480 3100 50 0001 C CNN -F 3 "" H 2550 3100 50 0001 C CNN - 1 2550 3100 +P 1050 2100 +F 0 "R3" V 1130 2100 50 0000 C CNN +F 1 "10k" V 1050 2100 50 0000 C CNN +F 2 "Resistors_THT:R_Axial_DIN0207_L6.3mm_D2.5mm_P10.16mm_Horizontal" V 980 2100 50 0001 C CNN +F 3 "" H 1050 2100 50 0001 C CNN + 1 1050 2100 0 1 1 0 $EndComp $Comp @@ -101,26 +102,26 @@ F 3 "" H 9550 3400 50 0001 C CNN 1 9550 3400 1 0 0 -1 $EndComp -Text GLabel 2350 2500 1 60 Input ~ 0 +Text GLabel 850 1500 1 60 Input ~ 0 VCC $Comp L WD65C02 U1 U 1 1 590BAEA4 -P 4150 3500 -F 0 "U1" H 4150 2350 60 0000 C CNN -F 1 "WD65C02" V 4150 3400 60 0000 C CNN -F 2 "Housings_DIP:DIP-40_W15.24mm_Socket" H 3650 3700 60 0001 C CNN -F 3 "" H 3650 3700 60 0000 C CNN - 1 4150 3500 +P 2650 2500 +F 0 "U1" H 2650 1350 60 0000 C CNN +F 1 "WD65C02" V 2650 2400 60 0000 C CNN +F 2 "Housings_DIP:DIP-40_W15.24mm_Socket" H 2150 2700 60 0001 C CNN +F 3 "" H 2150 2700 60 0000 C CNN + 1 2650 2500 1 0 0 -1 $EndComp -Text GLabel 4800 2800 2 60 Input ~ 0 +Text GLabel 3300 1800 2 60 Input ~ 0 VCC -Text GLabel 4800 4500 2 60 Output ~ 0 +Text GLabel 3300 3500 2 60 Output ~ 0 GND Text GLabel 9350 3800 0 60 Input ~ 0 WR -Text GLabel 4800 3200 2 60 Output ~ 0 +Text GLabel 3300 2200 2 60 Output ~ 0 R/W Text GLabel 9350 3900 0 60 Input ~ 0 RD @@ -135,97 +136,97 @@ MREQ Text GLabel 10250 1525 0 60 Input ~ 0 IORQ Wire Wire Line - 2350 2500 2350 3300 + 850 1500 850 2300 Wire Wire Line - 2350 3300 3500 3300 + 850 2300 2000 2300 Wire Wire Line - 2400 3100 2350 3100 -Connection ~ 2350 3100 + 900 2100 850 2100 +Connection ~ 850 2100 Wire Wire Line - 2400 2900 2350 2900 -Connection ~ 2350 2900 + 900 1900 850 1900 +Connection ~ 850 1900 Wire Wire Line - 2400 2700 2350 2700 -Connection ~ 2350 2700 + 900 1700 850 1700 +Connection ~ 850 1700 Wire Wire Line - 2700 2700 3500 2700 + 1200 1700 2000 1700 Wire Wire Line - 2700 2900 3500 2900 + 1200 1900 2000 1900 Wire Wire Line - 2700 3100 3500 3100 + 1200 2100 2000 2100 Wire Wire Line 10250 1525 10600 1525 Wire Wire Line 10425 1525 10425 1650 Connection ~ 10425 1525 -Text GLabel 6800 3050 0 60 Input ~ 0 +Text GLabel 5200 1050 0 60 Input ~ 0 R/W -Text GLabel 7125 3050 2 60 Output ~ 0 +Text GLabel 5525 1050 2 60 Output ~ 0 WR Wire Wire Line - 6800 3050 7125 3050 + 5200 1050 5525 1050 $Comp L 74HCT04 U2 U 1 1 590BCEA0 -P 6900 3525 -F 0 "U2" H 7050 3625 50 0000 C CNN -F 1 "74HCT04" H 7100 3425 50 0000 C CNN -F 2 "Housings_DIP:DIP-14_W7.62mm_Socket" H 6900 3525 50 0001 C CNN -F 3 "" H 6900 3525 50 0001 C CNN - 1 6900 3525 +P 5300 1525 +F 0 "U2" H 5450 1625 50 0000 C CNN +F 1 "74HCT04" H 5500 1425 50 0000 C CNN +F 2 "Housings_DIP:DIP-14_W7.62mm_Socket" H 5300 1525 50 0001 C CNN +F 3 "" H 5300 1525 50 0001 C CNN + 1 5300 1525 1 0 0 -1 $EndComp -Text GLabel 6450 3525 0 60 Input ~ 0 +Text GLabel 4850 1525 0 60 Input ~ 0 R/W -Text GLabel 7350 3525 2 60 Output ~ 0 +Text GLabel 5750 1525 2 60 Output ~ 0 RD -Text GLabel 3500 3400 0 60 Output ~ 0 +Text GLabel 2000 2400 0 60 Output ~ 0 A0 -Text GLabel 3500 3500 0 60 Output ~ 0 +Text GLabel 2000 2500 0 60 Output ~ 0 A1 -Text GLabel 3500 3600 0 60 Output ~ 0 +Text GLabel 2000 2600 0 60 Output ~ 0 A2 -Text GLabel 3500 3700 0 60 Output ~ 0 +Text GLabel 2000 2700 0 60 Output ~ 0 A3 -Text GLabel 3500 3800 0 60 Output ~ 0 +Text GLabel 2000 2800 0 60 Output ~ 0 A4 -Text GLabel 3500 3900 0 60 Output ~ 0 +Text GLabel 2000 2900 0 60 Output ~ 0 A5 -Text GLabel 3500 4000 0 60 Output ~ 0 +Text GLabel 2000 3000 0 60 Output ~ 0 A6 -Text GLabel 3500 4100 0 60 Output ~ 0 +Text GLabel 2000 3100 0 60 Output ~ 0 A7 -Text GLabel 3500 4200 0 60 Output ~ 0 +Text GLabel 2000 3200 0 60 Output ~ 0 A8 -Text GLabel 3500 4300 0 60 Output ~ 0 +Text GLabel 2000 3300 0 60 Output ~ 0 A9 -Text GLabel 3500 4400 0 60 Output ~ 0 +Text GLabel 2000 3400 0 60 Output ~ 0 A10 -Text GLabel 3500 4500 0 60 Output ~ 0 +Text GLabel 2000 3500 0 60 Output ~ 0 A11 -Text GLabel 4800 4100 2 60 Output ~ 0 +Text GLabel 3300 3100 2 60 Output ~ 0 A15 -Text GLabel 4800 4200 2 60 Output ~ 0 +Text GLabel 3300 3200 2 60 Output ~ 0 A14 -Text GLabel 4800 4300 2 60 Output ~ 0 +Text GLabel 3300 3300 2 60 Output ~ 0 A13 -Text GLabel 4800 4400 2 60 Output ~ 0 +Text GLabel 3300 3400 2 60 Output ~ 0 A12 -Text GLabel 4800 3300 2 60 Output ~ 0 +Text GLabel 3300 2300 2 60 Output ~ 0 D0 -Text GLabel 4800 3400 2 60 Output ~ 0 +Text GLabel 3300 2400 2 60 Output ~ 0 D1 -Text GLabel 4800 3500 2 60 Output ~ 0 +Text GLabel 3300 2500 2 60 Output ~ 0 D2 -Text GLabel 4800 3600 2 60 Output ~ 0 +Text GLabel 3300 2600 2 60 Output ~ 0 D3 -Text GLabel 4800 3700 2 60 Output ~ 0 +Text GLabel 3300 2700 2 60 Output ~ 0 D4 -Text GLabel 4800 3800 2 60 Output ~ 0 +Text GLabel 3300 2800 2 60 Output ~ 0 D5 -Text GLabel 4800 4000 2 60 Output ~ 0 +Text GLabel 3300 3000 2 60 Output ~ 0 D7 -Text GLabel 4800 3900 2 60 Output ~ 0 +Text GLabel 3300 2900 2 60 Output ~ 0 D6 Text GLabel 9350 1500 0 60 Input ~ 0 A15 @@ -259,29 +260,29 @@ Text GLabel 9350 2900 0 60 Input ~ 0 A1 Text GLabel 9350 3000 0 60 Input ~ 0 A0 -NoConn ~ 4800 3100 -NoConn ~ 4800 3000 -NoConn ~ 3500 3000 -NoConn ~ 3500 2800 -NoConn ~ 3500 3200 -Text GLabel 4800 2900 2 60 Input ~ 0 +NoConn ~ 3300 2100 +NoConn ~ 3300 2000 +NoConn ~ 2000 2000 +NoConn ~ 2000 1800 +NoConn ~ 2000 2200 +Text GLabel 3300 1900 2 60 Input ~ 0 CLOCK -Text GLabel 9350 3500 0 60 Output ~ 0 +Text GLabel 9350 3500 0 60 BiDi ~ 0 CLOCK -Text GLabel 3500 2600 0 60 Output ~ 0 +Text GLabel 2000 1600 0 60 Output ~ 0 GND Text GLabel 9350 3600 0 60 Output ~ 0 IRQ -Text GLabel 2900 2025 1 60 Input ~ 0 +Text GLabel 1400 1025 1 60 Input ~ 0 IRQ Wire Wire Line - 2900 2300 2900 2900 -Connection ~ 2900 2900 -Text GLabel 3100 2025 1 60 Input ~ 0 + 1400 1300 1400 1900 +Connection ~ 1400 1900 +Text GLabel 1600 1025 1 60 Input ~ 0 NMI Wire Wire Line - 3100 2300 3100 3100 -Connection ~ 3100 3100 + 1600 1300 1600 2100 +Connection ~ 1600 2100 Text GLabel 9350 4100 0 60 BiDi ~ 0 D0 Text GLabel 9350 4200 0 60 BiDi ~ 0 @@ -307,63 +308,113 @@ NMI $Comp L CONN_01X02 J2 U 1 1 590D2BF8 -P 2700 2250 -F 0 "J2" H 2700 2400 50 0000 C CNN -F 1 "IRQ OnBus" V 2800 2250 50 0000 C CNN -F 2 "Pin_Headers:Pin_Header_Angled_1x02_Pitch2.54mm" H 2700 2250 50 0001 C CNN -F 3 "" H 2700 2250 50 0001 C CNN - 1 2700 2250 +P 1200 1250 +F 0 "J2" H 1200 1400 50 0000 C CNN +F 1 "IRQ OnBus" V 1300 1250 50 0000 C CNN +F 2 "Pin_Headers:Pin_Header_Angled_1x02_Pitch2.54mm" H 1200 1250 50 0001 C CNN +F 3 "" H 1200 1250 50 0001 C CNN + 1 1200 1250 -1 0 0 1 $EndComp $Comp L CONN_01X02 J3 U 1 1 590D2C70 -P 3300 2250 -F 0 "J3" H 3300 2400 50 0000 C CNN -F 1 "NMI OnBus" V 3400 2250 50 0000 C CNN -F 2 "Pin_Headers:Pin_Header_Angled_1x02_Pitch2.54mm" H 3300 2250 50 0001 C CNN -F 3 "" H 3300 2250 50 0001 C CNN - 1 3300 2250 +P 1800 1250 +F 0 "J3" H 1800 1400 50 0000 C CNN +F 1 "NMI OnBus" V 1900 1250 50 0000 C CNN +F 2 "Pin_Headers:Pin_Header_Angled_1x02_Pitch2.54mm" H 1800 1250 50 0001 C CNN +F 3 "" H 1800 1250 50 0001 C CNN + 1 1800 1250 1 0 0 -1 $EndComp Wire Wire Line - 2900 2025 2900 2200 + 1400 1025 1400 1200 Wire Wire Line - 3100 2025 3100 2200 + 1600 1025 1600 1200 $Comp L C C1 U 1 1 590DA9CE -P 6275 4600 -F 0 "C1" H 6300 4700 50 0000 L CNN -F 1 "100nF" H 6300 4500 50 0000 L CNN -F 2 "Capacitors_THT:C_Disc_D4.7mm_W2.5mm_P5.00mm" H 6313 4450 50 0001 C CNN -F 3 "" H 6275 4600 50 0001 C CNN - 1 6275 4600 +P 7575 1300 +F 0 "C1" H 7600 1400 50 0000 L CNN +F 1 "100nF" H 7600 1200 50 0000 L CNN +F 2 "Capacitors_THT:C_Disc_D4.7mm_W2.5mm_P5.00mm" H 7613 1150 50 0001 C CNN +F 3 "" H 7575 1300 50 0001 C CNN + 1 7575 1300 1 0 0 -1 $EndComp Wire Wire Line - 5825 4450 6650 4450 + 7125 1150 7950 1150 Wire Wire Line - 5825 4750 6650 4750 -Text GLabel 5825 4875 3 60 Output ~ 0 + 7125 1450 7950 1450 +Text GLabel 7125 1575 3 60 Output ~ 0 GND -Text GLabel 5825 4300 1 60 Input ~ 0 +Text GLabel 7125 1000 1 60 Input ~ 0 VCC Wire Wire Line - 5825 4300 5825 4450 + 7125 1000 7125 1150 Wire Wire Line - 5825 4750 5825 4875 + 7125 1450 7125 1575 $Comp L C C2 U 1 1 590DB42B -P 6650 4600 -F 0 "C2" H 6675 4700 50 0000 L CNN -F 1 "100nF" H 6675 4500 50 0000 L CNN -F 2 "Capacitors_THT:C_Disc_D4.7mm_W2.5mm_P5.00mm" H 6688 4450 50 0001 C CNN -F 3 "" H 6650 4600 50 0001 C CNN - 1 6650 4600 +P 7950 1300 +F 0 "C2" H 7975 1400 50 0000 L CNN +F 1 "100nF" H 7975 1200 50 0000 L CNN +F 2 "Capacitors_THT:C_Disc_D4.7mm_W2.5mm_P5.00mm" H 7988 1150 50 0001 C CNN +F 3 "" H 7950 1300 50 0001 C CNN + 1 7950 1300 1 0 0 -1 $EndComp -Connection ~ 6275 4450 -Connection ~ 6275 4750 +Connection ~ 7575 1150 +Connection ~ 7575 1450 +$Comp +L CXO_DIP14 X1 +U 1 1 5918B14F +P 5200 2800 +F 0 "X1" H 5000 3050 50 0000 L CNN +F 1 "CXO_DIP14" H 5250 2550 50 0000 L CNN +F 2 "Oscillators:Oscillator_DIP-14" H 5650 2450 50 0001 C CNN +F 3 "" H 5100 2800 50 0001 C CNN + 1 5200 2800 + 1 0 0 -1 +$EndComp +Text GLabel 5200 2100 1 60 Input ~ 0 +VCC +Text GLabel 5200 3300 3 60 Output ~ 0 +GND +Wire Wire Line + 5200 3300 5200 3100 +NoConn ~ 4900 2800 +Text GLabel 6000 2800 2 60 Output ~ 0 +CLOCK +$Comp +L Jumper_NO_Small JP1 +U 1 1 5918C6D4 +P 5200 2300 +F 0 "JP1" H 5200 2380 50 0000 C CNN +F 1 "XTAL Power" H 5210 2240 50 0000 C CNN +F 2 "Pin_Headers:Pin_Header_Angled_1x02_Pitch2.54mm" H 5200 2300 50 0001 C CNN +F 3 "" H 5200 2300 50 0001 C CNN + 1 5200 2300 + 0 -1 -1 0 +$EndComp +Wire Wire Line + 5200 2200 5200 2100 +Wire Wire Line + 5200 2400 5200 2500 +$Comp +L Jumper_NO_Small JP2 +U 1 1 5918CD82 +P 5750 2800 +F 0 "JP2" H 5750 2880 50 0000 C CNN +F 1 "XTAL Enable" H 5760 2740 50 0000 C CNN +F 2 "Pin_Headers:Pin_Header_Angled_1x02_Pitch2.54mm" H 5750 2800 50 0001 C CNN +F 3 "" H 5750 2800 50 0001 C CNN + 1 5750 2800 + -1 0 0 1 +$EndComp +Wire Wire Line + 5500 2800 5650 2800 +Wire Wire Line + 5850 2800 6000 2800 $EndSCHEMATC