Apple-1-HW/RC6502-Apple-1-Replica
1
0
Fork 0
mirror of https://github.com/tebl/RC6502-Apple-1-Replica.git synced 2024-11-24 11:30:55 +00:00
Code Issues Projects Releases Wiki Activity

Merge pull request #33 from 0cjs/dev/cjs/21m07/jumper

Browse Source 
Jumper description fixes
This commit is contained in:
tebl 2021-12-07 14:30:39 +01:00 committed by GitHub
commit a8658fbd96
No known key found for this signature in database
GPG Key ID: 4AEE18F83AFDEB23
1 changed files with 5 additions and 7 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

12
RC6502 Apple 1 SBC/README.md
View File

@ -88,20 +88,18 @@ box around the pins that enable.
the expansion bus connector.
- `VP GND`
- Shorted: WD65C02 CPU. Leaves pin 1 of the CPU (`V̅P̅` on the
WD65C02) floating.
- Open: Original MOS 6502, UM6502, SY6502, R65C02. Connects pin 1 of
the CPU to ground, providing an additional ground connection for
the CPU.
- Shorted: Original MOS 6502, UM6502, SY6502, R65C02. Connects pin 1 of the
CPU to ground, providing an additional ground connection for the CPU.
- Open: WD65C02 CPU. Leaves pin 1 of the CPU (`V̅P̅` on the WD65C02) floating.
- `PIA_EN`
- Top pair shorted: Enable PIA. Connects `CS1` to Vcc.
- Bottom pair shorted: Disable PIA. Connects `CS1` to ground.
- `RAM_EN`
- Left pair shorted: Enable RAM. Connects RAM `C̅S̅`/`O̅E̅` to address
- Left or upper pair shorted: Enable RAM. Connects RAM `C̅S̅`/`O̅E̅` to address
decoding logic (`CS_RAM`).
- Right pair shorted: Disable RAM. Connects RAM `C̅S̅`/`O̅E̅` to Vcc.
- Right or lower pair shorted: Disable RAM. Connects RAM `C̅S̅`/`O̅E̅` to Vcc.
- `ROM_EN`
- Top pair shorted: Enable ROM. Connects ROM `C̅E̅`/`O̅E̅` to address