Updated exports before sending to fabrication.

RC6502 Apple 1 SBC/RC6502 Apple 1 SBC.pro

@@ -1,4 +1,4 @@
-update=15/06/2017 16:01:54
+update=20/06/2017 00:08:22
 version=1
 last_client=kicad
 [pcbnew]

RC6502 Apple 1 SBC/export/RC6502 Apple 1 SBC-B.Cu.gbl

@@ -1,7 +1,7 @@
 G04 #@! TF.FileFunction,Copper,L2,Bot,Signal*
 %FSLAX46Y46*%
 G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)*
-G04 Created by KiCad (PCBNEW 4.0.6) date 06/17/17 23:05:01*
+G04 Created by KiCad (PCBNEW 4.0.6) date 06/20/17 00:08:38*
 %MOMM*%
 %LPD*%
 G01*

RC6502 Apple 1 SBC/export/RC6502 Apple 1 SBC-B.Mask.gbs

@@ -1,7 +1,7 @@
 G04 #@! TF.FileFunction,Soldermask,Bot*
 %FSLAX46Y46*%
 G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)*
-G04 Created by KiCad (PCBNEW 4.0.6) date 06/17/17 23:05:01*
+G04 Created by KiCad (PCBNEW 4.0.6) date 06/20/17 00:08:38*
 %MOMM*%
 %LPD*%
 G01*

RC6502 Apple 1 SBC/export/RC6502 Apple 1 SBC-B.Paste.gbp

@@ -1,7 +1,7 @@
 G04 #@! TF.FileFunction,Paste,Bot*
 %FSLAX46Y46*%
 G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)*
-G04 Created by KiCad (PCBNEW 4.0.6) date 06/17/17 23:05:01*
+G04 Created by KiCad (PCBNEW 4.0.6) date 06/20/17 00:08:38*
 %MOMM*%
 %LPD*%
 G01*

RC6502 Apple 1 SBC/export/RC6502 Apple 1 SBC-B.SilkS.gbo

@@ -1,7 +1,7 @@
 G04 #@! TF.FileFunction,Legend,Bot*
 %FSLAX46Y46*%
 G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)*
-G04 Created by KiCad (PCBNEW 4.0.6) date 06/17/17 23:05:01*
+G04 Created by KiCad (PCBNEW 4.0.6) date 06/20/17 00:08:38*
 %MOMM*%
 %LPD*%
 G01*

RC6502 Apple 1 SBC/export/RC6502 Apple 1 SBC-Dwgs.User.gbr

@@ -1,7 +1,7 @@
 G04 #@! TF.FileFunction,Drawing*
 %FSLAX46Y46*%
 G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)*
-G04 Created by KiCad (PCBNEW 4.0.6) date 06/17/17 23:05:01*
+G04 Created by KiCad (PCBNEW 4.0.6) date 06/20/17 00:08:38*
 %MOMM*%
 %LPD*%
 G01*

RC6502 Apple 1 SBC/export/RC6502 Apple 1 SBC-Edge.Cuts.gm1

@@ -1,7 +1,7 @@
 G04 #@! TF.FileFunction,Profile,NP*
 %FSLAX46Y46*%
 G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)*
-G04 Created by KiCad (PCBNEW 4.0.6) date 06/17/17 23:05:01*
+G04 Created by KiCad (PCBNEW 4.0.6) date 06/20/17 00:08:38*
 %MOMM*%
 %LPD*%
 G01*

RC6502 Apple 1 SBC/export/RC6502 Apple 1 SBC-F.Cu.gtl

@@ -1,7 +1,7 @@
 G04 #@! TF.FileFunction,Copper,L1,Top,Signal*
 %FSLAX46Y46*%
 G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)*
-G04 Created by KiCad (PCBNEW 4.0.6) date 06/17/17 23:05:01*
+G04 Created by KiCad (PCBNEW 4.0.6) date 06/20/17 00:08:38*
 %MOMM*%
 %LPD*%
 G01*

RC6502 Apple 1 SBC/export/RC6502 Apple 1 SBC-F.Mask.gts

@@ -1,7 +1,7 @@
 G04 #@! TF.FileFunction,Soldermask,Top*
 %FSLAX46Y46*%
 G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)*
-G04 Created by KiCad (PCBNEW 4.0.6) date 06/17/17 23:05:01*
+G04 Created by KiCad (PCBNEW 4.0.6) date 06/20/17 00:08:38*
 %MOMM*%
 %LPD*%
 G01*

RC6502 Apple 1 SBC/export/RC6502 Apple 1 SBC-F.Paste.gtp

@@ -1,7 +1,7 @@
 G04 #@! TF.FileFunction,Paste,Top*
 %FSLAX46Y46*%
 G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)*
-G04 Created by KiCad (PCBNEW 4.0.6) date 06/17/17 23:05:01*
+G04 Created by KiCad (PCBNEW 4.0.6) date 06/20/17 00:08:38*
 %MOMM*%
 %LPD*%
 G01*

RC6502 Apple 1 SBC/export/RC6502 Apple 1 SBC-F.SilkS.gto

@@ -1,7 +1,7 @@
 G04 #@! TF.FileFunction,Legend,Top*
 %FSLAX46Y46*%
 G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)*
-G04 Created by KiCad (PCBNEW 4.0.6) date 06/17/17 23:05:01*
+G04 Created by KiCad (PCBNEW 4.0.6) date 06/20/17 00:08:38*
 %MOMM*%
 %LPD*%
 G01*

RC6502 Apple 1 SBC/export/RC6502 Apple 1 SBC.drl

@@ -1,5 +1,5 @@
 M48
-;DRILL file {KiCad 4.0.6} date 06/17/17 23:05:05
+;DRILL file {KiCad 4.0.6} date 06/20/17 00:08:41
 ;FORMAT={2:4/ absolute / inch / suppress leading zeros}
 FMAT,2
 INCH,TZ

RC6502 Reset Circuit/Reset circuit.kicad_pcb

@@ -3,7 +3,7 @@
   (general
     (links 55)
     (no_connects 0)
-    (area 92.634999 111.684999 191.845001 147.395001)
+    (area 90.735 110.15 195.938572 156.675001)
     (thickness 1.6)
     (drawings 35)
     (tracks 160)
@@ -87,7 +87,7 @@
       (mirror false)
       (drillshape 0)
       (scaleselection 1)
-      (outputdirectory "D:/ownCloud/Documents/Projects/RC6502/RC6502 Reset Circuit/export/"))
+      (outputdirectory export/))
   )
 
   (net 0 "")

RC6502 Reset Circuit/Reset circuit.pro

@@ -1,4 +1,4 @@
-update=10/06/2017 19:55:35
+update=20/06/2017 00:10:34
 version=1
 last_client=kicad
 [pcbnew]
@@ -65,7 +65,7 @@ LibName33=C:/Program Files/KiCad/share/kicad/library/Oscillators
 [schematic_editor]
 version=1
 PageLayoutDescrFile=
-PlotDirectoryName=D:/ownCloud/Documents/Projects/RC6502/RC6502 Reset Circuit/export/
+PlotDirectoryName=export/
 SubpartIdSeparator=0
 SubpartFirstId=65
 NetFmtName=Pcbnew

RC6502 Reset Circuit/export/Reset circuit-B.Cu.gbl

@@ -1,7 +1,7 @@
 G04 #@! TF.FileFunction,Copper,L2,Bot,Signal*
 %FSLAX46Y46*%
 G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)*
-G04 Created by KiCad (PCBNEW 4.0.6) date 06/10/17 19:53:39*
+G04 Created by KiCad (PCBNEW 4.0.6) date 06/20/17 00:11:08*
 %MOMM*%
 %LPD*%
 G01*

RC6502 Reset Circuit/export/Reset circuit-B.Mask.gbs

@@ -1,7 +1,7 @@
 G04 #@! TF.FileFunction,Soldermask,Bot*
 %FSLAX46Y46*%
 G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)*
-G04 Created by KiCad (PCBNEW 4.0.6) date 06/10/17 19:53:39*
+G04 Created by KiCad (PCBNEW 4.0.6) date 06/20/17 00:11:08*
 %MOMM*%
 %LPD*%
 G01*

RC6502 Reset Circuit/export/Reset circuit-B.Paste.gbp

@@ -1,7 +1,7 @@
 G04 #@! TF.FileFunction,Paste,Bot*
 %FSLAX46Y46*%
 G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)*
-G04 Created by KiCad (PCBNEW 4.0.6) date 06/10/17 19:53:39*
+G04 Created by KiCad (PCBNEW 4.0.6) date 06/20/17 00:11:08*
 %MOMM*%
 %LPD*%
 G01*

RC6502 Reset Circuit/export/Reset circuit-B.SilkS.gbo

@@ -1,7 +1,7 @@
 G04 #@! TF.FileFunction,Legend,Bot*
 %FSLAX46Y46*%
 G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)*
-G04 Created by KiCad (PCBNEW 4.0.6) date 06/10/17 19:53:39*
+G04 Created by KiCad (PCBNEW 4.0.6) date 06/20/17 00:11:08*
 %MOMM*%
 %LPD*%
 G01*

RC6502 Reset Circuit/export/Reset circuit-Dwgs.User.gbr

@@ -1,7 +1,7 @@
 G04 #@! TF.FileFunction,Drawing*
 %FSLAX46Y46*%
 G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)*
-G04 Created by KiCad (PCBNEW 4.0.6) date 06/10/17 19:53:39*
+G04 Created by KiCad (PCBNEW 4.0.6) date 06/20/17 00:11:08*
 %MOMM*%
 %LPD*%
 G01*

RC6502 Reset Circuit/export/Reset circuit-Edge.Cuts.gm1

@@ -1,7 +1,7 @@
 G04 #@! TF.FileFunction,Profile,NP*
 %FSLAX46Y46*%
 G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)*
-G04 Created by KiCad (PCBNEW 4.0.6) date 06/10/17 19:53:39*
+G04 Created by KiCad (PCBNEW 4.0.6) date 06/20/17 00:11:08*
 %MOMM*%
 %LPD*%
 G01*

RC6502 Reset Circuit/export/Reset circuit-F.Cu.gtl

@@ -1,7 +1,7 @@
 G04 #@! TF.FileFunction,Copper,L1,Top,Signal*
 %FSLAX46Y46*%
 G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)*
-G04 Created by KiCad (PCBNEW 4.0.6) date 06/10/17 19:53:39*
+G04 Created by KiCad (PCBNEW 4.0.6) date 06/20/17 00:11:08*
 %MOMM*%
 %LPD*%
 G01*

RC6502 Reset Circuit/export/Reset circuit-F.Mask.gts

@@ -1,7 +1,7 @@
 G04 #@! TF.FileFunction,Soldermask,Top*
 %FSLAX46Y46*%
 G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)*
-G04 Created by KiCad (PCBNEW 4.0.6) date 06/10/17 19:53:39*
+G04 Created by KiCad (PCBNEW 4.0.6) date 06/20/17 00:11:08*
 %MOMM*%
 %LPD*%
 G01*

RC6502 Reset Circuit/export/Reset circuit-F.Paste.gtp

@@ -1,7 +1,7 @@
 G04 #@! TF.FileFunction,Paste,Top*
 %FSLAX46Y46*%
 G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)*
-G04 Created by KiCad (PCBNEW 4.0.6) date 06/10/17 19:53:39*
+G04 Created by KiCad (PCBNEW 4.0.6) date 06/20/17 00:11:08*
 %MOMM*%
 %LPD*%
 G01*

RC6502 Reset Circuit/export/Reset circuit-F.SilkS.gto

@@ -1,7 +1,7 @@
 G04 #@! TF.FileFunction,Legend,Top*
 %FSLAX46Y46*%
 G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)*
-G04 Created by KiCad (PCBNEW 4.0.6) date 06/10/17 19:53:39*
+G04 Created by KiCad (PCBNEW 4.0.6) date 06/20/17 00:11:08*
 %MOMM*%
 %LPD*%
 G01*
@@ -2506,26 +2506,6 @@ X135850239Y-117292381D01*
 X135612143Y-117292381D01*
 X135516905Y-117244762D01*
 X135469286Y-117197143D01*
-X173657381Y-116943095D02*
-X172657381Y-116943095D01*
-X172657381Y-116705000D01*
-X172705000Y-116562142D01*
-X172800238Y-116466904D01*
-X172895476Y-116419285D01*
-X173085952Y-116371666D01*
-X173228810Y-116371666D01*
-X173419286Y-116419285D01*
-X173514524Y-116466904D01*
-X173609762Y-116562142D01*
-X173657381Y-116705000D01*
-X173657381Y-116943095D01*
-X173657381Y-115419285D02*
-X173657381Y-115990714D01*
-X173657381Y-115705000D02*
-X172657381Y-115705000D01*
-X172800238Y-115800238D01*
-X172895476Y-115895476D01*
-X172943095Y-115990714D01*
 X182078334Y-124277381D02*
 X181745000Y-123801190D01*
 X181506905Y-124277381D02*

RC6502 Reset Circuit/export/Reset circuit.drl

@@ -1,5 +1,5 @@
 M48
-;DRILL file {KiCad 4.0.6} date 06/10/17 19:53:42
+;DRILL file {KiCad 4.0.6} date 06/20/17 00:11:12
 ;FORMAT={2:4/ absolute / inch / suppress leading zeros}
 FMAT,2
 INCH,TZ