Apple-1-HW/RC6502-Apple-1-Replica
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Flipped decoder inputs, added details to silkscreen.

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This commit is contained in:
Unknown 2018-12-23 01:12:14 +01:00
parent 6fd7df5eb0
commit f36f8700e3
18 changed files with 12357 additions and 6421 deletions
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1564
RC6502 RAM/RC6502 RAM.kicad_pcb
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28
RC6502 RAM/RC6502 RAM.net
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@ -1,7 +1,7 @@
(export (version D)
(design
(source "D:/ownCloud/Documents/Projects/RC6502/RC6502 RAM/RC6502 RAM.sch")
(date "21/12/2018 19:40:19")
(date "22/12/2018 18:14:11")
(tool "Eeschema 4.0.7")
(sheet (number 1) (name /) (tstamps /)
(title_block
@ -148,7 +148,7 @@
(sheetpath (names /) (tstamps /))
(tstamp 5C1EB83C))
(comp (ref JP9)
(value HI/LO)
(value LO/HI)
(footprint Pin_Headers:Pin_Header_Straight_1x03_Pitch2.54mm)
(libsource (lib device) (part Jumper_NC_Dual))
(sheetpath (names /) (tstamps /))
@ -348,14 +348,14 @@
(pin (num 38) (name P38) (type NotConnected))
(pin (num 39) (name P39) (type NotConnected)))))
(libraries
(library (logical memory)
(uri "C:\\Program Files\\KiCad\\share\\kicad\\library\\memory.lib"))
(library (logical 74xx)
(uri "C:\\Program Files\\KiCad\\share\\kicad\\library\\74xx.lib"))
(library (logical device)
(uri "C:\\Program Files\\KiCad\\share\\kicad\\library\\device.lib"))
(library (logical rc6502_backplane)
(uri D:\ownCloud\Documents\Projects\RC6502\Templates\rc6502_backplane.lib))
(library (logical memory)
(uri "C:\\Program Files\\KiCad\\share\\kicad\\library\\memory.lib")))
(library (logical device)
(uri "C:\\Program Files\\KiCad\\share\\kicad\\library\\device.lib")))
(nets
(net (code 1) (name "Net-(JP6-Pad2)")
(node (ref JP6) (pin 2))
@ -439,17 +439,17 @@
(net (code 17) (name A14)
(node (ref JP2) (pin 2))
(node (ref J3) (pin 2))
(node (ref U2) (pin 1)))
(node (ref U2) (pin 3)))
(net (code 18) (name A13)
(node (ref U2) (pin 2))
(node (ref JP1) (pin 2))
(node (ref J3) (pin 3)))
(node (ref J3) (pin 3))
(node (ref U2) (pin 2)))
(net (code 19) (name "Net-(JP3-Pad2)")
(node (ref U3) (pin 2))
(node (ref JP3) (pin 2)))
(node (ref JP3) (pin 2))
(node (ref U3) (pin 2)))
(net (code 20) (name "Net-(JP4-Pad2)")
(node (ref U3) (pin 3))
(node (ref JP4) (pin 2)))
(node (ref JP4) (pin 2))
(node (ref U3) (pin 3)))
(net (code 21) (name ~CS)
(node (ref U1) (pin 20))
(node (ref U4) (pin 10)))
@ -573,7 +573,7 @@
(node (ref J3) (pin 9)))
(net (code 64) (name A12)
(node (ref U1) (pin 2))
(node (ref U2) (pin 3))
(node (ref U2) (pin 1))
(node (ref J3) (pin 4)))
(net (code 65) (name "Net-(U5-Pad11)")
(node (ref U5) (pin 5))

22
RC6502 RAM/RC6502 RAM.pro
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@ -1,4 +1,4 @@
update=21/12/2018 17:56:55
update=22/12/2018 19:00:07
version=1
last_client=kicad
[pcbnew]
@ -25,16 +25,6 @@ version=1
NetIExt=net
[general]
version=1
[schematic_editor]
version=1
PageLayoutDescrFile=
PlotDirectoryName=D:/ownCloud/Documents/Projects/RC6502/RC6502 RAM/export/
SubpartIdSeparator=0
SubpartFirstId=65
NetFmtName=
SpiceForceRefPrefix=0
SpiceUseNetNumbers=0
LabSize=60
[eeschema]
version=1
LibDir=
@ -69,3 +59,13 @@ LibName27=atmel
LibName28=contrib
LibName29=valves
LibName30=D:/ownCloud/Documents/Projects/RC6502/Templates/rc6502_backplane
[schematic_editor]
version=1
PageLayoutDescrFile=
PlotDirectoryName=D:/ownCloud/Documents/Projects/RC6502/RC6502 RAM/export/
SubpartIdSeparator=0
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NetFmtName=Pcbnew
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SpiceUseNetNumbers=0
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12
RC6502 RAM/RC6502 RAM.sch
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@ -158,8 +158,8 @@ Text GLabel 1450 1125 0 60 Input ~ 0
A1
Text GLabel 1450 1025 0 60 Input ~ 0
A0
Text Notes 8175 8000 2 60 ~ 0
RC6502 Pageable RAM
Text Notes 8950 7500 2 60 ~ 0
RC6502 Enhanced RAM/ROM board
Text Notes 10625 7650 2 60 ~ 0
B
Text GLabel 10300 3950 0 60 Output ~ 0
@ -199,11 +199,11 @@ F 3 "" H 1575 6975 50 0001 C CNN
1 1575 6975
1 0 0 -1
$EndComp
Text GLabel 975 6625 0 60 Input ~ 0
Text GLabel 975 6825 0 60 Input ~ 0
A14
Text GLabel 975 6725 0 60 Input ~ 0
A13
Text GLabel 975 6825 0 60 Input ~ 0
Text GLabel 975 6625 0 60 Input ~ 0
A12
$Comp
L RC6502_Backplane J3
@ -966,7 +966,7 @@ L Jumper_NC_Dual JP9
U 1 1 5C1ECAEA
P 3500 1325
F 0 "JP9" H 3550 1225 50 0000 L CNN
F 1 "HI/LO" H 3500 1425 50 0000 C BNN
F 1 "LO/HI" H 3500 1425 50 0000 C BNN
F 2 "Pin_Headers:Pin_Header_Straight_1x03_Pitch2.54mm" H 3500 1325 50 0001 C CNN
F 3 "" H 3500 1325 50 0001 C CNN
1 3500 1325
@ -987,4 +987,6 @@ Wire Wire Line
Wire Wire Line
5100 1325 5175 1325
Connection ~ 5100 1325
Text Notes 7025 6775 0 60 ~ 0
Enhanced RAM board with added support for ROM ICs of type 28C64 or 28C256, can be\naddressed high/low. Individual 4k blocks can be enabled via jumpers.
$EndSCHEMATC

7675
RC6502 RAM/export/RC6502 RAM-B.Cu.gbl
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176
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