6 Commits

Author	SHA1	Message	Date
Unknown	ccf3dba2f7	Updated VDU schematic with rev. B fixes	2019-02-20 11:18:12 +01:00
Unknown	4580e78f18	VDU PCB layout done	2018-12-30 11:16:17 +01:00
Unknown	d0f6b369fd	Changed VDU CS logic ins schematic	2018-12-29 13:56:20 +01:00
Unknown	3f523c1871	Added analog circuit	2018-12-04 20:54:18 +01:00
Unknown	f7b1b1b4cd	Digital logic added to schematic	2018-12-04 20:29:43 +01:00
Unknown	f480eb7541	VDU basic IO mapping start	2018-12-02 20:17:55 +01:00