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apple1serial
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Timings for write fixed, software reset added

This commit is contained in:
Piotr Jaczewski 2020-05-25 00:53:53 +02:00
parent f614cffe86
commit 7de77dd557
5 changed files with 313 additions and 64 deletions
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26
address_decoder.jed
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@ -2,31 +2,33 @@
GAL20V8
EQN2JED - Boolean Equations to JEDEC file assembler (Version V101)
Copyright (c) National Semiconductor Corporation 1990-1993
Assembled from "d:/ADDRES~1.EQN". Date: 3-31-120
Assembled from "e:/APPLE1~1/ADDRES~1.EQN". Date: 5-24-120
*
NOTE PINS RW:2 A0:3 A1:4 A2:5 A3:6 A4:7 A5:8 A6:9 A7:10 A8:11*
NOTE PINS GND:12 A9:14 A10:15 A11:16 SR:17 RD:18 WD:19 ROM:20*
NOTE PINS NC1:21 NC2:22 R:23 VCC:24*
NOTE PINS RES:21 PHI:22 R:23 VCC:24*
NOTE GALMODE SMALL*
QF2706*QP24*F0*
L0320
0111011010111011101110111010101010101011*
L0640
1111111011111111111111111111111111110111
1111111011111111111111111111111111011111
1111111011111111111111111111110111111111
1111111011111111111111111101111111111111*
0111111011111111111111111111111111110111
0111111011111111111111111111111111011111
0111111011111111111111111111110111111111
0111111011111111111111111101111111111111*
L0960
1011011010111011101110111010101001101011*
1011011010011011101110111010101001101011*
L1280
0111101010111011101110111010101001101011*
0111101010011011101110111010101001101011*
L1600
0111101010111011101110111010101010101011*
L2560
11011100*
01011100*
L2632
00000011*
10000011*
L2640
0000000000000000111100001000000010000000100000000000000000000000*
0000000010000000111100001000000010000000100000000000000000000000*
L2704
10*
C1C79*
C1FC0*
0000

219
address_decoder.log Normal file
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@ -0,0 +1,219 @@
EQN2JED - Boolean Equations to JEDEC file assembler (Version V101)
Copyright (c) National Semiconductor Corporation 1990-1993
Log file for e:/APPLE1~1/ADDRES~1.EQN
Device: 20V8
Pin Label Type
--- ----- ----
2 RW pos,com input
3 A0 pos,com input
4 A1 pos,com input
5 A2 pos,com input
6 A3 pos,com input
7 A4 pos,com input
8 A5 pos,com input
9 A6 pos,com input
10 A7 pos,com input
11 A8 pos,com input
12 GND ground pin
14 A9 pos,com input
15 A10 pos,com input
16 A11 pos,com input
17 SR pos,com output
18 RD pos,com output
19 WD pos,com output
20 ROM neg,com output
21 RES pos,com output
22 PHI pos,com input
23 R pos,com input
24 VCC power pin
EQN2JED - Boolean Equations to JEDEC file assembler (Version V101)
Copyright (c) National Semiconductor Corporation 1990-1993
Device Utilization:
No of dedicated inputs used : 14/14 (100.0%)
No of feedbacks used as dedicated inputs : 1/6 (16.7%)
No of dedicated outputs used : 2/2 (100.0%)
No of feedbacks used as dedicated outputs : 3/6 (50.0%)
------------------------------------------
Pin Label Terms Usage
------------------------------------------
21 RES 1/8 (12.5%)
20 ROM 4/8 (50.0%)
19 WD 1/8 (12.5%)
18 RD 1/8 (12.5%)
17 SR 1/8 (12.5%)
------------------------------------------
Total Terms 8/64 (12.5%)
------------------------------------------
EQN2JED - Boolean Equations to JEDEC file assembler (Version V101)
Copyright (c) National Semiconductor Corporation 1990-1993
Chip diagram (DIP)
._____ _____.
| \__/ |
| 1 24 | VCC
RW | 2 23 | R
A0 | 3 22 | PHI
A1 | 4 21 | RES
A2 | 5 20 | ROM
A3 | 6 19 | WD
A4 | 7 18 | RD
A5 | 8 17 | SR
A6 | 9 16 | A11
A7 | 10 15 | A10
A8 | 11 14 | A9
GND | 12 13 |
|______________|
EQN2JED - Boolean Equations to JEDEC file assembler (Version V101)
Copyright (c) National Semiconductor Corporation 1990-1993
Log file for e:/APPLE1~1/ADDRES~1.EQN
Device: 20V8
Pin Label Type
--- ----- ----
2 RW pos,com input
3 A0 pos,com input
4 A1 pos,com input
5 A2 pos,com input
6 A3 pos,com input
7 A4 pos,com input
8 A5 pos,com input
9 A6 pos,com input
10 A7 pos,com input
11 A8 pos,com input
12 GND ground pin
14 A9 pos,com input
15 A10 pos,com input
16 A11 pos,com input
17 SR pos,com output
18 RD pos,com output
19 WD pos,com output
20 ROM neg,com output
21 RES pos,com output
22 PHI pos,com input
23 R pos,com input
24 VCC power pin
EQN2JED - Boolean Equations to JEDEC file assembler (Version V101)
Copyright (c) National Semiconductor Corporation 1990-1993
Device Utilization:
No of dedicated inputs used : 14/14 (100.0%)
No of feedbacks used as dedicated inputs : 1/6 (16.7%)
No of dedicated outputs used : 2/2 (100.0%)
No of feedbacks used as dedicated outputs : 3/6 (50.0%)
------------------------------------------
Pin Label Terms Usage
------------------------------------------
21 RES 1/8 (12.5%)
20 ROM 4/8 (50.0%)
19 WD 1/8 (12.5%)
18 RD 1/8 (12.5%)
17 SR 1/8 (12.5%)
------------------------------------------
Total Terms 8/64 (12.5%)
------------------------------------------
EQN2JED - Boolean Equations to JEDEC file assembler (Version V101)
Copyright (c) National Semiconductor Corporation 1990-1993
Chip diagram (DIP)
._____ _____.
| \__/ |
| 1 24 | VCC
RW | 2 23 | R
A0 | 3 22 | PHI
A1 | 4 21 | RES
A2 | 5 20 | ROM
A3 | 6 19 | WD
A4 | 7 18 | RD
A5 | 8 17 | SR
A6 | 9 16 | A11
A7 | 10 15 | A10
A8 | 11 14 | A9
GND | 12 13 |
|______________|
EQN2JED - Boolean Equations to JEDEC file assembler (Version V101)
Copyright (c) National Semiconductor Corporation 1990-1993
Log file for e:/APPLE1~1/ADDRES~1.EQN
Device: 20V8
Pin Label Type
--- ----- ----
2 RW pos,com input
3 A0 pos,com input
4 A1 pos,com input
5 A2 pos,com input
6 A3 pos,com input
7 A4 pos,com input
8 A5 pos,com input
9 A6 pos,com input
10 A7 pos,com input
11 A8 pos,com input
12 GND ground pin
14 A9 pos,com input
15 A10 pos,com input
16 A11 pos,com input
17 SR pos,com output
18 RD pos,com output
19 WD pos,com output
20 ROM neg,com output
21 RES pos,com output
22 PHI pos,com input
23 R pos,com input
24 VCC power pin
EQN2JED - Boolean Equations to JEDEC file assembler (Version V101)
Copyright (c) National Semiconductor Corporation 1990-1993
Device Utilization:
No of dedicated inputs used : 14/14 (100.0%)
No of feedbacks used as dedicated inputs : 1/6 (16.7%)
No of dedicated outputs used : 2/2 (100.0%)
No of feedbacks used as dedicated outputs : 3/6 (50.0%)
------------------------------------------
Pin Label Terms Usage
------------------------------------------
21 RES 1/8 (12.5%)
20 ROM 4/8 (50.0%)
19 WD 1/8 (12.5%)
18 RD 1/8 (12.5%)
17 SR 1/8 (12.5%)
------------------------------------------
Total Terms 8/64 (12.5%)
------------------------------------------
EQN2JED - Boolean Equations to JEDEC file assembler (Version V101)
Copyright (c) National Semiconductor Corporation 1990-1993
Chip diagram (DIP)
._____ _____.
| \__/ |
| 1 24 | VCC
RW | 2 23 | R
A0 | 3 22 | PHI
A1 | 4 21 | RES
A2 | 5 20 | ROM
A3 | 6 19 | WD
A4 | 7 18 | RD
A5 | 8 17 | SR
A6 | 9 16 | A11
A7 | 10 15 | A10
A8 | 11 14 | A9
GND | 12 13 |
|______________|

12
addressdecoder.eqn
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@ -1,20 +1,16 @@
chip GAL20V8
NC3=1 RW=2 A0=3 A1=4 A2=5 A3=6 A4=7 A5=8 A6=9 A7=10 A8=11 GND=12
A9=14 A10=15 A11=16 SR=17 RD=18 WD=19 ROM=20
A9=14 A10=15 A11=16 SR=17 RD=18 WD=19 ROM=20 RES=21 PHI=22
R=23 VCC=24
NC1=21 NC2=22
equations
NC1=gnd
NC2=gnd
SR = /A0 * /A1 * /A2 * /A3 * /A4 * /A5 * /A6 * /A7 * /A8 * /A9 * /A10 * /A11 * /R * RW
RD = /A0 * /A1 * /A2 * /A3 * /A4 * /A5 * /A6 * A7 * /A8 * /A9 * /A10 * /A11 * /R * RW
WD = A0 * /A1 * /A2 * /A3 * /A4 * /A5 * /A6 * A7 * /A8 * /A9 * /A10 * /A11 * /R * /RW
RD = /A0 * /A1 * /A2 * /A3 * /A4 * /A5 * /A6 * A7 * /A8 * /A9 * /A10 * /A11 * /R * RW * PHI
WD = A0 * /A1 * /A2 * /A3 * /A4 * /A5 * /A6 * A7 * /A8 * /A9 * /A10 * /A11 * /R * /RW * PHI
/ROM = A8 * /R * RW
+ A9 * /R * RW
+ A10 * /R * RW
+ A11 * /R * RW
RES = A0 * /A1 * /A2 * /A3 * /A4 * /A5 * /A6 * /A7 * /A8 * /A9 * /A10 * /A11 * /R * RW

2
build.sh
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@ -1,3 +1,3 @@
#!/bin/sh
xa -W -C -v -O ASCII -c src/apple1serial.xa -l apple1serial.label -o apple1serial.bin
xa -W -C -v -O ASCII -S -c src/apple1serial.xa -l apple1serial.label -o apple1serial.bin

118
src/apple1serial.xa
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@ -1,18 +1,23 @@
#define hex1l $50 ;End address of dump block
#define hex1h $51
#define hex2l $52 ;Begin address of dump block
#define hex2h $53
;End address of dump block
#define hex1_l $50
#define hex1_h $51
#define input $0200 ;Input buffer
;Begin address of dump block
#define hex2_l $52
#define hex2_h $53
;Input buffer
#define input $0200
#define kbd_data $D010 ;PIA.A keyboard input
#define kbd_cr $D011 ;PIA.A keyboard control register
#define monitor $FF1A ;Escape back to monitor
#define echo $FFEF ;Echo character to terminal
#define prbyte $FFDC
#define serial_ready $C000 ;Serial status
#define serial_read $C080 ;Data read address
#define serial_write $C081 ;Data write address
#define serial_ready $C000
#define serial_reset $C001
#define serial_read $C080
#define serial_write $C081
;-------------------------------------------------------------------------
; Constants
@ -49,7 +54,7 @@ kbd_wait
bpl kbd_wait ;Still no key!
lda kbd_data ;Read key from keyboard
sta $0200,Y ;Save it into buffer
sta input,Y ;Save it into buffer
jsr echo ;And type it on the screen
cmp #ESC
beq apple_serial ;Start from scratch if ESC!
@ -64,10 +69,10 @@ kbd_wait
next_cmd
lda #$00 ;Clear begin and end values
sta hex1l
sta hex1h
sta hex2l
sta hex2h
sta hex1_l
sta hex1_h
sta hex2_l
sta hex2_h
next_chr
inx ;Increment input pointer
@ -100,8 +105,8 @@ digit
hexshift
asl ;Hex digit left, MSB to carry
rol hex1l ;Rotate into LSD
rol hex1h ;Rotate into MSD
rol hex1_l ;Rotate into LSD
rol hex1_h ;Rotate into MSD
dey ;Done 4 shifts?
bne hexshift ;No! Loop
beq next_chr ;Handle next character
@ -111,49 +116,70 @@ hexshift
;-------------------------------------------------------------------------
to_monitor
jmp monitor ;Escape back to monitor
;jmp monitor ;Escape back to monitor
jmp apple_serial
;-------------------------------------------------------------------------
; Separating . found. Copy HEX1 to Hex2. Doesn't clear HEX1!!!
;-------------------------------------------------------------------------
separator
lda hex1l ;Copy hex value 1 to hex value 2
sta hex2l
lda hex1h
sta hex2h
lda hex1_l ;Copy hex value 1 to hex value 2
sta hex2_l
lda hex1_h
sta hex2_h
lda #$00 ;Original ACI bug (not enough ROM space?) fix
sta hex1l
sta hex1h
jmp next_chr ;Always taken!
sta hex1_l
sta hex1_h
jmp next_chr
reset
txa
pha
lda serial_reset
ldx #$00
ldy #$00
reset_loop ; ((2 + 2 + 3) * 255 + 2 + 3) * 255 =
nop ; 2 cycles
iny ; 2 cycles
bne reset_loop ; 3 cycles
inx ; 2 cycles
bne reset_loop ; 3 cycles
pla
tax
rts
;-------------------------------------------------------------------------
; Read procedure
;-------------------------------------------------------------------------
read
lda serial_read ;Enable read mode
lda serial_read ;Enable read mode, this can be done quick, without reset
ldy #$00
read_byte
lda serial_ready
beq read_byte ;No data arrived
lda serial_read ;Read byte
sta ($52),Y ;Store byte under address
sta (hex2_l),Y ;Store byte under address, this should be hex2_l but macro substitution doesn't work
lda hex2l
cmp hex1l ;Compare lower destination address half with lower end address half
lda hex2_l
cmp hex1_l ;Compare lower destination address half with lower end address half
bne read_next ;If not equal then increment destination address
lda hex2h
cmp hex1h ;Compare upper destination address half with upper end address half
lda hex2_h
cmp hex1_h ;Compare upper destination address half with upper end address half
bne read_next ;If not equal then proceed to read next byte
jmp next_cmd ;Read is completed, proceed to next command
read_next
ldx #hex2l
txa ;Preserve X on stack
pha
ldx #hex2_l
jsr increment_16bit ;Increment destination address
pla ;Restore X from stack
tax
jmp read_byte
;-------------------------------------------------------------------------
@ -161,29 +187,35 @@ read_next
;-------------------------------------------------------------------------
write
lda serial_read ;Enable read mode to be sure that we are in "fresh" write mode
jsr reset ;Reset serial and give some time to stabilize
;This is required due to inability to guess what is the current device mode
;and prevents from polluting the output while setting the write mode
sta serial_write ;Enable write mode
ldy #$00
write_byte
lda serial_ready
beq write_byte
lda ($52),Y
sta serial_write
beq write_byte ;Not yet ready to write data
lda (hex2_l),Y ;Read byte from source address, this should be hex2_l but macro substitution doesn't work
sta serial_write ;Write byte
lda hex2l
cmp hex1l ;Compare lower destination address half with lower end address half
bne write_next ;If not equal then increment destination address
lda hex2_l
cmp hex1_l ;Compare lower source address half with lower end address half
bne write_next ;If not equal then increment source address
lda hex2h
cmp hex1h ;Compare upper destination address half with upper end address half
lda hex2_h
cmp hex1_h ;Compare upper source address half with upper end address half
bne write_next ;If not equal then proceed to write next byte
jmp next_cmd ;Read is completed, proceed to next command
jmp next_cmd ;Write is completed, proceed to next command
write_next
ldx #hex2l
txa ;Preserve X on stack
pha
ldx #hex2_l
jsr increment_16bit ;Increment destination address
pla ;Restore X from stack
tax
jmp write_byte
;-------------------------------------------------------------------------
@ -201,4 +233,4 @@ increment_16bit_done
;-------------------------------------------------------------------------
end_of_apple1serial
;#include "src/tests.xa"
#include "src/tests.xa"