mirror of
https://github.com/flowenol/apple1serial.git
synced 2024-12-26 14:29:29 +00:00
Timings for write fixed, software reset added
This commit is contained in:
Piotr Jaczewski
parent
f614cffe86
commit
7de77dd557
@ -2,31 +2,33 @@
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GAL20V8
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EQN2JED - Boolean Equations to JEDEC file assembler (Version V101)
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Copyright (c) National Semiconductor Corporation 1990-1993
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Assembled from "d:/ADDRES~1.EQN". Date: 3-31-120
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Assembled from "e:/APPLE1~1/ADDRES~1.EQN". Date: 5-24-120
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*
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NOTE PINS RW:2 A0:3 A1:4 A2:5 A3:6 A4:7 A5:8 A6:9 A7:10 A8:11*
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NOTE PINS GND:12 A9:14 A10:15 A11:16 SR:17 RD:18 WD:19 ROM:20*
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NOTE PINS NC1:21 NC2:22 R:23 VCC:24*
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NOTE PINS RES:21 PHI:22 R:23 VCC:24*
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NOTE GALMODE SMALL*
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QF2706*QP24*F0*
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L0320
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0111011010111011101110111010101010101011*
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L0640
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1111111011111111111111111111111111110111
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1111111011111111111111111111111111011111
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1111111011111111111111111111110111111111
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1111111011111111111111111101111111111111*
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0111111011111111111111111111111111110111
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0111111011111111111111111111111111011111
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0111111011111111111111111111110111111111
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0111111011111111111111111101111111111111*
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L0960
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1011011010111011101110111010101001101011*
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1011011010011011101110111010101001101011*
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L1280
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0111101010111011101110111010101001101011*
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0111101010011011101110111010101001101011*
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L1600
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0111101010111011101110111010101010101011*
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L2560
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11011100*
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01011100*
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L2632
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00000011*
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10000011*
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L2640
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0000000000000000111100001000000010000000100000000000000000000000*
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0000000010000000111100001000000010000000100000000000000000000000*
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L2704
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10*
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C1C79*
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C1FC0*
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0000
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219
address_decoder.log
Normal file
219
address_decoder.log
Normal file
@ -0,0 +1,219 @@
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EQN2JED - Boolean Equations to JEDEC file assembler (Version V101)
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Copyright (c) National Semiconductor Corporation 1990-1993
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Log file for e:/APPLE1~1/ADDRES~1.EQN
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Device: 20V8
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Pin Label Type
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--- ----- ----
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2 RW pos,com input
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3 A0 pos,com input
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4 A1 pos,com input
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5 A2 pos,com input
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6 A3 pos,com input
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7 A4 pos,com input
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8 A5 pos,com input
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9 A6 pos,com input
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10 A7 pos,com input
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11 A8 pos,com input
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12 GND ground pin
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14 A9 pos,com input
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15 A10 pos,com input
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16 A11 pos,com input
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17 SR pos,com output
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18 RD pos,com output
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19 WD pos,com output
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20 ROM neg,com output
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21 RES pos,com output
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22 PHI pos,com input
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23 R pos,com input
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24 VCC power pin
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EQN2JED - Boolean Equations to JEDEC file assembler (Version V101)
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Copyright (c) National Semiconductor Corporation 1990-1993
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Device Utilization:
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No of dedicated inputs used : 14/14 (100.0%)
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No of feedbacks used as dedicated inputs : 1/6 (16.7%)
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No of dedicated outputs used : 2/2 (100.0%)
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No of feedbacks used as dedicated outputs : 3/6 (50.0%)
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------------------------------------------
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Pin Label Terms Usage
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------------------------------------------
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21 RES 1/8 (12.5%)
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20 ROM 4/8 (50.0%)
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19 WD 1/8 (12.5%)
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18 RD 1/8 (12.5%)
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17 SR 1/8 (12.5%)
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------------------------------------------
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Total Terms 8/64 (12.5%)
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------------------------------------------
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EQN2JED - Boolean Equations to JEDEC file assembler (Version V101)
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Copyright (c) National Semiconductor Corporation 1990-1993
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Chip diagram (DIP)
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._____ _____.
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| \__/ |
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| 1 24 | VCC
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RW | 2 23 | R
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A0 | 3 22 | PHI
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A1 | 4 21 | RES
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A2 | 5 20 | ROM
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A3 | 6 19 | WD
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A4 | 7 18 | RD
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A5 | 8 17 | SR
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A6 | 9 16 | A11
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A7 | 10 15 | A10
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A8 | 11 14 | A9
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GND | 12 13 |
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|______________|
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EQN2JED - Boolean Equations to JEDEC file assembler (Version V101)
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Copyright (c) National Semiconductor Corporation 1990-1993
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Log file for e:/APPLE1~1/ADDRES~1.EQN
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Device: 20V8
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Pin Label Type
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--- ----- ----
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2 RW pos,com input
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3 A0 pos,com input
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4 A1 pos,com input
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5 A2 pos,com input
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6 A3 pos,com input
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7 A4 pos,com input
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8 A5 pos,com input
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9 A6 pos,com input
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10 A7 pos,com input
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11 A8 pos,com input
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12 GND ground pin
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14 A9 pos,com input
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15 A10 pos,com input
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16 A11 pos,com input
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17 SR pos,com output
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18 RD pos,com output
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19 WD pos,com output
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20 ROM neg,com output
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21 RES pos,com output
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22 PHI pos,com input
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23 R pos,com input
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24 VCC power pin
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EQN2JED - Boolean Equations to JEDEC file assembler (Version V101)
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Copyright (c) National Semiconductor Corporation 1990-1993
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|
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Device Utilization:
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No of dedicated inputs used : 14/14 (100.0%)
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No of feedbacks used as dedicated inputs : 1/6 (16.7%)
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No of dedicated outputs used : 2/2 (100.0%)
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No of feedbacks used as dedicated outputs : 3/6 (50.0%)
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------------------------------------------
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Pin Label Terms Usage
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------------------------------------------
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21 RES 1/8 (12.5%)
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20 ROM 4/8 (50.0%)
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19 WD 1/8 (12.5%)
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18 RD 1/8 (12.5%)
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17 SR 1/8 (12.5%)
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------------------------------------------
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Total Terms 8/64 (12.5%)
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------------------------------------------
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EQN2JED - Boolean Equations to JEDEC file assembler (Version V101)
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Copyright (c) National Semiconductor Corporation 1990-1993
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Chip diagram (DIP)
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._____ _____.
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| \__/ |
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| 1 24 | VCC
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RW | 2 23 | R
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A0 | 3 22 | PHI
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A1 | 4 21 | RES
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A2 | 5 20 | ROM
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A3 | 6 19 | WD
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A4 | 7 18 | RD
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A5 | 8 17 | SR
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A6 | 9 16 | A11
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A7 | 10 15 | A10
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A8 | 11 14 | A9
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GND | 12 13 |
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|______________|
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EQN2JED - Boolean Equations to JEDEC file assembler (Version V101)
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Copyright (c) National Semiconductor Corporation 1990-1993
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Log file for e:/APPLE1~1/ADDRES~1.EQN
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Device: 20V8
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Pin Label Type
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--- ----- ----
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2 RW pos,com input
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3 A0 pos,com input
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4 A1 pos,com input
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5 A2 pos,com input
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6 A3 pos,com input
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7 A4 pos,com input
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8 A5 pos,com input
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9 A6 pos,com input
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10 A7 pos,com input
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11 A8 pos,com input
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12 GND ground pin
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14 A9 pos,com input
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15 A10 pos,com input
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16 A11 pos,com input
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17 SR pos,com output
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18 RD pos,com output
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19 WD pos,com output
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20 ROM neg,com output
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21 RES pos,com output
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22 PHI pos,com input
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23 R pos,com input
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24 VCC power pin
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EQN2JED - Boolean Equations to JEDEC file assembler (Version V101)
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Copyright (c) National Semiconductor Corporation 1990-1993
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Device Utilization:
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No of dedicated inputs used : 14/14 (100.0%)
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No of feedbacks used as dedicated inputs : 1/6 (16.7%)
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No of dedicated outputs used : 2/2 (100.0%)
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No of feedbacks used as dedicated outputs : 3/6 (50.0%)
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------------------------------------------
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Pin Label Terms Usage
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------------------------------------------
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21 RES 1/8 (12.5%)
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20 ROM 4/8 (50.0%)
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19 WD 1/8 (12.5%)
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18 RD 1/8 (12.5%)
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17 SR 1/8 (12.5%)
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------------------------------------------
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Total Terms 8/64 (12.5%)
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------------------------------------------
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EQN2JED - Boolean Equations to JEDEC file assembler (Version V101)
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Copyright (c) National Semiconductor Corporation 1990-1993
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Chip diagram (DIP)
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._____ _____.
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| \__/ |
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| 1 24 | VCC
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RW | 2 23 | R
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A0 | 3 22 | PHI
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A1 | 4 21 | RES
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A2 | 5 20 | ROM
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A3 | 6 19 | WD
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A4 | 7 18 | RD
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A5 | 8 17 | SR
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A6 | 9 16 | A11
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A7 | 10 15 | A10
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A8 | 11 14 | A9
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GND | 12 13 |
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|______________|
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@ -1,20 +1,16 @@
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chip GAL20V8
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NC3=1 RW=2 A0=3 A1=4 A2=5 A3=6 A4=7 A5=8 A6=9 A7=10 A8=11 GND=12
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A9=14 A10=15 A11=16 SR=17 RD=18 WD=19 ROM=20
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A9=14 A10=15 A11=16 SR=17 RD=18 WD=19 ROM=20 RES=21 PHI=22
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R=23 VCC=24
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NC1=21 NC2=22
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equations
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NC1=gnd
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NC2=gnd
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SR = /A0 * /A1 * /A2 * /A3 * /A4 * /A5 * /A6 * /A7 * /A8 * /A9 * /A10 * /A11 * /R * RW
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RD = /A0 * /A1 * /A2 * /A3 * /A4 * /A5 * /A6 * A7 * /A8 * /A9 * /A10 * /A11 * /R * RW
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WD = A0 * /A1 * /A2 * /A3 * /A4 * /A5 * /A6 * A7 * /A8 * /A9 * /A10 * /A11 * /R * /RW
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RD = /A0 * /A1 * /A2 * /A3 * /A4 * /A5 * /A6 * A7 * /A8 * /A9 * /A10 * /A11 * /R * RW * PHI
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WD = A0 * /A1 * /A2 * /A3 * /A4 * /A5 * /A6 * A7 * /A8 * /A9 * /A10 * /A11 * /R * /RW * PHI
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/ROM = A8 * /R * RW
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+ A9 * /R * RW
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+ A10 * /R * RW
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+ A11 * /R * RW
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RES = A0 * /A1 * /A2 * /A3 * /A4 * /A5 * /A6 * /A7 * /A8 * /A9 * /A10 * /A11 * /R * RW
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2
build.sh
2
build.sh
@ -1,3 +1,3 @@
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#!/bin/sh
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xa -W -C -v -O ASCII -c src/apple1serial.xa -l apple1serial.label -o apple1serial.bin
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xa -W -C -v -O ASCII -S -c src/apple1serial.xa -l apple1serial.label -o apple1serial.bin
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@ -1,18 +1,23 @@
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#define hex1l $50 ;End address of dump block
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#define hex1h $51
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#define hex2l $52 ;Begin address of dump block
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#define hex2h $53
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;End address of dump block
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#define hex1_l $50
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#define hex1_h $51
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#define input $0200 ;Input buffer
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;Begin address of dump block
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#define hex2_l $52
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#define hex2_h $53
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;Input buffer
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#define input $0200
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#define kbd_data $D010 ;PIA.A keyboard input
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#define kbd_cr $D011 ;PIA.A keyboard control register
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#define monitor $FF1A ;Escape back to monitor
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#define echo $FFEF ;Echo character to terminal
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#define prbyte $FFDC
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#define serial_ready $C000 ;Serial status
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#define serial_read $C080 ;Data read address
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#define serial_write $C081 ;Data write address
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#define serial_ready $C000
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#define serial_reset $C001
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#define serial_read $C080
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#define serial_write $C081
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;-------------------------------------------------------------------------
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; Constants
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@ -49,7 +54,7 @@ kbd_wait
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bpl kbd_wait ;Still no key!
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lda kbd_data ;Read key from keyboard
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sta $0200,Y ;Save it into buffer
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sta input,Y ;Save it into buffer
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jsr echo ;And type it on the screen
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cmp #ESC
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beq apple_serial ;Start from scratch if ESC!
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@ -64,10 +69,10 @@ kbd_wait
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next_cmd
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lda #$00 ;Clear begin and end values
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sta hex1l
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sta hex1h
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sta hex2l
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sta hex2h
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sta hex1_l
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sta hex1_h
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sta hex2_l
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sta hex2_h
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next_chr
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inx ;Increment input pointer
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@ -100,8 +105,8 @@ digit
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hexshift
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asl ;Hex digit left, MSB to carry
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rol hex1l ;Rotate into LSD
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rol hex1h ;Rotate into MSD
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rol hex1_l ;Rotate into LSD
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rol hex1_h ;Rotate into MSD
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dey ;Done 4 shifts?
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bne hexshift ;No! Loop
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beq next_chr ;Handle next character
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@ -111,49 +116,70 @@ hexshift
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;-------------------------------------------------------------------------
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to_monitor
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jmp monitor ;Escape back to monitor
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;jmp monitor ;Escape back to monitor
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jmp apple_serial
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;-------------------------------------------------------------------------
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; Separating . found. Copy HEX1 to Hex2. Doesn't clear HEX1!!!
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;-------------------------------------------------------------------------
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|
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separator
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lda hex1l ;Copy hex value 1 to hex value 2
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sta hex2l
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lda hex1h
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sta hex2h
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lda hex1_l ;Copy hex value 1 to hex value 2
|
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sta hex2_l
|
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lda hex1_h
|
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sta hex2_h
|
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lda #$00 ;Original ACI bug (not enough ROM space?) fix
|
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sta hex1l
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sta hex1h
|
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jmp next_chr ;Always taken!
|
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sta hex1_l
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sta hex1_h
|
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jmp next_chr
|
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|
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reset
|
||||
txa
|
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pha
|
||||
lda serial_reset
|
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ldx #$00
|
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ldy #$00
|
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reset_loop ; ((2 + 2 + 3) * 255 + 2 + 3) * 255 =
|
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nop ; 2 cycles
|
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iny ; 2 cycles
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bne reset_loop ; 3 cycles
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inx ; 2 cycles
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bne reset_loop ; 3 cycles
|
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pla
|
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tax
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rts
|
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|
||||
;-------------------------------------------------------------------------
|
||||
; Read procedure
|
||||
;-------------------------------------------------------------------------
|
||||
|
||||
read
|
||||
lda serial_read ;Enable read mode
|
||||
lda serial_read ;Enable read mode, this can be done quick, without reset
|
||||
ldy #$00
|
||||
|
||||
read_byte
|
||||
lda serial_ready
|
||||
beq read_byte ;No data arrived
|
||||
lda serial_read ;Read byte
|
||||
sta ($52),Y ;Store byte under address
|
||||
sta (hex2_l),Y ;Store byte under address, this should be hex2_l but macro substitution doesn't work
|
||||
|
||||
lda hex2l
|
||||
cmp hex1l ;Compare lower destination address half with lower end address half
|
||||
lda hex2_l
|
||||
cmp hex1_l ;Compare lower destination address half with lower end address half
|
||||
bne read_next ;If not equal then increment destination address
|
||||
|
||||
lda hex2h
|
||||
cmp hex1h ;Compare upper destination address half with upper end address half
|
||||
lda hex2_h
|
||||
cmp hex1_h ;Compare upper destination address half with upper end address half
|
||||
bne read_next ;If not equal then proceed to read next byte
|
||||
|
||||
jmp next_cmd ;Read is completed, proceed to next command
|
||||
|
||||
read_next
|
||||
ldx #hex2l
|
||||
txa ;Preserve X on stack
|
||||
pha
|
||||
ldx #hex2_l
|
||||
jsr increment_16bit ;Increment destination address
|
||||
pla ;Restore X from stack
|
||||
tax
|
||||
jmp read_byte
|
||||
|
||||
;-------------------------------------------------------------------------
|
||||
@ -161,29 +187,35 @@ read_next
|
||||
;-------------------------------------------------------------------------
|
||||
|
||||
write
|
||||
lda serial_read ;Enable read mode to be sure that we are in "fresh" write mode
|
||||
jsr reset ;Reset serial and give some time to stabilize
|
||||
;This is required due to inability to guess what is the current device mode
|
||||
;and prevents from polluting the output while setting the write mode
|
||||
sta serial_write ;Enable write mode
|
||||
ldy #$00
|
||||
|
||||
|
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write_byte
|
||||
lda serial_ready
|
||||
beq write_byte
|
||||
lda ($52),Y
|
||||
sta serial_write
|
||||
beq write_byte ;Not yet ready to write data
|
||||
lda (hex2_l),Y ;Read byte from source address, this should be hex2_l but macro substitution doesn't work
|
||||
sta serial_write ;Write byte
|
||||
|
||||
lda hex2l
|
||||
cmp hex1l ;Compare lower destination address half with lower end address half
|
||||
bne write_next ;If not equal then increment destination address
|
||||
lda hex2_l
|
||||
cmp hex1_l ;Compare lower source address half with lower end address half
|
||||
bne write_next ;If not equal then increment source address
|
||||
|
||||
lda hex2h
|
||||
cmp hex1h ;Compare upper destination address half with upper end address half
|
||||
lda hex2_h
|
||||
cmp hex1_h ;Compare upper source address half with upper end address half
|
||||
bne write_next ;If not equal then proceed to write next byte
|
||||
|
||||
jmp next_cmd ;Read is completed, proceed to next command
|
||||
jmp next_cmd ;Write is completed, proceed to next command
|
||||
|
||||
write_next
|
||||
ldx #hex2l
|
||||
txa ;Preserve X on stack
|
||||
pha
|
||||
ldx #hex2_l
|
||||
jsr increment_16bit ;Increment destination address
|
||||
pla ;Restore X from stack
|
||||
tax
|
||||
jmp write_byte
|
||||
|
||||
;-------------------------------------------------------------------------
|
||||
@ -201,4 +233,4 @@ increment_16bit_done
|
||||
;-------------------------------------------------------------------------
|
||||
|
||||
end_of_apple1serial
|
||||
;#include "src/tests.xa"
|
||||
#include "src/tests.xa"
|
||||
|
||||
Loading…
Reference in New Issue
Block a user