mirror of
https://github.com/jonthomasson/retro1.git
synced 2024-06-10 05:29:33 +00:00
69 lines
2.9 KiB
Plaintext
69 lines
2.9 KiB
Plaintext
ca65 V2.15 - Git f7cdfbf
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Main file : firmware.s65
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Current file: firmware.s65
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000000r 1 .setcpu "65C02"
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000000r 1
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000000r 1 ACIA_DATA = $8200
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000000r 1 ACIA_STATUS = $8201
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000000r 1 ACIA_COMMAND = $8202
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000000r 1 ACIA_CONTROL = $8203
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000000r 1
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000000r 1 .segment "VECTORS"
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000000r 1
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000000r 1 rr rr .word nmi
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000002r 1 rr rr .word reset
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000004r 1 rr rr .word irq
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000006r 1
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000006r 1 .code
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000000r 1
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000000r 1 4C rr rr reset: jmp main
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000003r 1
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000003r 1 40 nmi: rti
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000004r 1
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000004r 1 40 irq: rti
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000005r 1
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000005r 1 main:
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000005r 1 A9 0B init_acia: lda #%00001011 ;No parity, no echo, no interrupt
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000007r 1 8D 02 82 sta ACIA_COMMAND
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00000Ar 1 A9 1F lda #%00011111 ;1 stop bit, 8 data bits, 19200 baud
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00000Cr 1 8D 03 82 sta ACIA_CONTROL
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00000Fr 1
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00000Fr 1 A2 00 write: ldx #0 ;for x = 0 to length of message, send character to acia
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000011r 1 next_char:
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000011r 1 AD 01 82 wait_txd_empty: lda ACIA_STATUS
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000014r 1 ;and #$10
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000014r 1 ;beq wait_txd_empty
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000014r 1 BD rr rr lda text,x
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000017r 1 F0 F6 beq write
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000019r 1 8D 00 82 sta ACIA_DATA
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00001Cr 1 E8 inx
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00001Dr 1 20 rr rr jsr DELAY_6551
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000020r 1 4C rr rr jmp next_char
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000023r 1
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000023r 1 read:
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000023r 1 AD 01 82 wait_rxd_full: lda ACIA_STATUS
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000026r 1 29 08 and #$08
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000028r 1 F0 F9 beq wait_rxd_full
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00002Ar 1 AD 00 82 lda ACIA_DATA
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00002Dr 1 4C rr rr jmp write
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000030r 1
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000030r 1 48 65 6C 6C text: .byte "Hello World!", $0d, $0a, $00
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000034r 1 6F 20 57 6F
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000038r 1 72 6C 64 21
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00003Fr 1
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00003Fr 1 5A DELAY_6551: PHY ;Save Y Reg
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000040r 1 DA PHX ;Save X Reg
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000041r 1 A0 01 DELAY_LOOP: LDY #1 ;Get delay value (clock rate in MHz 2 clock cycles)
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000043r 1 ;
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000043r 1 A2 68 MINIDLY: LDX #$68 ;Seed X reg
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000045r 1 CA DELAY_1: DEX ;Decrement low index
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000046r 1 D0 FD BNE DELAY_1 ;Loop back until done
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000048r 1 ;
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000048r 1 88 DEY ;Decrease by one
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000049r 1 D0 F8 BNE MINIDLY ;Loop until done
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00004Br 1 FA PLX ;Restore X Reg
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00004Cr 1 7A PLY ;Restore Y Reg
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00004Dr 1 60 DELAY_DONE: RTS
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00004Dr 1
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