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retro1/software/retro1-tests/rtc-test/main.lst
jth0mass0n b290497d95 initial software checkin
2017-04-17 10:09:33 -07:00

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ca65 V2.15 - Git f7cdfbf
Main file : main.s65
Current file: main.s65
000000r 1 .setcpu "6502"
000000r 1
000000r 1 .include "macros.inc65"
000000r 2 ; Push X
000000r 2 .macro phx
000000r 2 sta TMP_STACK
000000r 2 txa
000000r 2 pha
000000r 2 lda TMP_STACK
000000r 2 .endmacro
000000r 2
000000r 2 ; Push Y
000000r 2 .macro phy
000000r 2 sta TMP_STACK
000000r 2 tya
000000r 2 pha
000000r 2 lda TMP_STACK
000000r 2 .endmacro
000000r 2
000000r 2 ; Push X and Y
000000r 2 .macro phxy
000000r 2 sta TMP_STACK
000000r 2 txa
000000r 2 pha
000000r 2 tya
000000r 2 pha
000000r 2 lda TMP_STACK
000000r 2 .endmacro
000000r 2
000000r 2 ; Push A and X
000000r 2 .macro phax
000000r 2 sta TMP_STACK
000000r 2 pha
000000r 2 txa
000000r 2 pha
000000r 2 lda TMP_STACK
000000r 2 .endmacro
000000r 2
000000r 2 ; Push A and Y
000000r 2 .macro phay
000000r 2 sta TMP_STACK
000000r 2 pha
000000r 2 tya
000000r 2 pha
000000r 2 lda TMP_STACK
000000r 2 .endmacro
000000r 2
000000r 2 ; Push A, X and Y
000000r 2 .macro phaxy
000000r 2 sta TMP_STACK
000000r 2 pha
000000r 2 txa
000000r 2 pha
000000r 2 tya
000000r 2 pha
000000r 2 lda TMP_STACK
000000r 2 .endmacro
000000r 2
000000r 2 ; Pull X
000000r 2 .macro plx
000000r 2 sta TMP_STACK
000000r 2 pla
000000r 2 tax
000000r 2 lda TMP_STACK
000000r 2 .endmacro
000000r 2
000000r 2 ; Pull Y
000000r 2 .macro ply
000000r 2 sta TMP_STACK
000000r 2 pla
000000r 2 tay
000000r 2 lda TMP_STACK
000000r 2 .endmacro
000000r 2
000000r 2 ; Pull X and Y
000000r 2 .macro plxy
000000r 2 sta TMP_STACK
000000r 2 pla
000000r 2 tay
000000r 2 pla
000000r 2 tax
000000r 2 lda TMP_STACK
000000r 2 .endmacro
000000r 2
000000r 2 ; Pull A and X
000000r 2 .macro plax
000000r 2 pla
000000r 2 tax
000000r 2 pla
000000r 2 .endmacro
000000r 2
000000r 2 ; Pull A and Y
000000r 2 .macro play
000000r 2 pla
000000r 2 tay
000000r 2 pla
000000r 2 .endmacro
000000r 2
000000r 2 ; Pull A, X and Y
000000r 2 .macro plaxy
000000r 2 pla
000000r 2 tay
000000r 2 pla
000000r 2 tax
000000r 2 pla
000000r 2 .endmacro
000000r 2
000000r 2 ; Load zero page register reg/reg+1 with the 16-bit value, destroys A
000000r 2 .macro ld16 reg, value
000000r 2 lda #<(value)
000000r 2 sta reg
000000r 2 lda #>(value)
000000r 2 sta reg + 1
000000r 2 .endmacro
000000r 2
000000r 1 .include "zeropage.inc65"
000000r 2 .importzp RES
000000r 2 .importzp R0
000000r 2 .importzp R1
000000r 2 .importzp TMP0
000000r 2 .importzp TMP1
000000r 2 .importzp TMP_STACK
000000r 2
000000r 1 .include "acia.inc65"
000000r 2 .import acia_init
000000r 2 .import acia_getc
000000r 2 .import acia_gets
000000r 2 .import acia_gets_buffer
000000r 2 .import acia_putc
000000r 2 .import acia_puts
000000r 2 .import acia_put_newline
000000r 2
000000r 1 .include "string.inc65"
000000r 2 .import fmt_hex_char
000000r 2 .import fmt_bin_string
000000r 2 .import fmt_hex_string
000000r 2 .import scan_hex_char
000000r 2 .import scan_hex
000000r 2 .import scan_hex16
000000r 2
000000r 1 .include "tools.inc65"
000000r 2 .import delay_ms
000000r 2
000000r 1 .include "io.inc65"
000000r 2 ; CPU frequency
000000r 2
000000r 2 F_CPU = 1000000
000000r 2
000000r 2 ; ACIA registers
000000r 2
000000r 2 ACIA_BASE = $8200
000000r 2 ACIA_DATA = ACIA_BASE
000000r 2 ACIA_STATUS = ACIA_BASE + 1
000000r 2 ACIA_COMMAND = ACIA_BASE + 2
000000r 2 ACIA_CONTROL = ACIA_BASE + 3
000000r 2
000000r 2 ; ACIA control register bit values
000000r 2
000000r 2 ACIA_STOP_BITS_1 = %00000000
000000r 2 ACIA_STOP_BITS_2 = %10000000
000000r 2 ACIA_DATA_BITS_8 = %00000000
000000r 2 ACIA_DATA_BITS_7 = %00100000
000000r 2 ACIA_DATA_BITS_6 = %01000000
000000r 2 ACIA_DATA_BITS_5 = %01100000
000000r 2 ACIA_CLOCK_EXT = %00000000
000000r 2 ACIA_CLOCK_INT = %00010000
000000r 2 ACIA_BAUD_16XEXT = %00000000
000000r 2 ACIA_BAUD_50 = %00000001
000000r 2 ACIA_BAUD_75 = %00000010
000000r 2 ACIA_BAUD_109 = %00000011
000000r 2 ACIA_BAUD_134 = %00000100
000000r 2 ACIA_BAUD_150 = %00000101
000000r 2 ACIA_BAUD_300 = %00000110
000000r 2 ACIA_BAUD_600 = %00000111
000000r 2 ACIA_BAUD_1200 = %00001000
000000r 2 ACIA_BAUD_1800 = %00001001
000000r 2 ACIA_BAUD_2400 = %00001010
000000r 2 ACIA_BAUD_3600 = %00001011
000000r 2 ACIA_BAUD_4800 = %00001100
000000r 2 ACIA_BAUD_7200 = %00001101
000000r 2 ACIA_BAUD_9600 = %00001110
000000r 2 ACIA_BAUD_19200 = %00001111
000000r 2
000000r 2 ; ACIA command register bit values
000000r 2
000000r 2 ACIA_PARITY_ODD = %00000000
000000r 2 ACIA_PARITY_EVEN = %01000000
000000r 2 ACIA_PARITY_MARK = %10000000
000000r 2 ACIA_PARITY_SPACE = %11000000
000000r 2 ACIA_PARITY_DISABLE = %00000000
000000r 2 ACIA_PARITY_ENABLE = %00100000
000000r 2 ACIA_ECHO_DISABLE = %00000000
000000r 2 ACIA_ECHO_ENABLE = %00010000
000000r 2 ACIA_TX_INT_DISABLE_RTS_HIGH = %00000000
000000r 2 ACIA_TX_INT_ENABLE_RTS_LOW = %00000100
000000r 2 ACIA_TX_INT_DISABLE_RTS_LOW = %00001000
000000r 2 ACIA_TX_INT_DISABLE_BREAK = %00001100
000000r 2 ACIA_RX_INT_ENABLE = %00000000
000000r 2 ACIA_RX_INT_DISABLE = %00000010
000000r 2 ACIA_DTR_HIGH = %00000000
000000r 2 ACIA_DTR_LOW = %00000001
000000r 2
000000r 2 ; ACIA status register bit masks
000000r 2
000000r 2 ACIA_STATUS_IRQ = 1 << 7
000000r 2 ACIA_STATUS_DSR = 1 << 6
000000r 2 ACIA_STATUS_DCD = 1 << 5
000000r 2 ACIA_STATUS_TX_EMPTY = 1 << 4
000000r 2 ACIA_STATUS_RX_FULL = 1 << 3
000000r 2 ACIA_STATUS_OVERRUN = 1 << 2
000000r 2 ACIA_STATUS_FRAME_ERR = 1 << 1
000000r 2 ACIA_STATUS_PARITY_ERR = 1 << 0
000000r 2
000000r 2 ; VIA registers
000000r 2
000000r 2 VIA1_BASE = $8000
000000r 2 VIA1_ORB = VIA1_BASE
000000r 2 VIA1_IRB = VIA1_BASE
000000r 2 VIA1_ORA = VIA1_BASE + 1
000000r 2 VIA1_IRA = VIA1_BASE + 1
000000r 2 VIA1_DDRB = VIA1_BASE + 2
000000r 2 VIA1_DDRA = VIA1_BASE + 3
000000r 2 VIA1_T1C_L = VIA1_BASE + 4
000000r 2 VIA1_T1C_H = VIA1_BASE + 5
000000r 2 VIA1_T1L_L = VIA1_BASE + 6
000000r 2 VIA1_T1L_H = VIA1_BASE + 7
000000r 2 VIA1_T2C_L = VIA1_BASE + 8
000000r 2 VIA1_T2C_H = VIA1_BASE + 9
000000r 2 VIA1_SR = VIA1_BASE + 10
000000r 2 VIA1_ACR = VIA1_BASE + 11
000000r 2 VIA1_PCR = VIA1_BASE + 12
000000r 2 VIA1_IFR = VIA1_BASE + 13
000000r 2 VIA1_IER = VIA1_BASE + 14
000000r 2 VIA1_ORA_NH = VIA1_BASE + 15
000000r 2 VIA1_IRA_NH = VIA1_BASE + 15
000000r 2
000000r 2 VIA2_BASE = $8100
000000r 2 VIA2_ORB = VIA2_BASE
000000r 2 VIA2_IRB = VIA2_BASE
000000r 2 VIA2_ORA = VIA2_BASE + 1
000000r 2 VIA2_IRA = VIA2_BASE + 1
000000r 2 VIA2_DDRB = VIA2_BASE + 2
000000r 2 VIA2_DDRA = VIA2_BASE + 3
000000r 2 VIA2_T1C_L = VIA2_BASE + 4
000000r 2 VIA2_T1C_H = VIA2_BASE + 5
000000r 2 VIA2_T1L_L = VIA2_BASE + 6
000000r 2 VIA2_T1L_H = VIA2_BASE + 7
000000r 2 VIA2_T2C_L = VIA2_BASE + 8
000000r 2 VIA2_T2C_H = VIA2_BASE + 9
000000r 2 VIA2_SR = VIA2_BASE + 10
000000r 2 VIA2_ACR = VIA2_BASE + 11
000000r 2 VIA2_PCR = VIA2_BASE + 12
000000r 2 VIA2_IFR = VIA2_BASE + 13
000000r 2 VIA2_IER = VIA2_BASE + 14
000000r 2 VIA2_ORA_NH = VIA2_BASE + 15
000000r 2 VIA2_IRA_NH = VIA2_BASE + 15
000000r 2
000000r 2 ; Port bits
000000r 2
000000r 2 VIA_PA0 = (1 << 0)
000000r 2 VIA_PA1 = (1 << 1)
000000r 2 VIA_PA2 = (1 << 2)
000000r 2 VIA_PA3 = (1 << 3)
000000r 2 VIA_PA4 = (1 << 4)
000000r 2 VIA_PA5 = (1 << 5)
000000r 2 VIA_PA6 = (1 << 6)
000000r 2 VIA_PA7 = (1 << 7)
000000r 2
000000r 2 ; Port bits
000000r 2
000000r 2 VIA_PB0 = 1 << 0
000000r 2 VIA_PB1 = 1 << 1
000000r 2 VIA_PB2 = 1 << 2
000000r 2 VIA_PB3 = 1 << 3
000000r 2 VIA_PB4 = 1 << 4
000000r 2 VIA_PB5 = 1 << 5
000000r 2 VIA_PB6 = 1 << 6
000000r 2 VIA_PB7 = 1 << 7
000000r 2
000000r 2 ; SID registers
000000r 2
000000r 2 SID_BASE = $8300
000000r 2 SID_VOICE1_FREQ_L = SID_BASE
000000r 2 SID_VOICE1_FREQ_H = SID_BASE + 1
000000r 2 SID_VOICE1_PW_L = SID_BASE + 2
000000r 2 SID_VOICE1_PW_H = SID_BASE + 3
000000r 2 SID_VOICE1_CTRL = SID_BASE + 4
000000r 2 SID_VOICE1_AD = SID_BASE + 5
000000r 2 SID_VOICE1_SR = SID_BASE + 6
000000r 2 SID_VOICE2_FREQ_L = SID_BASE + 7
000000r 2 SID_VOICE2_FREQ_H = SID_BASE + 8
000000r 2 SID_VOICE2_PW_L = SID_BASE + 9
000000r 2 SID_VOICE2_PW_H = SID_BASE + 10
000000r 2 SID_VOICE2_CTRL = SID_BASE + 11
000000r 2 SID_VOICE2_AD = SID_BASE + 12
000000r 2 SID_VOICE2_SR = SID_BASE + 13
000000r 2 SID_VOICE3_FREQ_L = SID_BASE + 14
000000r 2 SID_VOICE3_FREQ_H = SID_BASE + 15
000000r 2 SID_VOICE3_PW_L = SID_BASE + 16
000000r 2 SID_VOICE3_PW_H = SID_BASE + 17
000000r 2 SID_VOICE3_CTRL = SID_BASE + 18
000000r 2 SID_VOICE3_AD = SID_BASE + 19
000000r 2 SID_VOICE3_SR = SID_BASE + 20
000000r 2 SID_FC_L = SID_BASE + 21
000000r 2 SID_FC_H = SID_BASE + 22
000000r 2 SID_RES_FILT = SID_BASE + 23
000000r 2 SID_MODE_VOLUME = SID_BASE + 24
000000r 2 SID_POTX = SID_BASE + 25
000000r 2 SID_POTY = SID_BASE + 26
000000r 2 SID_OSC3 = SID_BASE + 27
000000r 2 SID_ENV3 = SID_BASE + 28
000000r 2
000000r 2 ; LED
000000r 2
000000r 2 LED_DDR = VIA1_DDRA
000000r 2 LED_OUT = VIA1_ORA
000000r 2 LED = VIA_PA7
000000r 2
000000r 2
000000r 2 ;RTC
000000r 2
000000r 2 RTC_BASE = $8400
000000r 2 RTC_AS = RTC_BASE + 1
000000r 2 ;RTC_DS = RTC_BASE + 2
000000r 2
000000r 1 .include "sid.inc65"
000000r 2 .import sid_init
000000r 2
000000r 1 .include "rtc.inc65"
000000r 2 .import rtc_init
000000r 2 .import rtc_test
000000r 2
000000r 1
000000r 1
000000r 1
000000r 1 .segment "VECTORS"
000000r 1
000000r 1 rr rr .word nmi
000002r 1 rr rr .word reset
000004r 1 rr rr .word irq
000006r 1
000006r 1 .bss
000000r 1
000000r 1 BUFFER_LENGTH = 80
000000r 1 00 00 00 00 buffer: .res BUFFER_LENGTH + 1, 0
000004r 1 00 00 00 00
000008r 1 00 00 00 00
000051r 1
000051r 1 .code
000000r 1
000000r 1 4C rr rr reset: jmp main
000003r 1
000003r 1 40 nmi: rti
000004r 1
000004r 1 40 irq: rti
000005r 1
000005r 1 D8 main: cld
000006r 1 A2 FF ldx #$ff
000008r 1 9A txs
000009r 1
000009r 1 20 rr rr jsr acia_init
00000Cr 1 20 rr rr jsr sid_init
00000Fr 1 20 rr rr jsr rtc_init
000012r 1
000012r 1
000012r 1 A9 rr 85 rr ld16 R0, msg_welcome
000016r 1 A9 rr 85 rr
00001Ar 1 20 rr rr jsr acia_puts
00001Dr 1
00001Dr 1 A9 rr 85 rr ld16 R0, msg_time
000021r 1 A9 rr 85 rr
000025r 1 20 rr rr jsr acia_puts
000028r 1
000028r 1 20 rr rr jsr rtc_test
00002Br 1
00002Br 1
00002Br 1 A9 09 lda #$09
00002Dr 1 8D 05 83 sta SID_VOICE1_AD
000030r 1 A9 8A lda #$8A
000032r 1 8D 06 83 sta SID_VOICE1_SR
000035r 1 A9 0F lda #$0f
000037r 1 8D 18 83 sta SID_MODE_VOLUME
00003Ar 1 @read_keys: ;jsr keys_update
00003Ar 1 ;jsr keys_getchar
00003Ar 1 20 rr rr jsr acia_getc
00003Dr 1 ;lda buffer
00003Dr 1 D0 05 bne @key_pressed
00003Fr 1 A9 20 lda #$20
000041r 1 8D 04 83 sta SID_VOICE1_CTRL
000044r 1 C9 1B @key_pressed: cmp #$1b
000046r 1 D0 06 bne @check_note
000048r 1 A9 00 lda #$00
00004Ar 1 8D 18 83 sta SID_MODE_VOLUME
00004Dr 1 60 rts
00004Er 1 C9 61 @check_note: cmp #'a'
000050r 1 90 E8 bcc @read_keys
000052r 1 C9 7B cmp #('z' + 1)
000054r 1 B0 E4 bcs @read_keys
000056r 1 38 sec
000057r 1 E9 61 sbc #'a'
000059r 1 AA tax
00005Ar 1 BD rr rr lda notes_hi,x
00005Dr 1 F0 DB beq @read_keys
00005Fr 1 8D 01 83 sta SID_VOICE1_FREQ_H
000062r 1 BD rr rr lda notes_lo,x
000065r 1 8D 00 83 sta SID_VOICE1_FREQ_L
000068r 1 A9 21 lda #$21
00006Ar 1 8D 04 83 sta SID_VOICE1_CTRL
00006Dr 1 4C rr rr jmp @read_keys
000070r 1
000070r 1 57 65 6C 63 msg_welcome: .byte "Welcome to the 6502 computer system!", $0d, $0a
000074r 1 6F 6D 65 20
000078r 1 74 6F 20 74
000096r 1 50 6C 61 79 .byte "Play sounds with these keys:", $0d, $0a
00009Ar 1 20 73 6F 75
00009Er 1 6E 64 73 20
0000B4r 1 20 57 20 45 .byte " W E T Z U O P", $0d, $0a
0000B8r 1 20 20 20 54
0000BCr 1 20 5A 20 55
0000C8r 1 41 20 53 20 .byte "A S D F G H J K L", $0d, $0a, $00
0000CCr 1 44 20 46 20
0000D0r 1 47 20 48 20
0000DCr 1
0000DCr 1 54 68 65 20 msg_time: .byte "The time is: ", $0d, $0a, $00
0000E0r 1 74 69 6D 65
0000E4r 1 20 69 73 3A
0000ECr 1
0000ECr 1 14 notes_lo: .byte <$1114 ; A - C
0000EDr 1 00 .byte 0 ; B
0000EEr 1 00 .byte 0 ; C
0000EFr 1 9A .byte <$159A ; D - E
0000F0r 1 64 .byte <$1464 ; E - D#
0000F1r 1 E3 .byte <$16E3 ; F - F
0000F2r 1 81 .byte <$1981 ; G - G
0000F3r 1 D6 .byte <$1CD6 ; H - A
0000F4r 1 00 .byte 0 ; I
0000F5r 1 5E .byte <$205E ; J - B
0000F6r 1 4B .byte <$224B ; K - C
0000F7r 1 7E .byte <$267E ; L - D
0000F8r 1 00 .byte 0 ; M
0000F9r 1 00 .byte 0 ; N
0000FAr 1 55 .byte <$2455 ; O - C#
0000FBr 1 C8 .byte <$28C8 ; P
0000FCr 1 00 .byte 0 ; Q
0000FDr 1 00 .byte 0 ; R
0000FEr 1 3F .byte <$133F ; S - D
0000FFr 1 3F .byte <$183F ; T - F#
000100r 1 80 .byte <$1E80 ; U - A#
000101r 1 00 .byte 0 ; V
000102r 1 2A .byte <$122A ; W - C#
000103r 1 00 .byte 0 ; X
000104r 1 00 .byte 0 ; Y
000105r 1 38 .byte <$1B38 ; Z - G#
000106r 1
000106r 1 11 notes_hi: .byte >$1114 ; A - C
000107r 1 00 .byte 0 ; B
000108r 1 00 .byte 0 ; C
000109r 1 15 .byte >$159A ; D - E
00010Ar 1 14 .byte >$1464 ; E - D#
00010Br 1 16 .byte >$16E3 ; F - F
00010Cr 1 19 .byte >$1981 ; G - G
00010Dr 1 1C .byte >$1CD6 ; H - A
00010Er 1 00 .byte 0 ; I
00010Fr 1 20 .byte >$205E ; J - B
000110r 1 22 .byte >$224B ; K - C
000111r 1 26 .byte >$267E ; L - D
000112r 1 00 .byte 0 ; M
000113r 1 00 .byte 0 ; N
000114r 1 24 .byte >$2455 ; O - C#
000115r 1 28 .byte >$28C8 ; P - D#
000116r 1 00 .byte 0 ; Q
000117r 1 00 .byte 0 ; R
000118r 1 13 .byte >$133F ; S - D
000119r 1 18 .byte >$183F ; T - F#
00011Ar 1 1E .byte >$1E80 ; U - A#
00011Br 1 00 .byte 0 ; V
00011Cr 1 12 .byte >$122A ; W - C#
00011Dr 1 00 .byte 0 ; X
00011Er 1 00 .byte 0 ; Y
00011Fr 1 1B .byte >$1B38 ; Z - G#
00011Fr 1
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