From 6e462589cc1475aea63ad1e85ffc59bda1d0859a Mon Sep 17 00:00:00 2001 From: David Fenyes Date: Wed, 19 Feb 2020 23:32:14 -0600 Subject: [PATCH] Arch file support for 4-bit row address. --- firmware/asdf/src/Arch/asdf_arch_atmega328p.c | 2 +- firmware/asdf/src/Arch/asdf_arch_atmega328p.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/firmware/asdf/src/Arch/asdf_arch_atmega328p.c b/firmware/asdf/src/Arch/asdf_arch_atmega328p.c index 5aa8b6e..46d1994 100644 --- a/firmware/asdf/src/Arch/asdf_arch_atmega328p.c +++ b/firmware/asdf/src/Arch/asdf_arch_atmega328p.c @@ -498,7 +498,7 @@ asdf_cols_t asdf_arch_read_row(uint8_t row) asdf_cols_t cols = 0; // first, output the new row value: - ASDF_ROW_PORT = (ASDF_ROW_PORT & ~ASDF_ROW_MASK) | row << ASDF_ROW_OFFSET; + ASDF_ROW_PORT = (ASDF_ROW_PORT & ~ASDF_ROW_MASK) | ((row & ASDF_ROW_MASK) << ASDF_ROW_OFFSET); // read in the columns. Set LOAD mode and pulse clock. diff --git a/firmware/asdf/src/Arch/asdf_arch_atmega328p.h b/firmware/asdf/src/Arch/asdf_arch_atmega328p.h index f91b258..53db11f 100644 --- a/firmware/asdf/src/Arch/asdf_arch_atmega328p.h +++ b/firmware/asdf/src/Arch/asdf_arch_atmega328p.h @@ -179,7 +179,7 @@ #define ASDF_ROW_PORT PORTC #define ASDF_ROW_DDR DDRC -#define ASDF_ROW_MASK 0x07 +#define ASDF_ROW_MASK 0x0f #define ASDF_ROW_OFFSET 0 #define ASDF_COL_PORT PORTB