From 7ce76a224ddec9340bbca933314391a6a725d150 Mon Sep 17 00:00:00 2001
From: Alan Garfield <alan@fromorbit.com>
Date: Sun, 21 Oct 2018 22:23:23 +1100
Subject: [PATCH] fixed dumb error with uart setup

---
 boards/tinyfpga_bx/tinyfpga_bx.pcf   |  4 ++--
 rtl/apple1.v                         |  2 --
 rtl/boards/tinyfpga_bx/apple1_hx8k.v | 12 ++++++------
 rtl/uart/uart.v                      |  5 +----
 4 files changed, 9 insertions(+), 14 deletions(-)

diff --git a/boards/tinyfpga_bx/tinyfpga_bx.pcf b/boards/tinyfpga_bx/tinyfpga_bx.pcf
index 9126c10..db3cb0b 100644
--- a/boards/tinyfpga_bx/tinyfpga_bx.pcf
+++ b/boards/tinyfpga_bx/tinyfpga_bx.pcf
@@ -9,8 +9,8 @@ set_io vga_h_sync B7
 set_io vga_v_sync A8
 
 ## UART
-set_io uart_tx B1
-set_io uart_rx C2
+set_io uart_rx B1
+set_io uart_tx C2
 
 ## Lighthouse
 set_io lt_dat H1
diff --git a/rtl/apple1.v b/rtl/apple1.v
index 9800030..44e535e 100644
--- a/rtl/apple1.v
+++ b/rtl/apple1.v
@@ -35,7 +35,6 @@ module apple1 #(
     // I/O interface to computer
     input  uart_rx,             // asynchronous serial data input from computer
     output uart_tx,             // asynchronous serial data output to computer
-    output uart_cts,            // clear to send flag to computer
 
     // I/O interface to keyboard
     input ps2_clk,              // PS/2 keyboard serial clock input
@@ -177,7 +176,6 @@ module apple1 #(
 
         .uart_rx(uart_rx),
         .uart_tx(uart_tx),
-        .uart_cts(uart_cts),
 
         .address(ab[1:0]),        // for uart
         .w_en(we & uart_cs),
diff --git a/rtl/boards/tinyfpga_bx/apple1_hx8k.v b/rtl/boards/tinyfpga_bx/apple1_hx8k.v
index 70ec654..5ca0211 100644
--- a/rtl/boards/tinyfpga_bx/apple1_hx8k.v
+++ b/rtl/boards/tinyfpga_bx/apple1_hx8k.v
@@ -79,6 +79,7 @@ module apple1_top #(
         .D_OUT_0(lt_env_out)
     );
 
+    wire pc_monitor;
 
     // apple one main system
     apple1 #(
@@ -92,16 +93,15 @@ module apple1_top #(
         .rst_n(1'b1),
         //.ps2_clk(),
         //.ps2_din(),
-        .ps2_select(1'b1),
-        .uart_rx(uart_tx),
-        .uart_tx(uart_rx),
-        //.uart_cts(),        
+        .ps2_select(1'b0),
+        .uart_rx(uart_rx),
+        .uart_tx(uart_tx),
         .vga_h_sync(vga_h_sync),
         .vga_v_sync(vga_v_sync),
         .vga_red(vga_red),
         .vga_grn(vga_grn),
-        .vga_blu(vga_blu)
-        //.pc_monitor(pc_monitor)
+        .vga_blu(vga_blu),
+        .pc_monitor(pc_monitor)
     );
 
 endmodule
diff --git a/rtl/uart/uart.v b/rtl/uart/uart.v
index 07e13e3..09f3539 100644
--- a/rtl/uart/uart.v
+++ b/rtl/uart/uart.v
@@ -32,8 +32,7 @@ module uart(
     output reg [7:0] dout,  // 8-bit data bus (output)
 
     input uart_rx,          // asynchronous serial data input from computer
-    output uart_tx,         // asynchronous serial data output to computer
-    output uart_cts         // clear to send flag to computer
+    output uart_tx          // asynchronous serial data output to computer
     );
 
     parameter ClkFrequency = 25000000;	// 25MHz
@@ -91,8 +90,6 @@ module uart(
         end
     end
 
-    assign uart_cts = ~rx_idle || uart_rx_status;
-
     localparam UART_RX   = 2'b00;
     localparam UART_RXCR = 2'b01;
     localparam UART_TX   = 2'b10;