Apple-1-HW/verilog-apple-one
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updated ROM paths to handle new board/buildenv structure

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This commit is contained in:
Alan Garfield 2018-02-12 08:26:42 +11:00
parent 7f18c17152
commit a4f13a87fe
6 changed files with 6 additions and 6 deletions
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2
boards/ice40hx8k-b-evn/yosys/Makefile
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@ -1,7 +1,7 @@
DEVICE = hx8k
PIN_DEF=ice40hx8k.pcf
SOURCEDIR = ../../rtl
SOURCEDIR = ../../../rtl
BUILDDIR = build
all: apple1 prog

2
rtl/ram.v
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@ -33,7 +33,7 @@ module ram(
`ifdef SIM
parameter RAM_FILENAME = "../roms/ram.hex";
`else
parameter RAM_FILENAME = "../../roms/ram.hex";
parameter RAM_FILENAME = "../../../roms/ram.hex";
`endif
reg [7:0] ram_data[0:8191];

2
rtl/rom_basic.v
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@ -31,7 +31,7 @@ module rom_basic(
`ifdef SIM
parameter BASIC_FILENAME = "../roms/basic.hex";
`else
parameter BASIC_FILENAME = "../../roms/basic.hex";
parameter BASIC_FILENAME = "../../../roms/basic.hex";
`endif
reg [7:0] rom_data[0:4095];

2
rtl/rom_wozmon.v
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@ -31,7 +31,7 @@ module rom_wozmon(
`ifdef SIM
parameter ROM_FILENAME = "../roms/wozmon.hex";
`else
parameter ROM_FILENAME = "../../roms/wozmon.hex";
parameter ROM_FILENAME = "../../../roms/wozmon.hex";
`endif
reg [7:0] rom_data[0:255];

2
rtl/vga/font_rom.v
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@ -36,7 +36,7 @@ module font_rom(
`ifdef SIM
parameter ROM_FILENAME = "../roms/vga_font_bitreversed.hex";
`else
parameter ROM_FILENAME = "../../roms/vga_font_bitreversed.hex";
parameter ROM_FILENAME = "../../../roms/vga_font_bitreversed.hex";
`endif
reg [7:0] rom[0:1023];

2
rtl/vga/vram.v
View File

@ -35,7 +35,7 @@ module vram(
`ifdef SIM
parameter RAM_FILENAME = "../roms/vga_vram.bin";
`else
parameter RAM_FILENAME = "../../roms/vga_vram.bin";
parameter RAM_FILENAME = "../../../roms/vga_vram.bin";
`endif
reg [5:0] ram_data[0:2047];