diff --git a/boards/upduino/yosys/Makefile b/boards/upduino/yosys/Makefile
index 1591b32..33e4182 100644
--- a/boards/upduino/yosys/Makefile
+++ b/boards/upduino/yosys/Makefile
@@ -6,7 +6,7 @@ FREQ_PLL = 25
 PIN_DEF=ice40up5k.pcf
 
 
-SOURCEDIR = ../../rtl
+SOURCEDIR = ../../../rtl
 BUILDDIR = build
 PLL=$(BUILDDIR)/pll.sv
 
@@ -66,7 +66,7 @@ $(BUILDDIR)/apple1.blif: $(BUILDDIR)/pll.sv \
 	$(SOURCEDIR)/vga/font_rom.v \
 	$(SOURCEDIR)/ps2keyboard/debounce.v \
 	$(SOURCEDIR)/ps2keyboard/ps2keyboard.v \
-	$(SOURCEDIR)/boards/ice40up5k/apple1_up5k.v
+	$(SOURCEDIR)/boards/upduino/apple1_up5k.v
 
 apple1.rpt: $(BUILDDIR)/apple1.asc
 
diff --git a/rtl/boards/upduino/apple1_up5k.v b/rtl/boards/upduino/apple1_up5k.v
index ca3d775..1f4710e 100644
--- a/rtl/boards/upduino/apple1_up5k.v
+++ b/rtl/boards/upduino/apple1_up5k.v
@@ -49,18 +49,16 @@ module apple1_top(
     wire clk25;
     wire clk;
 
-	wire clk25;
-	SB_HFOSC inthosc (
-		.CLKHFPU(1'b1),
-		.CLKHFEN(1'b1),
-		.CLKHF(clk)
-	);
-
-   pll pll(
-	   .clock_in(clk),
-	   .clock_out(clk25),
-   ); 
+    SB_HFOSC inthosc (
+        .CLKHFPU(1'b1),
+        .CLKHFEN(1'b1),
+        .CLKHF(clk)
+    );
 
+    pll pll(
+        .clock_in(clk),
+        .clock_out(clk25),
+    );
 
     // apple one main system
     apple1 my_apple1(