diff --git a/rtl/apple1.v b/rtl/apple1.v index 52184e5..00111e1 100644 --- a/rtl/apple1.v +++ b/rtl/apple1.v @@ -45,9 +45,10 @@ module apple1 #( // Outputs to VGA display output vga_h_sync, // hozizontal VGA sync pulse output vga_v_sync, // vertical VGA sync pulse - output vga_red, // red VGA signal - output vga_grn, // green VGA signal - output vga_blu, // blue VGA signal + output vga_red, // red VGA signal + output vga_grn, // green VGA signal + output vga_blu, // blue VGA signal + input clr_screen, // clear screen button // Debugging ports output [15:0] pc_monitor // spy for program counter / debugging @@ -175,8 +176,6 @@ module apple1 #( .uart_tx(uart_tx), .uart_cts(uart_cts), - //.address({1'b1, ab[0]}), // for ps/2 - //.address({1'b0, ab[0]}), // for vga .address(ab[1:0]), // for uart .w_en(we & uart_cs), .din(dbo), @@ -214,7 +213,8 @@ module apple1 #( .address(ab[0]), .w_en(we & vga_cs), .din(dbo), - .mode(vga_mode) + .mode(vga_mode), + .clr_screen(clr_screen) ); // FIXME: REMOVE THIS diff --git a/rtl/boards/ice40hx8k-b-evn/apple1_hx8k.v b/rtl/boards/ice40hx8k-b-evn/apple1_hx8k.v index c0ac6c7..3899e93 100644 --- a/rtl/boards/ice40hx8k-b-evn/apple1_hx8k.v +++ b/rtl/boards/ice40hx8k-b-evn/apple1_hx8k.v @@ -104,6 +104,7 @@ module apple1_top #( .vga_red(vga_red), .vga_grn(vga_grn), .vga_blu(vga_blu), + .clr_screen(~button[1]), .pc_monitor(pc_monitor) ); diff --git a/rtl/vga/vga.v b/rtl/vga/vga.v index b796dad..dd1a087 100644 --- a/rtl/vga/vga.v +++ b/rtl/vga/vga.v @@ -13,7 +13,8 @@ module vga #( input address, // address bus input w_en, // active high write enable strobe input [7:0] din, // 8-bit data bus (input) - input [1:0] mode // 2-bit mode setting for pixel doubling + input [1:0] mode, // 2-bit mode setting for pixel doubling + input clr_screen // clear screen button ); ////////////////////////////////////////////////////////////////////////// @@ -60,9 +61,6 @@ module vga #( wire [4:0] font_line; wire font_out; - // Font ROM contents - parameter ROM_FILENAME = ""; - // cpu control registers reg char_seen; @@ -229,54 +227,72 @@ module vga #( begin vram_w_en <= 0; - // cursor overflow handling - if (h_cursor == 6'd40) + if (clr_screen) begin + // return to top of screen h_cursor <= 6'd0; - v_cursor <= v_cursor + 'd1; - end + v_cursor <= 5'd0; - if (v_cursor == vram_end_addr) - begin - vram_start_addr <= vram_start_addr + 'd1; - vram_end_addr <= vram_end_addr + 'd1; - end + vram_start_addr <= 5'd0; + vram_end_addr <= 5'd23; - if (address == 1'b0) // address low == TX register - begin - if (enable & w_en & ~char_seen) - begin - // incoming character - char_seen <= 1; - - case(din) - 8'h8D: begin - // handle carriage return - h_cursor <= 0; - v_cursor <= v_cursor + 'd1; - end - - 8'h7F: begin - // ignore the DDR call to the PIA - h_cursor <= 0; - end - - default: begin - vram_w_addr <= cursor; - vram_din <= {~din[6], din[4:0]}; - vram_w_en <= 1; - h_cursor <= h_cursor + 1; - end - endcase - end - else if(~enable & ~w_en) - char_seen <= 0; + // clear the screen + vram_w_addr <= {vram_v_addr, vram_h_addr}; + vram_din <= 6'd32; + vram_w_en <= 1; end else begin - vram_w_addr <= {vram_clr_addr, vram_h_addr}; - vram_din <= 6'd32; - vram_w_en <= 1; + // cursor overflow handling + if (h_cursor == 6'd40) + begin + h_cursor <= 6'd0; + v_cursor <= v_cursor + 'd1; + end + + if (v_cursor == vram_end_addr) + begin + vram_start_addr <= vram_start_addr + 'd1; + vram_end_addr <= vram_end_addr + 'd1; + end + + if (address == 1'b0) // address low == TX register + begin + if (enable & w_en & ~char_seen) + begin + // incoming character + char_seen <= 1; + + case(din) + 8'h8D: begin + // handle carriage return + h_cursor <= 0; + v_cursor <= v_cursor + 'd1; + end + + 8'h9B, + 8'h7F: begin + // ignore the escape key + h_cursor <= 0; + end + + default: begin + vram_w_addr <= cursor; + vram_din <= {~din[6], din[4:0]}; + vram_w_en <= 1; + h_cursor <= h_cursor + 1; + end + endcase + end + else if(~enable & ~w_en) + char_seen <= 0; + end + else + begin + vram_w_addr <= {vram_clr_addr, vram_h_addr}; + vram_din <= 6'd32; + vram_w_en <= 1; + end end end end