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Code Issues Projects Releases Wiki Activity

Fixed ise_hexer to filter out more rubbish characters. Fixed S3E starterkit toplevel (ROM/RAM parameters)

This commit is contained in:
Niels Moseley 2018-02-12 15:53:02 +01:00
parent b2d01d4703
commit bad08ec595
2 changed files with 183 additions and 2 deletions
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163
boards/spartan3e_starterkit/webpack_ise/Apple-One.gise
View File

@ -22,9 +22,170 @@
<sourceproject xmlns="http://www.xilinx.com/XMLSchema" xil_pn:fileType="FILE_XISE" xil_pn:name="Apple-One.xise"/>
<files xmlns="http://www.xilinx.com/XMLSchema">
<file xil_pn:fileType="FILE_DIRECTORY" xil_pn:name="_ngo"/>
<file xil_pn:fileType="FILE_XMSGS" xil_pn:name="_xmsgs/bitgen.xmsgs"/>
<file xil_pn:fileType="FILE_XMSGS" xil_pn:name="_xmsgs/map.xmsgs"/>
<file xil_pn:fileType="FILE_XMSGS" xil_pn:name="_xmsgs/ngdbuild.xmsgs"/>
<file xil_pn:fileType="FILE_XMSGS" xil_pn:name="_xmsgs/par.xmsgs"/>
<file xil_pn:fileType="FILE_XMSGS" xil_pn:name="_xmsgs/trce.xmsgs"/>
<file xil_pn:fileType="FILE_XMSGS" xil_pn:name="_xmsgs/xst.xmsgs"/>
<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_BITGEN_REPORT" xil_pn:name="apple1_s3e_starterkit_top.bgn" xil_pn:subbranch="FPGAConfiguration"/>
<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_BIT" xil_pn:name="apple1_s3e_starterkit_top.bit" xil_pn:subbranch="FPGAConfiguration"/>
<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_NGDBUILD_LOG" xil_pn:name="apple1_s3e_starterkit_top.bld"/>
<file xil_pn:fileType="FILE_CMD_LOG" xil_pn:name="apple1_s3e_starterkit_top.cmd_log"/>
<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_BITGEN_DRC" xil_pn:name="apple1_s3e_starterkit_top.drc" xil_pn:subbranch="FPGAConfiguration"/>
<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_LSO" xil_pn:name="apple1_s3e_starterkit_top.lso"/>
<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_NCD" xil_pn:name="apple1_s3e_starterkit_top.ncd" xil_pn:subbranch="Par"/>
<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_NGC" xil_pn:name="apple1_s3e_starterkit_top.ngc"/>
<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_NGD" xil_pn:name="apple1_s3e_starterkit_top.ngd"/>
<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_NGR" xil_pn:name="apple1_s3e_starterkit_top.ngr"/>
<file xil_pn:fileType="FILE_PAD_MISC" xil_pn:name="apple1_s3e_starterkit_top.pad"/>
<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_PAR_REPORT" xil_pn:name="apple1_s3e_starterkit_top.par" xil_pn:subbranch="Par"/>
<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_PCF" xil_pn:name="apple1_s3e_starterkit_top.pcf" xil_pn:subbranch="Map"/>
<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_XST_PROJECT" xil_pn:name="apple1_s3e_starterkit_top.prj"/>
<file xil_pn:fileType="FILE_TRCE_MISC" xil_pn:name="apple1_s3e_starterkit_top.ptwx"/>
<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_XST_STX" xil_pn:name="apple1_s3e_starterkit_top.stx"/>
<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_XST_REPORT" xil_pn:name="apple1_s3e_starterkit_top.syr"/>
<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_TIMING_TXT_REPORT" xil_pn:name="apple1_s3e_starterkit_top.twr" xil_pn:subbranch="Par"/>
<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_TIMING_XML_REPORT" xil_pn:name="apple1_s3e_starterkit_top.twx" xil_pn:subbranch="Par"/>
<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_UNROUTES" xil_pn:name="apple1_s3e_starterkit_top.unroutes" xil_pn:subbranch="Par"/>
<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_BITGEN_REPORT" xil_pn:name="apple1_s3e_starterkit_top.ut" xil_pn:subbranch="FPGAConfiguration"/>
<file xil_pn:fileType="FILE_XPI" xil_pn:name="apple1_s3e_starterkit_top.xpi"/>
<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_XST" xil_pn:name="apple1_s3e_starterkit_top.xst"/>
<file xil_pn:fileType="FILE_HTML" xil_pn:name="apple1_s3e_starterkit_top_envsettings.html"/>
<file xil_pn:fileType="FILE_NCD" xil_pn:name="apple1_s3e_starterkit_top_guide.ncd" xil_pn:origination="imported"/>
<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_MAP_REPORT" xil_pn:name="apple1_s3e_starterkit_top_map.map" xil_pn:subbranch="Map"/>
<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_MAP_REPORT" xil_pn:name="apple1_s3e_starterkit_top_map.mrp" xil_pn:subbranch="Map"/>
<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_NCD" xil_pn:name="apple1_s3e_starterkit_top_map.ncd" xil_pn:subbranch="Map"/>
<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_NGM" xil_pn:name="apple1_s3e_starterkit_top_map.ngm" xil_pn:subbranch="Map"/>
<file xil_pn:fileType="FILE_XRPT" xil_pn:name="apple1_s3e_starterkit_top_map.xrpt"/>
<file xil_pn:fileType="FILE_XRPT" xil_pn:name="apple1_s3e_starterkit_top_ngdbuild.xrpt"/>
<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_PAD_EXCEL_REPORT" xil_pn:name="apple1_s3e_starterkit_top_pad.csv" xil_pn:subbranch="Par"/>
<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_PAD_TXT_REPORT" xil_pn:name="apple1_s3e_starterkit_top_pad.txt" xil_pn:subbranch="Par"/>
<file xil_pn:fileType="FILE_XRPT" xil_pn:name="apple1_s3e_starterkit_top_par.xrpt"/>
<file xil_pn:fileType="FILE_HTML" xil_pn:name="apple1_s3e_starterkit_top_summary.html"/>
<file xil_pn:fileType="FILE_FITTER_REPORT" xil_pn:name="apple1_s3e_starterkit_top_summary.xml"/>
<file xil_pn:fileType="FILE_WEBTALK" xil_pn:name="apple1_s3e_starterkit_top_usage.xml"/>
<file xil_pn:fileType="FILE_XRPT" xil_pn:name="apple1_s3e_starterkit_top_xst.xrpt"/>
<file xil_pn:fileType="FILE_HTML" xil_pn:name="usage_statistics_webtalk.html"/>
<file xil_pn:fileType="FILE_LOG" xil_pn:name="webtalk.log"/>
<file xil_pn:fileType="FILE_FITTER_REPORT" xil_pn:name="webtalk_pn.xml"/>
<file xil_pn:fileType="FILE_DIRECTORY" xil_pn:name="xlnx_auto_0_xdb"/>
<file xil_pn:fileType="FILE_DIRECTORY" xil_pn:name="xst"/>
</files>
<transforms xmlns="http://www.xilinx.com/XMLSchema"/>
<transforms xmlns="http://www.xilinx.com/XMLSchema">
<transform xil_pn:end_ts="1518445402" xil_pn:name="TRAN_copyInitialToXSTAbstractSynthesis" xil_pn:start_ts="1518445402">
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="ReadyToRun"/>
</transform>
<transform xil_pn:end_ts="1518445402" xil_pn:name="TRAN_schematicsToHdl" xil_pn:prop_ck="-8047623173950424796" xil_pn:start_ts="1518445402">
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="ReadyToRun"/>
</transform>
<transform xil_pn:end_ts="1518445402" xil_pn:name="TRAN_regenerateCores" xil_pn:prop_ck="-5517904575026456470" xil_pn:start_ts="1518445402">
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="ReadyToRun"/>
</transform>
<transform xil_pn:end_ts="1518445402" xil_pn:name="TRAN_SubProjectAbstractToPreProxy" xil_pn:start_ts="1518445402">
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="ReadyToRun"/>
</transform>
<transform xil_pn:end_ts="1518445402" xil_pn:name="TRAN_xawsTohdl" xil_pn:prop_ck="371049259623331234" xil_pn:start_ts="1518445402">
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="ReadyToRun"/>
</transform>
<transform xil_pn:end_ts="1518445402" xil_pn:name="TRAN_SubProjectPreToStructuralProxy" xil_pn:prop_ck="-3893270297158069842" xil_pn:start_ts="1518445402">
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="ReadyToRun"/>
</transform>
<transform xil_pn:end_ts="1518445402" xil_pn:name="TRAN_platgen" xil_pn:prop_ck="7484568996919421620" xil_pn:start_ts="1518445402">
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="ReadyToRun"/>
</transform>
<transform xil_pn:end_ts="1518446552" xil_pn:in_ck="-2402892782883100176" xil_pn:name="TRANEXT_xstsynthesize_spartan3e" xil_pn:prop_ck="-8720043281624233679" xil_pn:start_ts="1518446533">
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="WarningsGenerated"/>
<status xil_pn:value="ReadyToRun"/>
<status xil_pn:value="OutOfDateForOutputs"/>
<status xil_pn:value="OutputChanged"/>
<outfile xil_pn:name="_xmsgs/xst.xmsgs"/>
<outfile xil_pn:name="apple1_s3e_starterkit_top.lso"/>
<outfile xil_pn:name="apple1_s3e_starterkit_top.ngc"/>
<outfile xil_pn:name="apple1_s3e_starterkit_top.ngr"/>
<outfile xil_pn:name="apple1_s3e_starterkit_top.prj"/>
<outfile xil_pn:name="apple1_s3e_starterkit_top.stx"/>
<outfile xil_pn:name="apple1_s3e_starterkit_top.syr"/>
<outfile xil_pn:name="apple1_s3e_starterkit_top.xst"/>
<outfile xil_pn:name="apple1_s3e_starterkit_top_xst.xrpt"/>
<outfile xil_pn:name="webtalk_pn.xml"/>
<outfile xil_pn:name="xst"/>
</transform>
<transform xil_pn:end_ts="1518445424" xil_pn:in_ck="-5976217886481463465" xil_pn:name="TRAN_compileBCD2" xil_pn:prop_ck="-5004538815383072947" xil_pn:start_ts="1518445424">
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="ReadyToRun"/>
</transform>
<transform xil_pn:end_ts="1518446557" xil_pn:in_ck="-3894786652928293112" xil_pn:name="TRANEXT_ngdbuild_FPGA" xil_pn:prop_ck="-581701490373080307" xil_pn:start_ts="1518446552">
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="ReadyToRun"/>
<outfile xil_pn:name="_ngo"/>
<outfile xil_pn:name="_xmsgs/ngdbuild.xmsgs"/>
<outfile xil_pn:name="apple1_s3e_starterkit_top.bld"/>
<outfile xil_pn:name="apple1_s3e_starterkit_top.ngd"/>
<outfile xil_pn:name="apple1_s3e_starterkit_top_ngdbuild.xrpt"/>
</transform>
<transform xil_pn:end_ts="1518446561" xil_pn:in_ck="8375880660293788329" xil_pn:name="TRANEXT_map_spartan3" xil_pn:prop_ck="-5849673150125579957" xil_pn:start_ts="1518446557">
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="ReadyToRun"/>
<status xil_pn:value="OutOfDateForOutputs"/>
<status xil_pn:value="OutputChanged"/>
<outfile xil_pn:name="_xmsgs/map.xmsgs"/>
<outfile xil_pn:name="apple1_s3e_starterkit_top.pcf"/>
<outfile xil_pn:name="apple1_s3e_starterkit_top_map.map"/>
<outfile xil_pn:name="apple1_s3e_starterkit_top_map.mrp"/>
<outfile xil_pn:name="apple1_s3e_starterkit_top_map.ncd"/>
<outfile xil_pn:name="apple1_s3e_starterkit_top_map.ngm"/>
<outfile xil_pn:name="apple1_s3e_starterkit_top_map.xrpt"/>
<outfile xil_pn:name="apple1_s3e_starterkit_top_summary.xml"/>
<outfile xil_pn:name="apple1_s3e_starterkit_top_usage.xml"/>
</transform>
<transform xil_pn:end_ts="1518446578" xil_pn:in_ck="-3296291810439397278" xil_pn:name="TRANEXT_par_spartan3" xil_pn:prop_ck="-5563652517805085498" xil_pn:start_ts="1518446561">
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="ReadyToRun"/>
<outfile xil_pn:name="_xmsgs/par.xmsgs"/>
<outfile xil_pn:name="apple1_s3e_starterkit_top.ncd"/>
<outfile xil_pn:name="apple1_s3e_starterkit_top.pad"/>
<outfile xil_pn:name="apple1_s3e_starterkit_top.par"/>
<outfile xil_pn:name="apple1_s3e_starterkit_top.ptwx"/>
<outfile xil_pn:name="apple1_s3e_starterkit_top.unroutes"/>
<outfile xil_pn:name="apple1_s3e_starterkit_top.xpi"/>
<outfile xil_pn:name="apple1_s3e_starterkit_top_pad.csv"/>
<outfile xil_pn:name="apple1_s3e_starterkit_top_pad.txt"/>
<outfile xil_pn:name="apple1_s3e_starterkit_top_par.xrpt"/>
</transform>
<transform xil_pn:end_ts="1518446588" xil_pn:in_ck="-5976217886481471090" xil_pn:name="TRANEXT_bitFile_spartan3e" xil_pn:prop_ck="287829442711806529" xil_pn:start_ts="1518446578">
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="ReadyToRun"/>
<outfile xil_pn:name="_xmsgs/bitgen.xmsgs"/>
<outfile xil_pn:name="apple1_s3e_starterkit_top.bgn"/>
<outfile xil_pn:name="apple1_s3e_starterkit_top.bit"/>
<outfile xil_pn:name="apple1_s3e_starterkit_top.drc"/>
<outfile xil_pn:name="apple1_s3e_starterkit_top.ut"/>
<outfile xil_pn:name="usage_statistics_webtalk.html"/>
<outfile xil_pn:name="webtalk.log"/>
<outfile xil_pn:name="webtalk_pn.xml"/>
</transform>
<transform xil_pn:end_ts="1518446623" xil_pn:in_ck="-5976217886481483944" xil_pn:name="TRAN_configureTargetDevice" xil_pn:prop_ck="5582947192412673156" xil_pn:start_ts="1518446622">
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="ReadyToRun"/>
</transform>
<transform xil_pn:end_ts="1518446578" xil_pn:in_ck="-6485470272289971291" xil_pn:name="TRAN_postRouteTrce" xil_pn:prop_ck="445577401284416186" xil_pn:start_ts="1518446575">
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="ReadyToRun"/>
<outfile xil_pn:name="_xmsgs/trce.xmsgs"/>
<outfile xil_pn:name="apple1_s3e_starterkit_top.twr"/>
<outfile xil_pn:name="apple1_s3e_starterkit_top.twx"/>
</transform>
</transforms>
</generated_project>

22
tools/ise_hexer/main.c
View File

@ -18,6 +18,23 @@ uint8_t isWhiteSpace(char c)
return 0;
}
uint8_t isHex(char c)
{
if ((c>='0') && (c<='9'))
{
return 1;
}
if ((c>='a') && (c<='f'))
{
return 1;
}
if ((c>='A') && (c<='F'))
{
return 1;
}
return 0;
}
uint8_t convert(const char *infilename, const char *outfilename)
{
FILE *fin = fopen(infilename,"rt");
@ -48,7 +65,10 @@ uint8_t convert(const char *infilename, const char *outfilename)
}
else
{
fprintf(fout,"%c", c);
if ((isHex(c)) || (c==10) || (c==13))
{
fprintf(fout,"%c", c);
}
}
}
else