190 lines
5.6 KiB
Verilog
190 lines
5.6 KiB
Verilog
// Licensed to the Apache Software Foundation (ASF) under one
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// or more contributor license agreements. See the NOTICE file
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// distributed with this work for additional information
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// regarding copyright ownership. The ASF licenses this file
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// to you under the Apache License, Version 2.0 (the
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// "License"); you may not use this file except in compliance
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// with the License. You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing,
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// software distributed under the License is distributed on an
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// "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
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// KIND, either express or implied. See the License for the
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// specific language governing permissions and limitations
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// under the License.
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//
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// Description: Apple 1 implementation for the iCE40HX8K dev
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// board.
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//
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// Author.....: Alan Garfield
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// Date.......: 26-1-2018
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//
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module apple1_top #(
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parameter BASIC_FILENAME = "../../../roms/basic.hex",
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parameter FONT_ROM_FILENAME = "../../../roms/vga_font_bitreversed.hex",
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parameter RAM_FILENAME = "../../../roms/ram.hex",
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parameter VRAM_FILENAME = "../../../roms/vga_vram.bin",
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parameter WOZMON_ROM_FILENAME = "../../../roms/wozmon.hex"
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) (
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input clk, // 12 MHz board clock
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// I/O interface to computer
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input uart_rx, // asynchronous serial data input from computer
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output uart_tx, // asynchronous serial data output to computer
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output uart_cts, // clear to send flag to computer
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// I/O interface to keyboard
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input ps2_clk, // PS/2 keyboard serial clock input
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input ps2_din, // PS/2 keyboard serial data input
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// I/O interface to USB keyboard
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inout usb_dm, // USB keyboard minus pin
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inout usb_dp, // USB keyboard plus pin
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// Outputs to VGA display
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output vga_h_sync, // hozizontal VGA sync pulse
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output vga_v_sync, // vertical VGA sync pulse
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output reg vga_red, // red VGA signal
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output reg vga_grn, // green VGA signal
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output reg vga_blu, // blue VGA signal
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// Debugging ports
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output [7:0] led, // 8 LEDs on the iCE40HX8K board
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output [7:0] ledx, // 8 LEDs on optionally attached YL-4 board
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input [3:0] button // 4 buttons on optionally attached YL-4 board
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);
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//////////////////////////////////////////////////////////////////////////
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// Registers and Wires
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wire clk25;
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wire [15:0] pc_monitor;
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assign led[7:0] = pc_monitor[7:0];
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assign ledx[7:0] = ~pc_monitor[15:8];
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//////////////////////////////////////////////////////////////////////////
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// Clocks
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// 12MHz up to 25MHz
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pll my_pll(
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.clock_in(clk),
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.clock_out(clk25)
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);
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//////////////////////////////////////////////////////////////////////////
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// PS/2 Keyboard
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// PS2 Pullups
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wire ps2__clk, ps2__din;
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SB_IO #(
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.PIN_TYPE(6'b000001),
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.PULLUP(1'b1)
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) my_ps2_clk (
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.PACKAGE_PIN(ps2_clk),
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.D_IN_0(ps2__clk),
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);
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SB_IO #(
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.PIN_TYPE(6'b000001),
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.PULLUP(1'b1)
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) my_ps2_din (
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.PACKAGE_PIN(ps2_din),
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.D_IN_0(ps2__din),
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);
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//////////////////////////////////////////////////////////////////////////
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// Reset, Clear Screen and PS/2 mode selection toggle
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// debounce reset button
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wire reset_n;
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debounce reset_button (
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.clk25(clk25),
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.rst(1'b0),
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.sig_in(button[0]),
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.sig_out(reset_n)
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);
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// debounce clear screen button
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wire clr_screen_n;
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debounce clr_button (
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.clk25(clk25),
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.rst(~reset_n),
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.sig_in(button[1]),
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.sig_out(clr_screen_n)
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);
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// debounce toggle button on PS2 select
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wire ps2_toggle;
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reg ps2_select;
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debounce ps2_button (
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.clk25(clk25),
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.rst(~reset_n),
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.sig_in(button[2]),
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.sig_out(ps2_toggle)
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);
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// defaults to PS2 mode, but can toggle between
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// UART and PS2 per button press
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always @(posedge ps2_toggle)
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ps2_select <= ~ps2_select;
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wire usb_en;
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wire usb_dm_in, usb_dp_in;
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wire usb_dm_out, usb_dp_out;
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SB_IO #(
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.PIN_TYPE(6'b101001),
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.PULLUP(1'b1)
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) tm_dm_io (
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.PACKAGE_PIN(usb_dm),
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.OUTPUT_ENABLE(usb_en),
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.D_IN_0(usb_dm_in),
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.D_OUT_0(usb_dm_out)
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);
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SB_IO #(
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.PIN_TYPE(6'b101001),
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.PULLUP(1'b1)
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) tm_dp_io (
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.PACKAGE_PIN(usb_dp),
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.OUTPUT_ENABLE(usb_en),
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.D_IN_0(usb_dp_in),
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.D_OUT_0(usb_dp_out)
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);
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//////////////////////////////////////////////////////////////////////////
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// Core of system
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// apple one main system
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apple1 #(
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.BASIC_FILENAME (BASIC_FILENAME),
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.FONT_ROM_FILENAME (FONT_ROM_FILENAME),
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.RAM_FILENAME (RAM_FILENAME),
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.VRAM_FILENAME (VRAM_FILENAME),
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.WOZMON_ROM_FILENAME (WOZMON_ROM_FILENAME)
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) my_apple1(
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.clk25(clk25),
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.clkusb(clk),
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.rst_n(reset_n),
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.uart_rx(uart_rx),
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.uart_tx(uart_tx),
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.uart_cts(uart_cts),
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.ps2_clk(ps2__clk),
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.ps2_din(ps2__din),
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.ps2_select(ps2_select),
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.usb_en(usb_en),
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.usb_dm_in(usb_dm_in),
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.usb_dp_in(usb_dp_in),
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.usb_dm_out(usb_dm_out),
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.usb_dp_out(usb_dp_out),
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.vga_h_sync(vga_h_sync),
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.vga_v_sync(vga_v_sync),
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.vga_red(vga_red),
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.vga_grn(vga_grn),
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.vga_blu(vga_blu),
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.vga_cls(~clr_screen_n),
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.pc_monitor(pc_monitor)
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);
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endmodule
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