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verilog-apple-one/boards/terasic_de0
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Niels Moseley 96061a7fa9 Added README.md for Terasic DE0 board.
2018-02-11 17:55:13 +01:00
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images Added README.md for Terasic DE0 board. 2018-02-11 17:55:13 +01:00
apple-one.pin Disabled ice40 specific define and clock generation. Added Terasic DE0 Quartus files. 2018-01-26 21:29:12 +01:00
apple-one.qpf Disabled ice40 specific define and clock generation. Added Terasic DE0 Quartus files. 2018-01-26 21:29:12 +01:00
apple-one.qsf Added debounced PS/2 keyboard interface and A1 top-level selection between keyboard and UART RX 2018-02-08 23:47:09 +01:00
apple-one.sdc Adding missing DE0 timing constraints file 2018-01-27 23:02:05 +01:00
README.md Added README.md for Terasic DE0 board. 2018-02-11 17:55:13 +01:00

README.md

Apple One
Terasic DE0 Board target

Maintainer: Niels Moseley https://github.com/trcwm

Terasic DE0 board photo

Build environment

The project was developed using Quartus II 13.1. Using other versions might work, YMMV.

Features

  • UART support via the on-board RS-232 interface.
  • VGA support via the on-board VGA connector.
  • PS/2 keyboard support via the on-board PS/2 connector.
  • The 7-segment display shows the 6502's program counter.
  • The right-most push button resets the system.